1 // SPDX-License-Identifier: GPL-2.0 2 /* Copyright (c) 2018, Broadcom */ 3 4 /* 5 * This module contains USB PHY initialization for power up and S3 resume 6 * for newer Synopsys based USB hardware first used on the bcm7216. 7 */ 8 9 #include <linux/delay.h> 10 #include <linux/io.h> 11 12 #include <linux/soc/brcmstb/brcmstb.h> 13 #include "phy-brcm-usb-init.h" 14 15 #define PHY_LOCK_TIMEOUT_MS 200 16 17 /* Register definitions for syscon piarbctl registers */ 18 #define PIARBCTL_CAM 0x00 19 #define PIARBCTL_SPLITTER 0x04 20 #define PIARBCTL_MISC 0x08 21 #define PIARBCTL_MISC_SECURE_MASK 0x80000000 22 #define PIARBCTL_MISC_USB_SELECT_MASK 0x40000000 23 #define PIARBCTL_MISC_USB_4G_SDRAM_MASK 0x20000000 24 #define PIARBCTL_MISC_USB_PRIORITY_MASK 0x000f0000 25 #define PIARBCTL_MISC_USB_MEM_PAGE_MASK 0x0000f000 26 #define PIARBCTL_MISC_CAM1_MEM_PAGE_MASK 0x00000f00 27 #define PIARBCTL_MISC_CAM0_MEM_PAGE_MASK 0x000000f0 28 #define PIARBCTL_MISC_SATA_PRIORITY_MASK 0x0000000f 29 #define PIARBCTL_USB_M_ASB_CTRL 0x10 30 31 #define PIARBCTL_MISC_USB_ONLY_MASK \ 32 (PIARBCTL_MISC_USB_SELECT_MASK | \ 33 PIARBCTL_MISC_USB_4G_SDRAM_MASK | \ 34 PIARBCTL_MISC_USB_PRIORITY_MASK | \ 35 PIARBCTL_MISC_USB_MEM_PAGE_MASK) 36 37 /* Register definitions for the USB CTRL block */ 38 #define USB_CTRL_SETUP 0x00 39 #define USB_CTRL_SETUP_STRAP_IPP_SEL_MASK 0x02000000 40 #define USB_CTRL_SETUP_SCB2_EN_MASK 0x00008000 41 #define USB_CTRL_SETUP_tca_drv_sel_MASK 0x01000000 42 #define USB_CTRL_SETUP_SCB1_EN_MASK 0x00004000 43 #define USB_CTRL_SETUP_SOFT_SHUTDOWN_MASK 0x00000200 44 #define USB_CTRL_SETUP_IPP_MASK 0x00000020 45 #define USB_CTRL_SETUP_IOC_MASK 0x00000010 46 #define USB_CTRL_USB_PM 0x04 47 #define USB_CTRL_USB_PM_USB_PWRDN_MASK 0x80000000 48 #define USB_CTRL_USB_PM_SOFT_RESET_MASK 0x40000000 49 #define USB_CTRL_USB_PM_BDC_SOFT_RESETB_MASK 0x00800000 50 #define USB_CTRL_USB_PM_XHC_SOFT_RESETB_MASK 0x00400000 51 #define USB_CTRL_USB_PM_STATUS 0x08 52 #define USB_CTRL_USB_DEVICE_CTL1 0x10 53 #define USB_CTRL_USB_DEVICE_CTL1_PORT_MODE_MASK 0x00000003 54 55 /* Register definitions for the USB_PHY block in 7211b0 */ 56 #define USB_PHY_PLL_LDO_CTL 0x08 57 #define USB_PHY_PLL_LDO_CTL_AFE_CORERDY_MASK 0x00000004 58 #define USB_PHY_UTMI_CTL_1 0x04 59 #define USB_PHY_UTMI_CTL_1_POWER_UP_FSM_EN_MASK 0x00000800 60 #define USB_PHY_UTMI_CTL_1_PHY_MODE_MASK 0x0000000c 61 #define USB_PHY_UTMI_CTL_1_PHY_MODE_SHIFT 2 62 #define USB_PHY_STATUS 0x20 63 #define USB_PHY_STATUS_pll_lock_MASK 0x00000001 64 65 /* Register definitions for the MDIO registers in the DWC2 block of 66 * the 7211b0. 67 * NOTE: The PHY's MDIO registers are only accessible through the 68 * legacy DesignWare USB controller even though it's not being used. 69 */ 70 #define USB_GMDIOCSR 0 71 #define USB_GMDIOGEN 4 72 73 /* Register definitions for the BDC EC block in 7211b0 */ 74 #define BDC_EC_AXIRDA 0x0c 75 #define BDC_EC_AXIRDA_RTS_MASK 0xf0000000 76 #define BDC_EC_AXIRDA_RTS_SHIFT 28 77 78 79 static void usb_mdio_write_7211b0(struct brcm_usb_init_params *params, 80 uint8_t addr, uint16_t data) 81 { 82 void __iomem *usb_mdio = params->regs[BRCM_REGS_USB_MDIO]; 83 84 addr &= 0x1f; /* 5-bit address */ 85 brcm_usb_writel(0xffffffff, usb_mdio + USB_GMDIOGEN); 86 while (brcm_usb_readl(usb_mdio + USB_GMDIOCSR) & (1<<31)) 87 ; 88 brcm_usb_writel(0x59020000 | (addr << 18) | data, 89 usb_mdio + USB_GMDIOGEN); 90 while (brcm_usb_readl(usb_mdio + USB_GMDIOCSR) & (1<<31)) 91 ; 92 brcm_usb_writel(0x00000000, usb_mdio + USB_GMDIOGEN); 93 while (brcm_usb_readl(usb_mdio + USB_GMDIOCSR) & (1<<31)) 94 ; 95 } 96 97 static uint16_t __maybe_unused usb_mdio_read_7211b0( 98 struct brcm_usb_init_params *params, uint8_t addr) 99 { 100 void __iomem *usb_mdio = params->regs[BRCM_REGS_USB_MDIO]; 101 102 addr &= 0x1f; /* 5-bit address */ 103 brcm_usb_writel(0xffffffff, usb_mdio + USB_GMDIOGEN); 104 while (brcm_usb_readl(usb_mdio + USB_GMDIOCSR) & (1<<31)) 105 ; 106 brcm_usb_writel(0x69020000 | (addr << 18), usb_mdio + USB_GMDIOGEN); 107 while (brcm_usb_readl(usb_mdio + USB_GMDIOCSR) & (1<<31)) 108 ; 109 brcm_usb_writel(0x00000000, usb_mdio + USB_GMDIOGEN); 110 while (brcm_usb_readl(usb_mdio + USB_GMDIOCSR) & (1<<31)) 111 ; 112 return brcm_usb_readl(usb_mdio + USB_GMDIOCSR) & 0xffff; 113 } 114 115 static void usb2_eye_fix_7211b0(struct brcm_usb_init_params *params) 116 { 117 /* select bank */ 118 usb_mdio_write_7211b0(params, 0x1f, 0x80a0); 119 120 /* Set the eye */ 121 usb_mdio_write_7211b0(params, 0x0a, 0xc6a0); 122 } 123 124 static void xhci_soft_reset(struct brcm_usb_init_params *params, 125 int on_off) 126 { 127 void __iomem *ctrl = params->regs[BRCM_REGS_CTRL]; 128 129 /* Assert reset */ 130 if (on_off) 131 USB_CTRL_UNSET(ctrl, USB_PM, XHC_SOFT_RESETB); 132 /* De-assert reset */ 133 else 134 USB_CTRL_SET(ctrl, USB_PM, XHC_SOFT_RESETB); 135 } 136 137 static void usb_init_ipp(struct brcm_usb_init_params *params) 138 { 139 void __iomem *ctrl = params->regs[BRCM_REGS_CTRL]; 140 u32 reg; 141 u32 orig_reg; 142 143 pr_debug("%s\n", __func__); 144 145 orig_reg = reg = brcm_usb_readl(USB_CTRL_REG(ctrl, SETUP)); 146 if (params->ipp != 2) 147 /* override ipp strap pin (if it exits) */ 148 reg &= ~(USB_CTRL_MASK(SETUP, STRAP_IPP_SEL)); 149 150 /* Override the default OC and PP polarity */ 151 reg &= ~(USB_CTRL_MASK(SETUP, IPP) | USB_CTRL_MASK(SETUP, IOC)); 152 if (params->ioc) 153 reg |= USB_CTRL_MASK(SETUP, IOC); 154 if (params->ipp == 1) 155 reg |= USB_CTRL_MASK(SETUP, IPP); 156 brcm_usb_writel(reg, USB_CTRL_REG(ctrl, SETUP)); 157 158 /* 159 * If we're changing IPP, make sure power is off long enough 160 * to turn off any connected devices. 161 */ 162 if ((reg ^ orig_reg) & USB_CTRL_MASK(SETUP, IPP)) 163 msleep(50); 164 } 165 166 static void syscon_piarbctl_init(struct regmap *rmap) 167 { 168 /* Switch from legacy USB OTG controller to new STB USB controller */ 169 regmap_update_bits(rmap, PIARBCTL_MISC, PIARBCTL_MISC_USB_ONLY_MASK, 170 PIARBCTL_MISC_USB_SELECT_MASK | 171 PIARBCTL_MISC_USB_4G_SDRAM_MASK); 172 } 173 174 static void usb_init_common(struct brcm_usb_init_params *params) 175 { 176 u32 reg; 177 void __iomem *ctrl = params->regs[BRCM_REGS_CTRL]; 178 179 pr_debug("%s\n", __func__); 180 181 USB_CTRL_UNSET(ctrl, USB_PM, USB_PWRDN); 182 /* 1 millisecond - for USB clocks to settle down */ 183 usleep_range(1000, 2000); 184 185 if (USB_CTRL_MASK(USB_DEVICE_CTL1, PORT_MODE)) { 186 reg = brcm_usb_readl(USB_CTRL_REG(ctrl, USB_DEVICE_CTL1)); 187 reg &= ~USB_CTRL_MASK(USB_DEVICE_CTL1, PORT_MODE); 188 reg |= params->mode; 189 brcm_usb_writel(reg, USB_CTRL_REG(ctrl, USB_DEVICE_CTL1)); 190 } 191 switch (params->mode) { 192 case USB_CTLR_MODE_HOST: 193 USB_CTRL_UNSET(ctrl, USB_PM, BDC_SOFT_RESETB); 194 break; 195 default: 196 USB_CTRL_UNSET(ctrl, USB_PM, BDC_SOFT_RESETB); 197 USB_CTRL_SET(ctrl, USB_PM, BDC_SOFT_RESETB); 198 break; 199 } 200 } 201 202 static void usb_init_common_7211b0(struct brcm_usb_init_params *params) 203 { 204 void __iomem *ctrl = params->regs[BRCM_REGS_CTRL]; 205 void __iomem *usb_phy = params->regs[BRCM_REGS_USB_PHY]; 206 void __iomem *bdc_ec = params->regs[BRCM_REGS_BDC_EC]; 207 int timeout_ms = PHY_LOCK_TIMEOUT_MS; 208 u32 reg; 209 210 if (params->syscon_piarbctl) 211 syscon_piarbctl_init(params->syscon_piarbctl); 212 213 /* Init the PHY */ 214 reg = brcm_usb_readl(usb_phy + USB_PHY_PLL_LDO_CTL); 215 reg |= USB_PHY_PLL_LDO_CTL_AFE_CORERDY_MASK; 216 brcm_usb_writel(reg, usb_phy + USB_PHY_PLL_LDO_CTL); 217 218 /* wait for lock */ 219 while (timeout_ms-- > 0) { 220 reg = brcm_usb_readl(usb_phy + USB_PHY_STATUS); 221 if (reg & USB_PHY_STATUS_pll_lock_MASK) 222 break; 223 usleep_range(1000, 2000); 224 } 225 226 /* Set the PHY_MODE */ 227 reg = brcm_usb_readl(usb_phy + USB_PHY_UTMI_CTL_1); 228 reg &= ~USB_PHY_UTMI_CTL_1_PHY_MODE_MASK; 229 reg |= params->mode << USB_PHY_UTMI_CTL_1_PHY_MODE_SHIFT; 230 brcm_usb_writel(reg, usb_phy + USB_PHY_UTMI_CTL_1); 231 232 /* Fix the incorrect default */ 233 reg = brcm_usb_readl(ctrl + USB_CTRL_SETUP); 234 reg &= ~USB_CTRL_SETUP_tca_drv_sel_MASK; 235 brcm_usb_writel(reg, ctrl + USB_CTRL_SETUP); 236 237 usb_init_common(params); 238 239 /* 240 * The BDC controller will get occasional failures with 241 * the default "Read Transaction Size" of 6 (1024 bytes). 242 * Set it to 4 (256 bytes). 243 */ 244 if ((params->mode != USB_CTLR_MODE_HOST) && bdc_ec) { 245 reg = brcm_usb_readl(bdc_ec + BDC_EC_AXIRDA); 246 reg &= ~BDC_EC_AXIRDA_RTS_MASK; 247 reg |= (0x4 << BDC_EC_AXIRDA_RTS_SHIFT); 248 brcm_usb_writel(reg, bdc_ec + BDC_EC_AXIRDA); 249 } 250 251 /* 252 * Disable FSM, otherwise the PHY will auto suspend when no 253 * device is connected and will be reset on resume. 254 */ 255 reg = brcm_usb_readl(usb_phy + USB_PHY_UTMI_CTL_1); 256 reg &= ~USB_PHY_UTMI_CTL_1_POWER_UP_FSM_EN_MASK; 257 brcm_usb_writel(reg, usb_phy + USB_PHY_UTMI_CTL_1); 258 259 usb2_eye_fix_7211b0(params); 260 } 261 262 static void usb_init_xhci(struct brcm_usb_init_params *params) 263 { 264 pr_debug("%s\n", __func__); 265 266 xhci_soft_reset(params, 0); 267 } 268 269 static void usb_uninit_common(struct brcm_usb_init_params *params) 270 { 271 void __iomem *ctrl = params->regs[BRCM_REGS_CTRL]; 272 273 pr_debug("%s\n", __func__); 274 275 USB_CTRL_SET(ctrl, USB_PM, USB_PWRDN); 276 277 } 278 279 static void usb_uninit_xhci(struct brcm_usb_init_params *params) 280 { 281 282 pr_debug("%s\n", __func__); 283 284 xhci_soft_reset(params, 1); 285 } 286 287 static int usb_get_dual_select(struct brcm_usb_init_params *params) 288 { 289 void __iomem *ctrl = params->regs[BRCM_REGS_CTRL]; 290 u32 reg = 0; 291 292 pr_debug("%s\n", __func__); 293 294 reg = brcm_usb_readl(USB_CTRL_REG(ctrl, USB_DEVICE_CTL1)); 295 reg &= USB_CTRL_MASK(USB_DEVICE_CTL1, PORT_MODE); 296 return reg; 297 } 298 299 static void usb_set_dual_select(struct brcm_usb_init_params *params, int mode) 300 { 301 void __iomem *ctrl = params->regs[BRCM_REGS_CTRL]; 302 u32 reg; 303 304 pr_debug("%s\n", __func__); 305 306 reg = brcm_usb_readl(USB_CTRL_REG(ctrl, USB_DEVICE_CTL1)); 307 reg &= ~USB_CTRL_MASK(USB_DEVICE_CTL1, PORT_MODE); 308 reg |= mode; 309 brcm_usb_writel(reg, USB_CTRL_REG(ctrl, USB_DEVICE_CTL1)); 310 } 311 312 313 static const struct brcm_usb_init_ops bcm7216_ops = { 314 .init_ipp = usb_init_ipp, 315 .init_common = usb_init_common, 316 .init_xhci = usb_init_xhci, 317 .uninit_common = usb_uninit_common, 318 .uninit_xhci = usb_uninit_xhci, 319 .get_dual_select = usb_get_dual_select, 320 .set_dual_select = usb_set_dual_select, 321 }; 322 323 static const struct brcm_usb_init_ops bcm7211b0_ops = { 324 .init_ipp = usb_init_ipp, 325 .init_common = usb_init_common_7211b0, 326 .init_xhci = usb_init_xhci, 327 .uninit_common = usb_uninit_common, 328 .uninit_xhci = usb_uninit_xhci, 329 .get_dual_select = usb_get_dual_select, 330 .set_dual_select = usb_set_dual_select, 331 }; 332 333 void brcm_usb_dvr_init_7216(struct brcm_usb_init_params *params) 334 { 335 336 pr_debug("%s\n", __func__); 337 338 params->family_name = "7216"; 339 params->ops = &bcm7216_ops; 340 } 341 342 void brcm_usb_dvr_init_7211b0(struct brcm_usb_init_params *params) 343 { 344 345 pr_debug("%s\n", __func__); 346 347 params->family_name = "7211"; 348 params->ops = &bcm7211b0_ops; 349 } 350