Revision tags: v3.10-rc4, v3.10-rc3, v3.10-rc2, v3.10-rc1, v3.9, v3.9-rc8, v3.9-rc7, v3.9-rc6, v3.9-rc5, v3.9-rc4, v3.9-rc3, v3.9-rc2, v3.9-rc1, v3.8, v3.8-rc7, v3.8-rc6, v3.8-rc5, v3.8-rc4, v3.8-rc3, v3.8-rc2, v3.8-rc1, v3.7, v3.7-rc8, v3.7-rc7, v3.7-rc6, v3.7-rc5, v3.7-rc4, v3.7-rc3, v3.7-rc2, v3.7-rc1 |
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#
0ca7111a |
| 14-Oct-2012 |
Matus Ujhelyi <ujhelyi.m@gmail.com> |
phy: add AT803x driver
This driver add support for wake over lan on AT803x phys.
Signed-off-by: Matus Ujhelyi <ujhelyi.m@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Revision tags: v5.8.17, v5.8.16, v5.8.15, v5.9, v5.8.14, v5.8.13, v5.8.12, v5.8.11, v5.8.10, v5.8.9, v5.8.8, v5.8.7, v5.8.6, v5.4.62, v5.8.5 |
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#
3faaf539 |
| 26-Aug-2020 |
Rikard Falkeborn <rikard.falkeborn@gmail.com> |
net: phy: at803x: constify static regulator_ops The only usage of vddio_regulator_ops and vddh_regulator_ops is to assign their address to the ops field in the regulator_desc struct,
net: phy: at803x: constify static regulator_ops The only usage of vddio_regulator_ops and vddh_regulator_ops is to assign their address to the ops field in the regulator_desc struct, which is a const pointer. Make them const to allow the compiler to put them in read-only memory. Signed-off-by: Rikard Falkeborn <rikard.falkeborn@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Revision tags: v5.8.4, v5.4.61, v5.8.3, v5.4.60, v5.8.2, v5.4.59, v5.8.1, v5.4.58, v5.4.57, v5.4.56, v5.8, v5.7.12, v5.4.55, v5.7.11, v5.4.54, v5.7.10, v5.4.53 |
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#
7dce80c2 |
| 19-Jul-2020 |
Oleksij Rempel <o.rempel@pengutronix.de> |
net: phy: at803x: add mdix configuration support for AR9331 and AR8035 This patch add MDIX configuration ability for AR9331 and AR8035. Theoretically it should work on other Atheros PHYs
net: phy: at803x: add mdix configuration support for AR9331 and AR8035 This patch add MDIX configuration ability for AR9331 and AR8035. Theoretically it should work on other Atheros PHYs, but I was able to test only this two. Since I have no certified reference HW able to detect or configure MDIX, this functionality was confirmed by oscilloscope. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
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Revision tags: v5.4.52, v5.7.9, v5.7.8, v5.4.51 |
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3f2edd30 |
| 06-Jul-2020 |
Andrew Lunn <andrew@lunn.ch> |
net: phy: at803x: Avoid comparison is always false warning By placing the GENMASK value into an unsigned int and then passing it to PREF_FIELD, the type is reduces down from ULL. Given t
net: phy: at803x: Avoid comparison is always false warning By placing the GENMASK value into an unsigned int and then passing it to PREF_FIELD, the type is reduces down from ULL. Given the reduced size of the type, the range checks in PREP_FAIL() are always true, and -Wtype-limits then gives a warning. By skipping the intermediate variable, the warning can be avoided. Reviewed-by: Jakub Kicinski <kuba@kernel.org> Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
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Revision tags: v5.4.50, v5.7.7, v5.4.49, v5.7.6, v5.7.5, v5.4.48, v5.7.4, v5.7.3, v5.4.47, v5.4.46, v5.7.2, v5.4.45, v5.7.1, v5.4.44, v5.7, v5.4.43 |
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#
dc0f3ed1 |
| 27-May-2020 |
Oleksij Rempel <o.rempel@pengutronix.de> |
net: phy: at803x: add cable diagnostics support for ATH9331 and ATH8032 Add support for Atheros 100Base-T PHYs. The only difference seems to be the ability to test 2 pairs instead of 4 a
net: phy: at803x: add cable diagnostics support for ATH9331 and ATH8032 Add support for Atheros 100Base-T PHYs. The only difference seems to be the ability to test 2 pairs instead of 4 and the lack of 1000Base-T specific register. Only the ATH9331 was tested with this patch. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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#
0465d8f8 |
| 22-May-2020 |
Michael Walle <michael@walle.cc> |
net: phy: at803x: fix PHY ID masks Ever since its first commit 0ca7111a38f05 ("phy: add AT803x driver") the PHY ID mask was set to 0xffffffef. It is unclear to me why this mask was c
net: phy: at803x: fix PHY ID masks Ever since its first commit 0ca7111a38f05 ("phy: add AT803x driver") the PHY ID mask was set to 0xffffffef. It is unclear to me why this mask was chosen in the first place. Both the AR8031/AR8033 and the AR8035 datasheets mention it is always the given value: - for AR8031/AR8033 its 0x004d/0xd074 - for AR8035 its 0x004d/0xd072 Unfortunately, I don't have a datasheet for the AR8030. Therefore, we leave its PHY ID mask untouched. For the PHYs mentioned before use the handy PHY_ID_MATCH_EXACT() macro. I've tried to contact the author of the initial commit, but received no answer so far. Cc: Matus Ujhelyi <ujhelyi.m@gmail.com> Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: David S. Miller <davem@davemloft.net>
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Revision tags: v5.4.42, v5.4.41 |
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#
6cb75767 |
| 13-May-2020 |
Michael Walle <michael@walle.cc> |
net: phy: at803x: add cable diagnostics support The AR8031/AR8033 and the AR8035 support cable diagnostics. Adding driver support is straightforward, so lets add it. The PHY jus
net: phy: at803x: add cable diagnostics support The AR8031/AR8033 and the AR8035 support cable diagnostics. Adding driver support is straightforward, so lets add it. The PHY just do one pair at a time, so we have to start the test four times. The cable_test_get_status() can block and therefore we can just busy poll the test completion and continue with the next pair until we are done. The time delta counter seems to run at 125MHz which just gives us a resolution of about 82.4cm per tick. 100m cable, A/B/C/D open: Cable test started for device eth0. Cable test completed for device eth0. Pair: Pair A, result: Open Circuit Pair: Pair A, fault length: 107.94m Pair: Pair B, result: Open Circuit Pair: Pair B, fault length: 104.64m Pair: Pair C, result: Open Circuit Pair: Pair C, fault length: 105.47m Pair: Pair D, result: Open Circuit Pair: Pair D, fault length: 107.94m 1m cable, A/B connected, C shorted, D open: Cable test started for device eth0. Cable test completed for device eth0. Pair: Pair A, result: OK Pair: Pair B, result: OK Pair: Pair C, result: Short within Pair Pair: Pair C, fault length: 0.82m Pair: Pair D, result: Open Circuit Pair: Pair D, fault length: 0.82m Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Revision tags: v5.4.40, v5.4.39, v5.4.38, v5.4.37, v5.4.36 |
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cde0f4f8 |
| 28-Apr-2020 |
Michael Walle <michael@walle.cc> |
net: phy: at803x: add downshift support The AR8031 and AR8035 support the link speed downshift. Add driver support for it. One peculiarity of these PHYs is that it needs a software r
net: phy: at803x: add downshift support The AR8031 and AR8035 support the link speed downshift. Add driver support for it. One peculiarity of these PHYs is that it needs a software reset after changing the setting, thus add the .soft_reset() op and do a phy_init_hw() if necessary. This was tested on a custom board with the AR8031. Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
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Revision tags: v5.4.35, v5.4.34 |
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#
5800091a |
| 17-Apr-2020 |
David Bauer <mail@david-bauer.net> |
net: phy: at803x: add support for AR8032 PHY This adds support for the Qualcomm Atheros AR8032 Fast Ethernet PHY. It shares many similarities with the already supported AR8030 PHY b
net: phy: at803x: add support for AR8032 PHY This adds support for the Qualcomm Atheros AR8032 Fast Ethernet PHY. It shares many similarities with the already supported AR8030 PHY but additionally supports MII connection to the MAC. Signed-off-by: David Bauer <mail@david-bauer.net> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
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Revision tags: v5.4.33, v5.4.32, v5.4.31, v5.4.30 |
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#
b1f4c209 |
| 01-Apr-2020 |
Oleksij Rempel <o.rempel@pengutronix.de> |
net: phy: at803x: fix clock sink configuration on ATH8030 and ATH8035 The masks in priv->clk_25m_reg and priv->clk_25m_mask are one-bits-set for the values that comprise the fields, not
net: phy: at803x: fix clock sink configuration on ATH8030 and ATH8035 The masks in priv->clk_25m_reg and priv->clk_25m_mask are one-bits-set for the values that comprise the fields, not zero-bits-set. This patch fixes the clock frequency configuration for ATH8030 and ATH8035 Atheros PHYs by removing the erroneous "~". To reproduce this bug, configure the PHY with the device tree binding "qca,clk-out-frequency" and remove the machine specific PHY fixups. Fixes: 2f664823a47021 ("net: phy: at803x: add device tree binding") Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Reported-by: Russell King <rmk+kernel@armlinux.org.uk> Reviewed-by: Russell King <rmk+kernel@armlinux.org.uk> Tested-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: David S. Miller <davem@davemloft.net>
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Revision tags: v5.4.29, v5.6, v5.4.28, v5.4.27, v5.4.26, v5.4.25, v5.4.24, v5.4.23, v5.4.22, v5.4.21, v5.4.20, v5.4.19, v5.4.18, v5.4.17 |
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#
2318ca8a |
| 30-Jan-2020 |
Michael Walle <michael@walle.cc> |
net: phy: at803x: disable vddio regulator The probe() might enable a VDDIO regulator, which needs to be disabled again before calling regulator_put(). Add a remove() function. F
net: phy: at803x: disable vddio regulator The probe() might enable a VDDIO regulator, which needs to be disabled again before calling regulator_put(). Add a remove() function. Fixes: 2f664823a470 ("net: phy: at803x: add device tree binding") Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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Revision tags: v5.4.16, v5.5, v5.4.15, v5.4.14, v5.4.13, v5.4.12, v5.4.11, v5.4.10, v5.4.9, v5.4.8, v5.4.7, v5.4.6, v5.4.5, v5.4.4, v5.4.3, v5.3.15, v5.4.2, v5.4.1, v5.3.14, v5.4, v5.3.13, v5.3.12, v5.3.11, v5.3.10 |
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#
ed7fa2ad |
| 06-Nov-2019 |
Michael Walle <michael@walle.cc> |
net: phy: at803x: remove config_init for AR9331 According to its datasheet, the internal PHY doesn't have debug registers nor MMDs. Since config_init() only configures delays and clo
net: phy: at803x: remove config_init for AR9331 According to its datasheet, the internal PHY doesn't have debug registers nor MMDs. Since config_init() only configures delays and clocks and so on in these registers it won't be needed on this PHY. Remove it. Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
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#
96c36712 |
| 06-Nov-2019 |
Michael Walle <michael@walle.cc> |
net: phy: at803x: fix the PHY names Fix at least the displayed strings. The actual name of the chip is AR803x. Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: A
net: phy: at803x: fix the PHY names Fix at least the displayed strings. The actual name of the chip is AR803x. Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
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#
428061f7 |
| 06-Nov-2019 |
Michael Walle <michael@walle.cc> |
net: phy: at803x: mention AR8033 as same as AR8031 The AR8033 is the AR8031 without PTP support. All other registers are the same. Unfortunately, they share the same PHY ID. Therefore, w
net: phy: at803x: mention AR8033 as same as AR8031 The AR8033 is the AR8031 without PTP support. All other registers are the same. Unfortunately, they share the same PHY ID. Therefore, we cannot distinguish between the one with PTP support and the one without. Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
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#
2f664823 |
| 06-Nov-2019 |
Michael Walle <michael@walle.cc> |
net: phy: at803x: add device tree binding Add support for configuring the CLK_25M pin as well as the RGMII I/O voltage by the device tree. Signed-off-by: Michael Walle <michael@
net: phy: at803x: add device tree binding Add support for configuring the CLK_25M pin as well as the RGMII I/O voltage by the device tree. Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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#
6f4c930e |
| 05-Oct-2019 |
David S. Miller <davem@davemloft.net> |
Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net
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Revision tags: v5.3.9, v5.3.8, v5.3.7, v5.3.6, v5.3.5, v5.3.4, v5.3.3 |
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06d5f344 |
| 04-Oct-2019 |
Russell King <rmk+kernel@armlinux.org.uk> |
net: phy: at803x: use operating parameters from PHY-specific status Read the PHY-specific status register for the current operating mode (speed and duplex) of the PHY. This register ref
net: phy: at803x: use operating parameters from PHY-specific status Read the PHY-specific status register for the current operating mode (speed and duplex) of the PHY. This register reflects the actual mode that the PHY has resolved depending on either the advertisements of autoneg is enabled, or the forced mode if autoneg is disabled. This ensures that phylib's software state always tracks the hardware state. It seems both AR8033 (which uses the AR8031 ID) and AR8035 support this status register. AR8030 is not known at the present time. This patch depends on "net: phy: extract pause mode" and "net: phy: extract link partner advertisement reading". Reported-by: tinywrkb <tinywrkb@gmail.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Tested-by: tinywrkb <tinywrkb@gmail.com> Fixes: 5502b218e001 ("net: phy: use phy_resolve_aneg_linkmode in genphy_read_status") Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: David S. Miller <davem@davemloft.net>
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#
7271df0b |
| 03-Oct-2019 |
Oleksij Rempel <o.rempel@pengutronix.de> |
net: phy: at803x: remove probe and struct at803x_priv struct at803x_priv is never used in this driver. So remove it and the probe function allocating it. Suggested-by: Heiner Ka
net: phy: at803x: remove probe and struct at803x_priv struct at803x_priv is never used in this driver. So remove it and the probe function allocating it. Suggested-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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#
7908d2ce |
| 03-Oct-2019 |
Oleksij Rempel <o.rempel@pengutronix.de> |
net: phy: at803x: add ar9331 support Mostly this hardware can work with generic PHY driver, but this change is needed to provided interrupt handling support. Tested with dsa ar9331-s
net: phy: at803x: add ar9331 support Mostly this hardware can work with generic PHY driver, but this change is needed to provided interrupt handling support. Tested with dsa ar9331-switch driver. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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446bf64b |
| 19-Aug-2019 |
David S. Miller <davem@davemloft.net> |
Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net Merge conflict of mlx5 resolved using instructions in merge commit 9566e650bf7fdf58384bb06df634f7531ca3a97e. Signe
Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net Merge conflict of mlx5 resolved using instructions in merge commit 9566e650bf7fdf58384bb06df634f7531ca3a97e. Signed-off-by: David S. Miller <davem@davemloft.net>
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Revision tags: v5.3.2, v5.3.1, v5.3, v5.2.14, v5.3-rc8, v5.2.13, v5.2.12, v5.2.11, v5.2.10 |
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c227ce44 |
| 17-Aug-2019 |
Heiner Kallweit <hkallweit1@gmail.com> |
net: phy: remove calls to genphy_config_init Supported PHY features are either auto-detected or explicitly set. In both cases calling genphy_config_init isn't needed. All that genphy
net: phy: remove calls to genphy_config_init Supported PHY features are either auto-detected or explicitly set. In both cases calling genphy_config_init isn't needed. All that genphy_config_init does is removing features that are set as supported but can't be auto-detected. Basically it duplicates the code in genphy_read_abilities. Therefore remove such calls from all PHY drivers. v2: - remove call also from new adin PHY driver v3: - pass NULL as config_init function pointer for dp83848 Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Revision tags: v5.2.9, v5.2.8 |
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#
bb0ce4c1 |
| 09-Aug-2019 |
André Draszik <git@andred.net> |
net: phy: at803x: stop switching phy delay config needlessly This driver does a funny dance disabling and re-enabling RX and/or TX delays. In any of the RGMII-ID modes, it first disa
net: phy: at803x: stop switching phy delay config needlessly This driver does a funny dance disabling and re-enabling RX and/or TX delays. In any of the RGMII-ID modes, it first disables the delays, just to re-enable them again right away. This looks like a needless exercise. Just enable the respective delays when in any of the relevant 'id' modes, and disable them otherwise. Also, remove comments which don't add anything that can't be seen by looking at the code. Signed-off-by: André Draszik <git@andred.net> CC: Andrew Lunn <andrew@lunn.ch> CC: Florian Fainelli <f.fainelli@gmail.com> CC: Heiner Kallweit <hkallweit1@gmail.com> CC: "David S. Miller" <davem@davemloft.net> CC: netdev@vger.kernel.org Signed-off-by: David S. Miller <davem@davemloft.net>
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Revision tags: v5.2.7, v5.2.6, v5.2.5, v5.2.4, v5.2.3, v5.2.2, v5.2.1, v5.2, v5.1.16, v5.1.15, v5.1.14, v5.1.13, v5.1.12, v5.1.11, v5.1.10, v5.1.9, v5.1.8, v5.1.7, v5.1.6, v5.1.5, v5.1.4, v5.1.3, v5.1.2, v5.1.1, v5.0.14, v5.1, v5.0.13, v5.0.12, v5.0.11, v5.0.10, v5.0.9 |
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#
6110ed2d |
| 17-Apr-2019 |
David Bauer <mail@david-bauer.net> |
net: mdio: rename mdio_device reset to reset_gpio This renames the GPIO reset of mdio devices from 'reset' to 'reset_gpio' to better differentiate between GPIO and reset-controller d
net: mdio: rename mdio_device reset to reset_gpio This renames the GPIO reset of mdio devices from 'reset' to 'reset_gpio' to better differentiate between GPIO and reset-controller driven reset line. Signed-off-by: David Bauer <mail@david-bauer.net> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
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Revision tags: v5.0.8 |
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#
dcdecdcf |
| 12-Apr-2019 |
Heiner Kallweit <hkallweit1@gmail.com> |
net: phy: switch drivers to use dynamic feature detection Recently genphy_read_abilities() has been added that dynamically detects clause 22 PHY abilities. I *think* this detection shoul
net: phy: switch drivers to use dynamic feature detection Recently genphy_read_abilities() has been added that dynamically detects clause 22 PHY abilities. I *think* this detection should work with all supported PHY's, at least for the ones with basic features sets, i.e. PHY_BASIC_FEATURES and PHY_GBIT_FEATURES. So let's remove setting these features explicitly and rely on phylib feature detection. I don't have access to most of these PHY's, therefore I'd appreciate regression testing. v2: - make the feature constant a comment so that readers know which features are supported by the respective PHY Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Tested-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
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Revision tags: v5.0.7, v5.0.6, v5.0.5, v5.0.4 |
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#
5c5f626b |
| 19-Mar-2019 |
Heiner Kallweit <hkallweit1@gmail.com> |
net: phy: improve handling link_change_notify callback Currently the Phy driver's link_change_notify callback is called whenever the state machine is run (every second if polling), no ma
net: phy: improve handling link_change_notify callback Currently the Phy driver's link_change_notify callback is called whenever the state machine is run (every second if polling), no matter whether the state changed or not. This isn't needed and may confuse users considering the name of the callback. Actually it contradicts its kernel-doc description. Therefore let's change the behavior and call this callback only in case of an actual state change. This requires changes to the at803x and rockchip drivers. at803x can be simplified so that it reacts on a state change to PHY_NOLINK only. The rockchip driver can also be much simplified. We simply re-init the AFE/DSP registers whenever we change to PHY_RUNNING and speed is 100Mbps. This causes very small overhead because we do this even if the speed was 100Mbps already. But this is negligible and I think justified by the much simpler code. Changes are compile-tested only. A little bit problematic seems to be to find somebody with the hardware to test the changes to the two PHY drivers. See also [0]. David may be able to test the Rockchip driver. [0] https://marc.info/?t=153782508800006&r=1&w=2 Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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