Revision tags: v6.6.25, v6.6.24, v6.6.23, v6.6.16, v6.6.15, v6.6.14, v6.6.13, v6.6.12, v6.6.11, v6.6.10, v6.6.9, v6.6.8, v6.6.7, v6.6.6, v6.6.5 |
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#
909f5a48 |
| 07-Dec-2023 |
Kalesh AP <kalesh-anakkur.purayil@broadcom.com> |
bnxt_en: Fix wrong return value check in bnxt_close_nic()
[ Upstream commit bd6781c18cb5b5e5d8c5873fa9a51668e89ec76e ]
The wait_event_interruptible_timeout() function returns 0 if the timeout elaps
bnxt_en: Fix wrong return value check in bnxt_close_nic()
[ Upstream commit bd6781c18cb5b5e5d8c5873fa9a51668e89ec76e ]
The wait_event_interruptible_timeout() function returns 0 if the timeout elapsed, -ERESTARTSYS if it was interrupted by a signal, and the remaining jiffies otherwise if the condition evaluated to true before the timeout elapsed.
Driver should have checked for zero return value instead of a positive value.
MChan: Print a warning for -ERESTARTSYS. The close operation will proceed anyway when wait_event_interruptible_timeout() returns for any reason. Since we do the close no matter what, we should not return this error code to the caller. Change bnxt_close_nic() to a void function and remove all error handling from some of the callers.
Fixes: c0c050c58d84 ("bnxt_en: New Broadcom ethernet driver.") Reviewed-by: Andy Gospodarek <andrew.gospodarek@broadcom.com> Reviewed-by: Vikas Gupta <vikas.gupta@broadcom.com> Reviewed-by: Somnath Kotur <somnath.kotur@broadcom.com> Signed-off-by: Kalesh AP <kalesh-anakkur.purayil@broadcom.com> Signed-off-by: Michael Chan <michael.chan@broadcom.com> Link: https://lore.kernel.org/r/20231208001658.14230-4-michael.chan@broadcom.com Signed-off-by: Jakub Kicinski <kuba@kernel.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
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Revision tags: v6.6.4, v6.6.3, v6.6.2, v6.5.11, v6.6.1, v6.5.10, v6.6, v6.5.9, v6.5.8, v6.5.7, v6.5.6, v6.5.5, v6.5.4, v6.5.3, v6.5.2, v6.1.51, v6.5.1, v6.1.50, v6.5, v6.1.49, v6.1.48, v6.1.46, v6.1.45, v6.1.44, v6.1.43, v6.1.42, v6.1.41, v6.1.40, v6.1.39, v6.1.38, v6.1.37, v6.1.36, v6.4, v6.1.35, v6.1.34, v6.1.33 |
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#
319a7827 |
| 07-Jun-2023 |
Pavan Chebbi <pavan.chebbi@broadcom.com> |
bnxt_en: Prevent kernel panic when receiving unexpected PHC_UPDATE event
The firmware can send PHC_RTC_UPDATE async event on a PF that may not have PTP registered. In such a case, there will be a nu
bnxt_en: Prevent kernel panic when receiving unexpected PHC_UPDATE event
The firmware can send PHC_RTC_UPDATE async event on a PF that may not have PTP registered. In such a case, there will be a null pointer deference for bp->ptp_cfg when we try to handle the event.
Fix it by not registering for this event with the firmware if !bp->ptp_cfg. Also, check that bp->ptp_cfg is valid before proceeding when we receive the event.
Fixes: 8bcf6f04d4a5 ("bnxt_en: Handle async event when the PHC is updated in RTC mode") Signed-off-by: Pavan Chebbi <pavan.chebbi@broadcom.com> Signed-off-by: Michael Chan <michael.chan@broadcom.com> Signed-off-by: Paolo Abeni <pabeni@redhat.com>
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Revision tags: v6.1.32, v6.1.31, v6.1.30, v6.1.29, v6.1.28, v6.1.27, v6.1.26, v6.3, v6.1.25, v6.1.24, v6.1.23, v6.1.22, v6.1.21 |
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#
a02c3313 |
| 21-Mar-2023 |
Pavan Chebbi <pavan.chebbi@broadcom.com> |
bnxt: Enforce PTP software freq adjustments only when in non-RTC mode
Currently driver performs software based frequency adjustments when RTC capability is not discovered or when in shared PHC mode.
bnxt: Enforce PTP software freq adjustments only when in non-RTC mode
Currently driver performs software based frequency adjustments when RTC capability is not discovered or when in shared PHC mode. But there may be some old firmware versions that still support hardware freq adjustments without RTC capability being exposed. In this situation driver will use non-realtime mode even on single host NICs.
Hence enforce software frequency adjustments only when running in shared PHC mode. Make suitable changes for cyclecounter for the same.
Signed-off-by: Pavan Chebbi <pavan.chebbi@broadcom.com> Reviewed-by: Michael Chan <michael.chan@broadcom.com> Acked-by: Vadim Fedorenko <vadim.fedorenko@linux.dev> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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Revision tags: v6.1.20, v6.1.19, v6.1.18, v6.1.17 |
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131db499 |
| 10-Mar-2023 |
Vadim Fedorenko <vadfed@meta.com> |
bnxt_en: reset PHC frequency in free-running mode
When using a PHC in shared between multiple hosts, the previous frequency value may not be reset and could lead to host being unable to compensate t
bnxt_en: reset PHC frequency in free-running mode
When using a PHC in shared between multiple hosts, the previous frequency value may not be reset and could lead to host being unable to compensate the offset with timecounter adjustments. To avoid such state reset the hardware frequency of PHC to zero on init. Some refactoring is needed to make code readable.
Fixes: 85036aee1938 ("bnxt_en: Add a non-real time mode to access NIC clock") Signed-off-by: Vadim Fedorenko <vadfed@meta.com> Reviewed-by: Pavan Chebbi <pavan.chebbi@broadcom.com> Link: https://lore.kernel.org/r/20230310151356.678059-1-vadfed@meta.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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Revision tags: v6.1.16, v6.1.15, v6.1.14, v6.1.13, v6.2, v6.1.12, v6.1.11, v6.1.10, v6.1.9, v6.1.8, v6.1.7, v6.1.6, v6.1.5, v6.0.19, v6.0.18, v6.1.4, v6.1.3, v6.0.17, v6.1.2, v6.0.16, v6.1.1, v6.0.15, v6.0.14, v6.0.13, v6.1, v6.0.12, v6.0.11, v6.0.10, v5.15.80, v6.0.9, v5.15.79, v6.0.8, v5.15.78 |
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#
a29c132f |
| 09-Nov-2022 |
Jacob Keller <jacob.e.keller@intel.com> |
ptp: bnxt: convert .adjfreq to .adjfine
When the BNXT_FW_CAP_PTP_RTC flag is not set, the bnxt driver implements .adjfreq on a cyclecounter in terms of the straightforward "base * ppb / 1 billion" c
ptp: bnxt: convert .adjfreq to .adjfine
When the BNXT_FW_CAP_PTP_RTC flag is not set, the bnxt driver implements .adjfreq on a cyclecounter in terms of the straightforward "base * ppb / 1 billion" calculation. When BNXT_FW_CAP_PTP_RTC is set, the driver forwards the ppb value to firmware for configuration.
Convert the driver to the newer .adjfine interface, updating the cyclecounter calculation to use adjust_by_scaled_ppm to perform the calculation. Use scaled_ppm_to_ppb when forwarding the correction to firmware.
Signed-off-by: Jacob Keller <jacob.e.keller@intel.com> Cc: Michael Chan <michael.chan@broadcom.com> Cc: Richard Cochran <richardcochran@gmail.com> Reviewed-by: Pavan Chebbi <pavan.chebbi@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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#
85036aee |
| 06-Nov-2022 |
Pavan Chebbi <pavan.chebbi@broadcom.com> |
bnxt_en: Add a non-real time mode to access NIC clock
When using a PHC that is shared between multiple hosts, in order to achieve consistent timestamps across all hosts, we need to isolate the PHC f
bnxt_en: Add a non-real time mode to access NIC clock
When using a PHC that is shared between multiple hosts, in order to achieve consistent timestamps across all hosts, we need to isolate the PHC from any host making frequency adjustments.
This patch adds a non-real time mode for this purpose. The implementation is based on a free running NIC hardware timer which is used as the timestamper time-base. Each host implements individual adjustments to a local timecounter based on the NIC free running timer.
Cc: Richard Cochran <richardcochran@gmail.com> Signed-off-by: Pavan Chebbi <pavan.chebbi@broadcom.com> Reviewed-by: Andy Gospodarek <andrew.gospodarek@broadcom.com> Signed-off-by: Michael Chan <michael.chan@broadcom.com> Reviewed-by: Leon Romanovsky <leonro@nvidia.com> Signed-off-by: Paolo Abeni <pabeni@redhat.com>
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Revision tags: v6.0.7, v5.15.77, v5.15.76, v6.0.6, v6.0.5, v5.15.75, v6.0.4, v6.0.3, v6.0.2, v5.15.74, v5.15.73, v6.0.1, v5.15.72, v6.0, v5.15.71, v5.15.70 |
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8db3d514 |
| 22-Sep-2022 |
Vadim Fedorenko <vfedorenko@novek.ru> |
bnxt_en: replace reset with config timestamps
Any change to the hardware timestamps configuration triggers nic restart, which breaks transmition and reception of network packets for a while. But the
bnxt_en: replace reset with config timestamps
Any change to the hardware timestamps configuration triggers nic restart, which breaks transmition and reception of network packets for a while. But there is no need to fully restart the device because while configuring hardware timestamps. The code for changing configuration runs after all of the initialisation, when the NIC is actually up and running. This patch changes the code that ioctl will only update configuration registers and will not trigger carrier status change, but in case of timestamps for all rx packetes it fallbacks to close()/open() sequnce because of synchronization issues in the hardware. Tested on BCM57504.
Cc: Richard Cochran <richardcochran@gmail.com> Signed-off-by: Vadim Fedorenko <vfedorenko@novek.ru> Reviewed-by: Michael Chan <michael.chan@broadcom.com> Link: https://lore.kernel.org/r/20220922191038.29921-1-vfedorenko@novek.ru Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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Revision tags: v5.15.69 |
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ae8ffba8 |
| 15-Sep-2022 |
Vadim Fedorenko <vfedorenko@novek.ru> |
bnxt_en: fix flags to check for supported fw version
The warning message of unsupported FW appears every time RX timestamps are disabled on the interface. The patch fixes the flags to correct set fo
bnxt_en: fix flags to check for supported fw version
The warning message of unsupported FW appears every time RX timestamps are disabled on the interface. The patch fixes the flags to correct set for the check.
Fixes: 66ed81dcedc6 ("bnxt_en: Enable packet timestamping for all RX packets") Cc: Richard Cochran <richardcochran@gmail.com> Signed-off-by: Vadim Fedorenko <vfedorenko@novek.ru> Reviewed-by: Andy Gospodarek <gospo@broadcom.com> Reviewed-by: Michael Chan <michael.chan@broadcom.com> Link: https://lore.kernel.org/r/20220915234932.25497-1-vfedorenko@novek.ru Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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Revision tags: v5.15.68, v5.15.67, v5.15.66, v5.15.65, v5.15.64, v5.15.63, v5.15.62, v5.15.61, v5.15.60, v5.15.59, v5.19, v5.15.58, v5.15.57, v5.15.56, v5.15.55, v5.15.54 |
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#
ddde5412 |
| 11-Jul-2022 |
Pavan Chebbi <pavan.chebbi@broadcom.com> |
bnxt_en: Fix bnxt_refclk_read()
The upper 32-bit PHC register is not latched when reading the lower 32-bit PHC register. Current code leaves a small window where we may not read correct higher orde
bnxt_en: Fix bnxt_refclk_read()
The upper 32-bit PHC register is not latched when reading the lower 32-bit PHC register. Current code leaves a small window where we may not read correct higher order bits if the lower order bits are just about to wrap around.
This patch fixes this by reading higher order bits twice and makes sure that final value is correctly paired with its lower 32 bits.
Fixes: 30e96f487f64 ("bnxt_en: Do not read the PTP PHC during chip reset") Cc: Richard Cochran <richardcochran@gmail.com> Signed-off-by: Pavan Chebbi <pavan.chebbi@broadcom.com> Signed-off-by: Michael Chan <michael.chan@broadcom.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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Revision tags: v5.15.53, v5.15.52, v5.15.51, v5.15.50, v5.15.49, v5.15.48, v5.15.47, v5.15.46, v5.15.45, v5.15.44, v5.15.43, v5.15.42, v5.18, v5.15.41, v5.15.40 |
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#
66ed81dc |
| 12-May-2022 |
Pavan Chebbi <pavan.chebbi@broadcom.com> |
bnxt_en: Enable packet timestamping for all RX packets
Add driver support to enable timestamping on all RX packets that are received by the NIC. This capability can be requested by the applications
bnxt_en: Enable packet timestamping for all RX packets
Add driver support to enable timestamping on all RX packets that are received by the NIC. This capability can be requested by the applications using SIOCSHWTSTAMP ioctl with filter type HWTSTAMP_FILTER_ALL.
Cc: Richard Cochran <richardcochran@gmail.com> Signed-off-by: Pavan Chebbi <pavan.chebbi@broadcom.com> Signed-off-by: Michael Chan <michael.chan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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#
11862689 |
| 12-May-2022 |
Pavan Chebbi <pavan.chebbi@broadcom.com> |
bnxt_en: Configure ptp filters during bnxt open
For correctness, we need to configure the packet filters for timestamping during bnxt_open. This way they are always configured after firmware reset
bnxt_en: Configure ptp filters during bnxt open
For correctness, we need to configure the packet filters for timestamping during bnxt_open. This way they are always configured after firmware reset or chip reset. We should not assume that the filters will always be retained across resets.
This patch modifies the ioctl handler and always configures the PTP filters in the bnxt_open() path.
Cc: Richard Cochran <richardcochran@gmail.com> Signed-off-by: Pavan Chebbi <pavan.chebbi@broadcom.com> Signed-off-by: Michael Chan <michael.chan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Revision tags: v5.15.39, v5.15.38 |
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#
2b156fb5 |
| 02-May-2022 |
Michael Chan <michael.chan@broadcom.com> |
bnxt_en: Initiallize bp->ptp_lock first before using it
bnxt_ptp_init() calls bnxt_ptp_init_rtc() which will acquire the ptp_lock spinlock. The spinlock is not initialized until later. Move the bn
bnxt_en: Initiallize bp->ptp_lock first before using it
bnxt_ptp_init() calls bnxt_ptp_init_rtc() which will acquire the ptp_lock spinlock. The spinlock is not initialized until later. Move the bnxt_ptp_init_rtc() call after the spinlock is initialized.
Fixes: 24ac1ecd5240 ("bnxt_en: Add driver support to use Real Time Counter for PTP") Reviewed-by: Pavan Chebbi <pavan.chebbi@broadcom.com> Reviewed-by: Saravanan Vajravel <saravanan.vajravel@broadcom.com> Reviewed-by: Andy Gospodarek <andrew.gospodarek@broadcom.com> Reviewed-by: Somnath Kotur <somnath.kotur@broadcom.com> Reviewed-by: Damodharam Ammepalli <damodharam.ammepalli@broadcom.com> Signed-off-by: Michael Chan <michael.chan@broadcom.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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Revision tags: v5.15.37, v5.15.36, v5.15.35, v5.15.34, v5.15.33, v5.15.32 |
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#
dcf50006 |
| 28-Mar-2022 |
Damien Le Moal <damien.lemoal@opensource.wdc.com> |
net: bnxt_ptp: fix compilation error
The Broadcom bnxt_ptp driver does not compile with GCC 11.2.2 when CONFIG_WERROR is enabled. The following error is generated:
drivers/net/ethernet/broadcom/bnx
net: bnxt_ptp: fix compilation error
The Broadcom bnxt_ptp driver does not compile with GCC 11.2.2 when CONFIG_WERROR is enabled. The following error is generated:
drivers/net/ethernet/broadcom/bnxt/bnxt_ptp.c: In function ‘bnxt_ptp_enable’: drivers/net/ethernet/broadcom/bnxt/bnxt_ptp.c:400:43: error: array subscript 255 is above array bounds of ‘struct pps_pin[4]’ [-Werror=array-bounds] 400 | ptp->pps_info.pins[pin_id].event = BNXT_PPS_EVENT_EXTERNAL; | ~~~~~~~~~~~~~~~~~~^~~~~~~~ In file included from drivers/net/ethernet/broadcom/bnxt/bnxt_ptp.c:20: drivers/net/ethernet/broadcom/bnxt/bnxt_ptp.h:75:24: note: while referencing ‘pins’ 75 | struct pps_pin pins[BNXT_MAX_TSIO_PINS]; | ^~~~ cc1: all warnings being treated as errors
This is due to the function ptp_find_pin() returning a pin ID of -1 when a valid pin is not found and this error never being checked. Change the TSIO_PIN_VALID() function to also check that a pin ID is not negative and use this macro in bnxt_ptp_enable() to check the result of the calls to ptp_find_pin() to return an error early for invalid pins. This fixes the compilation error.
Cc: <stable@vger.kernel.org> Fixes: 9e518f25802c ("bnxt_en: 1PPS functions to configure TSIO pins") Signed-off-by: Damien Le Moal <damien.lemoal@opensource.wdc.com> Reviewed-by: Michael Chan <michael.chan@broadcom.com> Link: https://lore.kernel.org/r/20220328062708.207079-1-damien.lemoal@opensource.wdc.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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Revision tags: v5.15.31, v5.17, v5.15.30, v5.15.29, v5.15.28, v5.15.27, v5.15.26, v5.15.25, v5.15.24, v5.15.23, v5.15.22, v5.15.21, v5.15.20, v5.15.19, v5.15.18, v5.15.17 |
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#
e7b0afb6 |
| 25-Jan-2022 |
Pavan Chebbi <pavan.chebbi@broadcom.com> |
bnxt_en: Implement .adjtime() for PTP RTC mode
The adjusted time is set in the PHC in RTC mode. We also need to update the snapshots ptp->current_time and ptp->old_time when the time is adjusted.
bnxt_en: Implement .adjtime() for PTP RTC mode
The adjusted time is set in the PHC in RTC mode. We also need to update the snapshots ptp->current_time and ptp->old_time when the time is adjusted.
Cc: Richard Cochran <richardcochran@gmail.com> Reviewed-by: Somnath Kotur <somnath.kotur@broadcom.com> Signed-off-by: Pavan Chebbi <pavan.chebbi@broadcom.com> Signed-off-by: Michael Chan <michael.chan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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#
24ac1ecd |
| 25-Jan-2022 |
Pavan Chebbi <pavan.chebbi@broadcom.com> |
bnxt_en: Add driver support to use Real Time Counter for PTP
Add support for RTC mode if it is supported by firmware. In RTC mode, the PHC is set to the 64-bit clock. Because the legacy interface
bnxt_en: Add driver support to use Real Time Counter for PTP
Add support for RTC mode if it is supported by firmware. In RTC mode, the PHC is set to the 64-bit clock. Because the legacy interface is 48-bit, the driver still has to keep track of the upper 16 bits and handle the rollover.
Cc: Richard Cochran <richardcochran@gmail.com> Reviewed-by: Somnath Kotur <somnath.kotur@broadcom.com> Signed-off-by: Pavan Chebbi <pavan.chebbi@broadcom.com> Signed-off-by: Michael Chan <michael.chan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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#
740c342e |
| 25-Jan-2022 |
Pavan Chebbi <pavan.chebbi@broadcom.com> |
bnxt_en: PTP: Refactor PTP initialization functions
Making the ptp free and timecounter initialization code into separate functions so that later patches can use them.
Cc: Richard Cochran <richardc
bnxt_en: PTP: Refactor PTP initialization functions
Making the ptp free and timecounter initialization code into separate functions so that later patches can use them.
Cc: Richard Cochran <richardcochran@gmail.com> Signed-off-by: Pavan Chebbi <pavan.chebbi@broadcom.com> Signed-off-by: Michael Chan <michael.chan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Revision tags: v5.4.173, v5.15.16, v5.15.15, v5.16, v5.15.10, v5.15.9, v5.15.8 |
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#
9c9211a3 |
| 10-Dec-2021 |
Hangbin Liu <liuhangbin@gmail.com> |
net_tstamp: add new flag HWTSTAMP_FLAG_BONDED_PHC_INDEX
Since commit 94dd016ae538 ("bond: pass get_ts_info and SIOC[SG]HWTSTAMP ioctl to active device") the user could get bond active interface's PH
net_tstamp: add new flag HWTSTAMP_FLAG_BONDED_PHC_INDEX
Since commit 94dd016ae538 ("bond: pass get_ts_info and SIOC[SG]HWTSTAMP ioctl to active device") the user could get bond active interface's PHC index directly. But when there is a failover, the bond active interface will change, thus the PHC index is also changed. This may break the user's program if they did not update the PHC timely.
This patch adds a new hwtstamp_config flag HWTSTAMP_FLAG_BONDED_PHC_INDEX. When the user wants to get the bond active interface's PHC, they need to add this flag and be aware the PHC index may be changed.
With the new flag. All flag checks in current drivers are removed. Only the checking in net_hwtstamp_validate() is kept.
Suggested-by: Jakub Kicinski <kuba@kernel.org> Signed-off-by: Hangbin Liu <liuhangbin@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Revision tags: v5.15.7, v5.15.6, v5.15.5, v5.15.4, v5.15.3, v5.15.2, v5.15.1, v5.15 |
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#
228ea8c1 |
| 29-Oct-2021 |
Edwin Peer <edwin.peer@broadcom.com> |
bnxt_en: implement devlink dev reload driver_reinit
The RTNL lock must be held between down and up to prevent interleaving state changes, especially since external state changes might release and al
bnxt_en: implement devlink dev reload driver_reinit
The RTNL lock must be held between down and up to prevent interleaving state changes, especially since external state changes might release and allocate different driver resource subsets that would otherwise need to be tracked and carefully handled. If the down function fails, then devlink will not call the corresponding up function, thus the lock is released in the down error paths.
v2: Don't use devlink_reload_disable() and devlink_reload_enable(). Instead, check that the netdev is not in unregistered state before proceeding with reload.
Signed-off-by: Edwin Peer <edwin.peer@broadcom.com> Signed-Off-by: Michael Chan <michael.chan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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#
3852f048 |
| 11-Jul-2022 |
Pavan Chebbi <pavan.chebbi@broadcom.com> |
bnxt_en: Fix bnxt_refclk_read()
[ Upstream commit ddde5412fdaa5048bbca31529d46cb8da882870c ]
The upper 32-bit PHC register is not latched when reading the lower 32-bit PHC register. Current code l
bnxt_en: Fix bnxt_refclk_read()
[ Upstream commit ddde5412fdaa5048bbca31529d46cb8da882870c ]
The upper 32-bit PHC register is not latched when reading the lower 32-bit PHC register. Current code leaves a small window where we may not read correct higher order bits if the lower order bits are just about to wrap around.
This patch fixes this by reading higher order bits twice and makes sure that final value is correctly paired with its lower 32 bits.
Fixes: 30e96f487f64 ("bnxt_en: Do not read the PTP PHC during chip reset") Cc: Richard Cochran <richardcochran@gmail.com> Signed-off-by: Pavan Chebbi <pavan.chebbi@broadcom.com> Signed-off-by: Michael Chan <michael.chan@broadcom.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
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#
3852f048 |
| 11-Jul-2022 |
Pavan Chebbi <pavan.chebbi@broadcom.com> |
bnxt_en: Fix bnxt_refclk_read()
[ Upstream commit ddde5412fdaa5048bbca31529d46cb8da882870c ]
The upper 32-bit PHC register is not latched when reading the lower 32-bit PHC register. Current code l
bnxt_en: Fix bnxt_refclk_read()
[ Upstream commit ddde5412fdaa5048bbca31529d46cb8da882870c ]
The upper 32-bit PHC register is not latched when reading the lower 32-bit PHC register. Current code leaves a small window where we may not read correct higher order bits if the lower order bits are just about to wrap around.
This patch fixes this by reading higher order bits twice and makes sure that final value is correctly paired with its lower 32 bits.
Fixes: 30e96f487f64 ("bnxt_en: Do not read the PTP PHC during chip reset") Cc: Richard Cochran <richardcochran@gmail.com> Signed-off-by: Pavan Chebbi <pavan.chebbi@broadcom.com> Signed-off-by: Michael Chan <michael.chan@broadcom.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
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3852f048 |
| 11-Jul-2022 |
Pavan Chebbi <pavan.chebbi@broadcom.com> |
bnxt_en: Fix bnxt_refclk_read()
[ Upstream commit ddde5412fdaa5048bbca31529d46cb8da882870c ]
The upper 32-bit PHC register is not latched when reading the lower 32-bit PHC register. Current code l
bnxt_en: Fix bnxt_refclk_read()
[ Upstream commit ddde5412fdaa5048bbca31529d46cb8da882870c ]
The upper 32-bit PHC register is not latched when reading the lower 32-bit PHC register. Current code leaves a small window where we may not read correct higher order bits if the lower order bits are just about to wrap around.
This patch fixes this by reading higher order bits twice and makes sure that final value is correctly paired with its lower 32 bits.
Fixes: 30e96f487f64 ("bnxt_en: Do not read the PTP PHC during chip reset") Cc: Richard Cochran <richardcochran@gmail.com> Signed-off-by: Pavan Chebbi <pavan.chebbi@broadcom.com> Signed-off-by: Michael Chan <michael.chan@broadcom.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
show more ...
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3852f048 |
| 11-Jul-2022 |
Pavan Chebbi <pavan.chebbi@broadcom.com> |
bnxt_en: Fix bnxt_refclk_read()
[ Upstream commit ddde5412fdaa5048bbca31529d46cb8da882870c ]
The upper 32-bit PHC register is not latched when reading the lower 32-bit PHC register. Current code l
bnxt_en: Fix bnxt_refclk_read()
[ Upstream commit ddde5412fdaa5048bbca31529d46cb8da882870c ]
The upper 32-bit PHC register is not latched when reading the lower 32-bit PHC register. Current code leaves a small window where we may not read correct higher order bits if the lower order bits are just about to wrap around.
This patch fixes this by reading higher order bits twice and makes sure that final value is correctly paired with its lower 32 bits.
Fixes: 30e96f487f64 ("bnxt_en: Do not read the PTP PHC during chip reset") Cc: Richard Cochran <richardcochran@gmail.com> Signed-off-by: Pavan Chebbi <pavan.chebbi@broadcom.com> Signed-off-by: Michael Chan <michael.chan@broadcom.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
show more ...
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#
3852f048 |
| 11-Jul-2022 |
Pavan Chebbi <pavan.chebbi@broadcom.com> |
bnxt_en: Fix bnxt_refclk_read()
[ Upstream commit ddde5412fdaa5048bbca31529d46cb8da882870c ]
The upper 32-bit PHC register is not latched when reading the lower 32-bit PHC register. Current code l
bnxt_en: Fix bnxt_refclk_read()
[ Upstream commit ddde5412fdaa5048bbca31529d46cb8da882870c ]
The upper 32-bit PHC register is not latched when reading the lower 32-bit PHC register. Current code leaves a small window where we may not read correct higher order bits if the lower order bits are just about to wrap around.
This patch fixes this by reading higher order bits twice and makes sure that final value is correctly paired with its lower 32 bits.
Fixes: 30e96f487f64 ("bnxt_en: Do not read the PTP PHC during chip reset") Cc: Richard Cochran <richardcochran@gmail.com> Signed-off-by: Pavan Chebbi <pavan.chebbi@broadcom.com> Signed-off-by: Michael Chan <michael.chan@broadcom.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
show more ...
|
#
3852f048 |
| 11-Jul-2022 |
Pavan Chebbi <pavan.chebbi@broadcom.com> |
bnxt_en: Fix bnxt_refclk_read()
[ Upstream commit ddde5412fdaa5048bbca31529d46cb8da882870c ]
The upper 32-bit PHC register is not latched when reading the lower 32-bit PHC register. Current code l
bnxt_en: Fix bnxt_refclk_read()
[ Upstream commit ddde5412fdaa5048bbca31529d46cb8da882870c ]
The upper 32-bit PHC register is not latched when reading the lower 32-bit PHC register. Current code leaves a small window where we may not read correct higher order bits if the lower order bits are just about to wrap around.
This patch fixes this by reading higher order bits twice and makes sure that final value is correctly paired with its lower 32 bits.
Fixes: 30e96f487f64 ("bnxt_en: Do not read the PTP PHC during chip reset") Cc: Richard Cochran <richardcochran@gmail.com> Signed-off-by: Pavan Chebbi <pavan.chebbi@broadcom.com> Signed-off-by: Michael Chan <michael.chan@broadcom.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
show more ...
|
#
3852f048 |
| 11-Jul-2022 |
Pavan Chebbi <pavan.chebbi@broadcom.com> |
bnxt_en: Fix bnxt_refclk_read()
[ Upstream commit ddde5412fdaa5048bbca31529d46cb8da882870c ]
The upper 32-bit PHC register is not latched when reading the lower 32-bit PHC register. Current code l
bnxt_en: Fix bnxt_refclk_read()
[ Upstream commit ddde5412fdaa5048bbca31529d46cb8da882870c ]
The upper 32-bit PHC register is not latched when reading the lower 32-bit PHC register. Current code leaves a small window where we may not read correct higher order bits if the lower order bits are just about to wrap around.
This patch fixes this by reading higher order bits twice and makes sure that final value is correctly paired with its lower 32 bits.
Fixes: 30e96f487f64 ("bnxt_en: Do not read the PTP PHC during chip reset") Cc: Richard Cochran <richardcochran@gmail.com> Signed-off-by: Pavan Chebbi <pavan.chebbi@broadcom.com> Signed-off-by: Michael Chan <michael.chan@broadcom.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
show more ...
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