drm/amd/display: dc/clk_mgr: make function static[Why]linux-next kernel test robot reported the following problem:warning: no previous prototype for 'dce60_get_dp_ref_freq_khz' [-Wmissing-prototy
drm/amd/display: dc/clk_mgr: make function static[Why]linux-next kernel test robot reported the following problem:warning: no previous prototype for 'dce60_get_dp_ref_freq_khz' [-Wmissing-prototypes][How]mark dce60_get_dp_ref_freq_khz() as staticFixes: 3ecb3b794e2c "drm/amd/display: dc/clk_mgr: add support for SI parts (v2)"Reported-by: kernel test robot <lkp@intel.com>Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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drm/amd/display: dc/clk_mgr: add support for SI parts (v2)(v1) Changelog[Why]After commit c69dd2d "drm/amd/display: Refactor clk_mgr functions"dc/clk_mgr requires these changes to add SI parts
drm/amd/display: dc/clk_mgr: add support for SI parts (v2)(v1) Changelog[Why]After commit c69dd2d "drm/amd/display: Refactor clk_mgr functions"dc/clk_mgr requires these changes to add SI parts supportNecessary to avoid hitting default: ASSERT(0); /* Unknown Asic */that would cause kernel freeze[How]Add case statement for FAMILY_SI chipsets(v2) Changelog[Why]DCE6 has no DPREFCLK_CNTL register[How]Add DCE6 specific macros definitions for CLK registers and masksAdd DCE6 specific dce60/dce60_clk_mgr.c for DCE6 customizationCode style: reuse all the public functions in dce100/dce_clk_mgr.h headerCode style: use dce60_* static functions as per other DCE implementationsAdd dce60_get_dp_ref_freq_khz() w/o using DPREFCLK_CNTL registerUse dce60_get_dp_ref_freq_khz() function in dce60_funcsAdd DCE6 specific dce60_clk_mgr_constructdc/clk_mgr/dce_clk_mgr.c: use dce60_clk_mgr_construct for FAMILY_SI chipsetsAdd Makefile rules for dce60_clk_mgr.o target conditional to CONFIG_DRM_AMD_DC_SIReviewed-by: Alex Deucher <alexander.deucher@amd.com>Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>Signed-off-by: Alex Deucher <alexander.deucher@amd.com>