Revision tags: v5.2.8 |
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dd21a572 |
| 09-Aug-2019 |
Tao Zhou <tao.zhou1@amd.com> |
drm/amdgpu: implement UMC 64 bits REG operations implement 64 bits operations via 32 bits interface v2: make use of lower_32_bits() and upper_32_bits() macros Reviewed-by:
drm/amdgpu: implement UMC 64 bits REG operations implement 64 bits operations via 32 bits interface v2: make use of lower_32_bits() and upper_32_bits() macros Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Revision tags: v5.2.7, v5.2.6, v5.2.5 |
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b1a58953 |
| 29-Jul-2019 |
Tao Zhou <tao.zhou1@amd.com> |
drm/amdgpu: update the calc algorithm of umc ecc error count the initial value of ecc error count can be adjusted Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Hawkin
drm/amdgpu: update the calc algorithm of umc ecc error count the initial value of ecc error count can be adjusted Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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b7f92097 |
| 29-Jul-2019 |
Tao Zhou <tao.zhou1@amd.com> |
drm/amdgpu: implement umc ras init function enable umc ce interrupt and initialize ecc error count Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Hawking Zhang <Hawkin
drm/amdgpu: implement umc ras init function enable umc ce interrupt and initialize ecc error count Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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2b671b60 |
| 31-Jul-2019 |
Tao Zhou <tao.zhou1@amd.com> |
drm/amdgpu: apply umc_for_each_channel macro to umc_6_1 use umc_for_each_channel to make code simpler Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Hawking Zhang <Haw
drm/amdgpu: apply umc_for_each_channel macro to umc_6_1 use umc_for_each_channel to make code simpler Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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3aacf4ea |
| 29-Jul-2019 |
Tao Zhou <tao.zhou1@amd.com> |
drm/amdgpu: initialize new parameters and functions for amdgpu_umc structure add initialization for new members of amdgpu_umc structure Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
drm/amdgpu: initialize new parameters and functions for amdgpu_umc structure add initialization for new members of amdgpu_umc structure Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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a55c8d7b |
| 28-Jul-2019 |
Tao Zhou <tao.zhou1@amd.com> |
drm/amdgpu: remove the clear of MCA_ADDR clearing MCA_STATUS is enough to reset the whole MCA, writing zero to MCA_ADDR is unnecessary Signed-off-by: Tao Zhou <tao.zhou1@amd.com
drm/amdgpu: remove the clear of MCA_ADDR clearing MCA_STATUS is enough to reset the whole MCA, writing zero to MCA_ADDR is unnecessary Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Revision tags: v5.2.4, v5.2.3 |
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8c948103 |
| 24-Jul-2019 |
Tao Zhou <tao.zhou1@amd.com> |
drm/amdgpu: query umc ras error address query umc ras error address, translate it to gpu 4k page view and save it. Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: H
drm/amdgpu: query umc ras error address query umc ras error address, translate it to gpu 4k page view and save it. Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Dennis Li <dennis.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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c2742aef |
| 22-Jul-2019 |
Tao Zhou <tao.zhou1@amd.com> |
drm/amdgpu: add structures for umc error address translation add related registers, callback function and channel index table Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewe
drm/amdgpu: add structures for umc error address translation add related registers, callback function and channel index table Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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f1ed4afa |
| 22-Jul-2019 |
Tao Zhou <tao.zhou1@amd.com> |
drm/amdgpu: update algorithm of umc uncorrectable error counting remove the check of ErrorCodeExt v2: refine the if condition for ue counting Signed-off-by: Tao Zhou <tao.z
drm/amdgpu: update algorithm of umc uncorrectable error counting remove the check of ErrorCodeExt v2: refine the if condition for ue counting Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Dennis Li <dennis.li@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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5bbfb64a |
| 22-Jul-2019 |
Tao Zhou <tao.zhou1@amd.com> |
drm/amdgpu: use 64bit operation macros for umc replace some 32bit macros with 64bit operations to simplify code Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Dennis L
drm/amdgpu: use 64bit operation macros for umc replace some 32bit macros with 64bit operations to simplify code Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Dennis Li <dennis.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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9884c2b1 |
| 31-Jul-2019 |
Hawking Zhang <Hawking.Zhang@amd.com> |
drm/amdgpu: add umc v6_1 query error count support Implement umc query_ras_error_count function to support querry both correctable and uncorrectable error Signed-off-by: Hawking
drm/amdgpu: add umc v6_1 query error count support Implement umc query_ras_error_count function to support querry both correctable and uncorrectable error Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Dennis Li <dennis.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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