1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright 2020, Compass Electronics Group, LLC
4 */
5
6#include <dt-bindings/gpio/gpio.h>
7#include <dt-bindings/clk/versaclock.h>
8
9/ {
10	memory@48000000 {
11		device_type = "memory";
12		/* first 128MB is reserved for secure area. */
13		reg = <0x0 0x48000000 0x0 0x78000000>;
14	};
15
16	osc_32k: osc_32k {
17		compatible = "fixed-clock";
18		#clock-cells = <0>;
19		clock-frequency = <32768>;
20		clock-output-names = "osc_32k";
21	};
22
23	reg_1p8v: regulator0 {
24		compatible = "regulator-fixed";
25		regulator-name = "fixed-1.8V";
26		regulator-min-microvolt = <1800000>;
27		regulator-max-microvolt = <1800000>;
28		regulator-boot-on;
29		regulator-always-on;
30	};
31
32	reg_3p3v: regulator1 {
33		compatible = "regulator-fixed";
34		regulator-name = "fixed-3.3V";
35		regulator-min-microvolt = <3300000>;
36		regulator-max-microvolt = <3300000>;
37		regulator-boot-on;
38		regulator-always-on;
39	};
40
41	wlan_pwrseq: wlan_pwrseq {
42		compatible = "mmc-pwrseq-simple";
43		reset-gpios = <&pca9654 1 GPIO_ACTIVE_LOW>;
44		clocks = <&osc_32k>;
45		clock-names = "ext_clock";
46		post-power-on-delay-ms = <80>;
47	};
48};
49
50&avb {
51	pinctrl-0 = <&avb_pins>;
52	pinctrl-names = "default";
53	phy-mode = "rgmii-rxid";
54	phy-handle = <&phy0>;
55	rx-internal-delay-ps = <1800>;
56	tx-internal-delay-ps = <2000>;
57	clocks = <&cpg CPG_MOD 812>, <&versaclock5 4>;
58	clock-names = "fck", "refclk";
59	status = "okay";
60
61	phy0: ethernet-phy@0 {
62		reg = <0>;
63		interrupt-parent = <&gpio2>;
64		interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
65		reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
66	};
67};
68
69&extal_clk {
70	clock-frequency = <16666666>;
71};
72
73&extalr_clk {
74	clock-frequency = <32768>;
75};
76
77&gpio6 {
78	usb_hub_reset {
79		gpio-hog;
80		gpios = <10 GPIO_ACTIVE_HIGH>;
81		output-high;
82		line-name = "usb-hub-reset";
83	};
84};
85
86&hscif0 {
87	pinctrl-0 = <&hscif0_pins>;
88	pinctrl-names = "default";
89	uart-has-rtscts;
90	status = "okay";
91
92	bluetooth {
93		compatible = "brcm,bcm43438-bt";
94		shutdown-gpios = <&pca9654 2 GPIO_ACTIVE_HIGH>;
95		host-wakeup-gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>;
96		device-wakeup-gpios = <&pca9654 5 GPIO_ACTIVE_HIGH>;
97		clocks = <&osc_32k>;
98		clock-names = "extclk";
99		max-speed = <4000000>;
100	};
101};
102
103&hscif2 {
104	status = "okay";
105	pinctrl-0 = <&hscif2_pins>;
106	pinctrl-names = "default";
107};
108
109&i2c4 {
110	status = "okay";
111	clock-frequency = <100000>;
112
113	pca9654: gpio@20 {
114		compatible = "onnn,pca9654";
115		reg = <0x20>;
116		gpio-controller;
117		#gpio-cells = <2>;
118		gpio-line-names =
119			"i2c4_20_0",
120			"wl_reg_on",
121			"bt_reg_on",
122			"i2c4_20_3",
123			"i2c4_20_4",
124			"bt_dev_wake",
125			"i2c4_20_6",
126			"i2c4_20_7";
127	};
128
129	pca9654_lte: gpio@21 {
130		compatible = "onnn,pca9654";
131		reg = <0x21>;
132		interrupt-parent = <&gpio5>;
133		interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
134		interrupt-controller;
135		#interrupt-cells = <2>;
136		gpio-controller;
137		#gpio-cells = <2>;
138		gpio-line-names =
139			"i2c4_21_0",
140			"zoe_pwr_on",
141			"zoe_extint",
142			"zoe_reset_n",
143			"sara_reset",
144			"i2c4_21_5",
145			"sara_pwr_off",
146			"sara_networking_status";
147	};
148
149	eeprom@50 {
150		compatible = "microchip,24c64", "atmel,24c64";
151		pagesize = <32>;
152		read-only;	/* Manufacturing EEPROM programmed at factory */
153		reg = <0x50>;
154	};
155
156	rtc@51 {
157		compatible = "nxp,pcf85263";
158		reg = <0x51>;
159	};
160
161	versaclock5: versaclock_som@6a {
162		compatible = "idt,5p49v6965";
163		reg = <0x6a>;
164		#clock-cells = <1>;
165		clocks = <&x304_clk>;
166		clock-names = "xin";
167		/* du_dotclkin0, du_dotclkin2, usb_extal, avb_txcrefclk */
168		assigned-clocks = <&versaclock5 1>,
169				   <&versaclock5 2>,
170				   <&versaclock5 3>,
171				   <&versaclock5 4>;
172
173		assigned-clock-rates = <33333333>, <33333333>, <50000000>, <125000000>;
174
175		OUT1 {
176			idt,mode = <VC5_CMOS>;
177			idt,voltage-microvolt = <1800000>;
178			idt,slew-percent = <100>;
179		};
180
181		OUT2 {
182			idt,mode = <VC5_CMOS>;
183			idt,voltage-microvolt = <1800000>;
184			idt,slew-percent = <100>;
185		};
186
187		OUT3 {
188			idt,mode = <VC5_CMOS>;
189			idt,voltage-microvolt = <1800000>;
190			idt,slew-percent = <100>;
191		};
192
193		OUT4 {
194			idt,mode = <VC5_CMOS>;
195			idt,voltage-microvolt = <3300000>;
196			idt,slew-percent = <100>;
197		};
198	};
199};
200
201&pfc {
202	pinctrl-0 = <&scif_clk_pins>;
203	pinctrl-names = "default";
204
205	avb_pins: avb {
206		mux {
207			groups = "avb_link", "avb_mdio", "avb_mii";
208			function = "avb";
209		};
210
211		pins_mdio {
212			groups = "avb_mdio";
213			drive-strength = <24>;
214		};
215
216		pins_mii_tx {
217			pins = "PIN_AVB_TX_CTL", "PIN_AVB_TXC", "PIN_AVB_TD0",
218			       "PIN_AVB_TD1", "PIN_AVB_TD2", "PIN_AVB_TD3";
219			drive-strength = <12>;
220		};
221	};
222
223	scif2_pins: scif2 {
224		groups = "scif2_data_a";
225		function = "scif2";
226	};
227
228	hscif0_pins: hscif0 {
229		groups = "hscif0_data", "hscif0_ctrl";
230		function = "hscif0";
231	};
232
233	hscif1_pins: hscif1 {
234		groups = "hscif1_data_a", "hscif1_ctrl_a";
235		function = "hscif1";
236	};
237
238	hscif2_pins: hscif2 {
239		groups = "hscif2_data_a";
240		function = "hscif2";
241	};
242
243	scif0_pins: scif0 {
244		groups = "scif0_data";
245		function = "scif0";
246	};
247
248	scif5_pins: scif5 {
249		groups = "scif5_data_a";
250		function = "scif5";
251	};
252
253	scif_clk_pins: scif_clk {
254		groups = "scif_clk_a";
255		function = "scif_clk";
256	};
257
258	i2c0_pins: i2c0 {
259		groups = "i2c0";
260		function = "i2c0";
261	};
262
263	sdhi2_pins: sd2 {
264		groups = "sdhi2_data4", "sdhi2_ctrl";
265		function = "sdhi2";
266		power-source = <1800>;
267	};
268
269	sdhi3_pins: sd3 {
270		groups = "sdhi3_data8", "sdhi3_ctrl", "sdhi3_ds";
271		function = "sdhi3";
272		power-source = <1800>;
273	};
274};
275
276&scif_clk {
277	clock-frequency = <14745600>;
278};
279
280&scif2 {
281	pinctrl-0 = <&scif2_pins>;
282	pinctrl-names = "default";
283	status = "okay";
284};
285
286&sdhi2 {
287	pinctrl-names = "default";
288	pinctrl-0 = <&sdhi2_pins>;
289	bus-width = <4>;
290	vmmc-supply = <&reg_3p3v>;
291	vqmmc-supply = <&reg_1p8v>;
292	non-removable;
293	cap-power-off-card;
294	pm-ignore-notify;
295	keep-power-in-suspend;
296	mmc-pwrseq = <&wlan_pwrseq>;
297	status = "okay";
298	#address-cells = <1>;
299	#size-cells = <0>;
300
301	brcmf: bcrmf@1 {
302		reg = <1>;
303		compatible = "brcm,bcm4329-fmac";
304		interrupt-parent = <&gpio1>;
305		interrupts = <27 IRQ_TYPE_LEVEL_LOW>;
306		interrupt-names = "host-wake";
307	};
308};
309
310&sdhi3 {
311	pinctrl-0 = <&sdhi3_pins>;
312	pinctrl-1 = <&sdhi3_pins>;
313	pinctrl-names = "default", "state_uhs";
314	vmmc-supply = <&reg_3p3v>;
315	vqmmc-supply = <&reg_1p8v>;
316	bus-width = <8>;
317	mmc-hs200-1_8v;
318	no-sd;
319	no-sdio;
320	non-removable;
321	fixed-emmc-driver-type = <1>;
322	status = "okay";
323};
324
325&usb2_clksel {
326	clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>,
327		  <&versaclock5 3>, <&usb3s0_clk>;
328	status = "okay";
329};
330
331&usb3s0_clk {
332	clock-frequency = <100000000>;
333};
334