1 /* 2 * R-Car Generation 2 support 3 * 4 * Copyright (C) 2013 Renesas Solutions Corp. 5 * Copyright (C) 2013 Magnus Damm 6 * Copyright (C) 2014 Ulrich Hecht 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License as published by 10 * the Free Software Foundation; version 2 of the License. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 */ 17 18 #include <linux/clk-provider.h> 19 #include <linux/clocksource.h> 20 #include <linux/device.h> 21 #include <linux/dma-contiguous.h> 22 #include <linux/io.h> 23 #include <linux/kernel.h> 24 #include <linux/memblock.h> 25 #include <linux/of.h> 26 #include <linux/of_fdt.h> 27 #include <linux/of_platform.h> 28 #include <asm/mach/arch.h> 29 #include <asm/secure_cntvoff.h> 30 #include "common.h" 31 #include "rcar-gen2.h" 32 33 static const struct of_device_id cpg_matches[] __initconst = { 34 { .compatible = "renesas,rcar-gen2-cpg-clocks", }, 35 { .compatible = "renesas,r8a7743-cpg-mssr", .data = "extal" }, 36 { .compatible = "renesas,r8a7790-cpg-mssr", .data = "extal" }, 37 { .compatible = "renesas,r8a7791-cpg-mssr", .data = "extal" }, 38 { .compatible = "renesas,r8a7793-cpg-mssr", .data = "extal" }, 39 { /* sentinel */ } 40 }; 41 42 static unsigned int __init get_extal_freq(void) 43 { 44 const struct of_device_id *match; 45 struct device_node *cpg, *extal; 46 u32 freq = 20000000; 47 int idx = 0; 48 49 cpg = of_find_matching_node_and_match(NULL, cpg_matches, &match); 50 if (!cpg) 51 return freq; 52 53 if (match->data) 54 idx = of_property_match_string(cpg, "clock-names", match->data); 55 extal = of_parse_phandle(cpg, "clocks", idx); 56 of_node_put(cpg); 57 if (!extal) 58 return freq; 59 60 of_property_read_u32(extal, "clock-frequency", &freq); 61 of_node_put(extal); 62 return freq; 63 } 64 65 #define CNTCR 0 66 #define CNTFID0 0x20 67 68 void __init rcar_gen2_timer_init(void) 69 { 70 #ifdef CONFIG_ARM_ARCH_TIMER 71 void __iomem *base; 72 u32 freq; 73 74 secure_cntvoff_init(); 75 76 if (of_machine_is_compatible("renesas,r8a7745") || 77 of_machine_is_compatible("renesas,r8a7792") || 78 of_machine_is_compatible("renesas,r8a7794")) { 79 freq = 260000000 / 8; /* ZS / 8 */ 80 } else { 81 /* At Linux boot time the r8a7790 arch timer comes up 82 * with the counter disabled. Moreover, it may also report 83 * a potentially incorrect fixed 13 MHz frequency. To be 84 * correct these registers need to be updated to use the 85 * frequency EXTAL / 2. 86 */ 87 freq = get_extal_freq() / 2; 88 } 89 90 /* Remap "armgcnt address map" space */ 91 base = ioremap(0xe6080000, PAGE_SIZE); 92 93 /* 94 * Update the timer if it is either not running, or is not at the 95 * right frequency. The timer is only configurable in secure mode 96 * so this avoids an abort if the loader started the timer and 97 * entered the kernel in non-secure mode. 98 */ 99 100 if ((ioread32(base + CNTCR) & 1) == 0 || 101 ioread32(base + CNTFID0) != freq) { 102 /* Update registers with correct frequency */ 103 iowrite32(freq, base + CNTFID0); 104 asm volatile("mcr p15, 0, %0, c14, c0, 0" : : "r" (freq)); 105 106 /* make sure arch timer is started by setting bit 0 of CNTCR */ 107 iowrite32(1, base + CNTCR); 108 } 109 110 iounmap(base); 111 #endif /* CONFIG_ARM_ARCH_TIMER */ 112 113 of_clk_init(NULL); 114 timer_probe(); 115 } 116 117 struct memory_reserve_config { 118 u64 reserved; 119 u64 base, size; 120 }; 121 122 static int __init rcar_gen2_scan_mem(unsigned long node, const char *uname, 123 int depth, void *data) 124 { 125 const char *type = of_get_flat_dt_prop(node, "device_type", NULL); 126 const __be32 *reg, *endp; 127 int l; 128 struct memory_reserve_config *mrc = data; 129 u64 lpae_start = 1ULL << 32; 130 131 /* We are scanning "memory" nodes only */ 132 if (type == NULL || strcmp(type, "memory")) 133 return 0; 134 135 reg = of_get_flat_dt_prop(node, "linux,usable-memory", &l); 136 if (reg == NULL) 137 reg = of_get_flat_dt_prop(node, "reg", &l); 138 if (reg == NULL) 139 return 0; 140 141 endp = reg + (l / sizeof(__be32)); 142 while ((endp - reg) >= (dt_root_addr_cells + dt_root_size_cells)) { 143 u64 base, size; 144 145 base = dt_mem_next_cell(dt_root_addr_cells, ®); 146 size = dt_mem_next_cell(dt_root_size_cells, ®); 147 148 if (base >= lpae_start) 149 continue; 150 151 if ((base + size) >= lpae_start) 152 size = lpae_start - base; 153 154 if (size < mrc->reserved) 155 continue; 156 157 if (base < mrc->base) 158 continue; 159 160 /* keep the area at top near the 32-bit legacy limit */ 161 mrc->base = base + size - mrc->reserved; 162 mrc->size = mrc->reserved; 163 } 164 165 return 0; 166 } 167 168 void __init rcar_gen2_reserve(void) 169 { 170 struct memory_reserve_config mrc; 171 172 /* reserve 256 MiB at the top of the physical legacy 32-bit space */ 173 memset(&mrc, 0, sizeof(mrc)); 174 mrc.reserved = SZ_256M; 175 176 of_scan_flat_dt(rcar_gen2_scan_mem, &mrc); 177 #ifdef CONFIG_DMA_CMA 178 if (mrc.size && memblock_is_region_memory(mrc.base, mrc.size)) { 179 static struct cma *rcar_gen2_dma_contiguous; 180 181 dma_contiguous_reserve_area(mrc.size, mrc.base, 0, 182 &rcar_gen2_dma_contiguous, true); 183 } 184 #endif 185 } 186 187 static const char * const rcar_gen2_boards_compat_dt[] __initconst = { 188 /* 189 * R8A7790 and R8A7791 can't be handled here as long as they need SMP 190 * initialization fallback. 191 */ 192 "renesas,r8a7792", 193 "renesas,r8a7793", 194 "renesas,r8a7794", 195 NULL, 196 }; 197 198 DT_MACHINE_START(RCAR_GEN2_DT, "Generic R-Car Gen2 (Flattened Device Tree)") 199 .init_early = shmobile_init_delay, 200 .init_late = shmobile_init_late, 201 .init_time = rcar_gen2_timer_init, 202 .reserve = rcar_gen2_reserve, 203 .dt_compat = rcar_gen2_boards_compat_dt, 204 MACHINE_END 205 206 static const char * const rz_g1_boards_compat_dt[] __initconst = { 207 "renesas,r8a7743", 208 "renesas,r8a7745", 209 NULL, 210 }; 211 212 DT_MACHINE_START(RZ_G1_DT, "Generic RZ/G1 (Flattened Device Tree)") 213 .init_early = shmobile_init_delay, 214 .init_late = shmobile_init_late, 215 .init_time = rcar_gen2_timer_init, 216 .reserve = rcar_gen2_reserve, 217 .dt_compat = rz_g1_boards_compat_dt, 218 MACHINE_END 219