xref: /openbmc/u-boot/include/configs/lx2160aqds.h (revision c507d306)
1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * Copyright 2018-2019 NXP
4  */
5 
6 #ifndef __LX2_QDS_H
7 #define __LX2_QDS_H
8 
9 #include "lx2160a_common.h"
10 
11 /* Qixis */
12 #define QIXIS_XMAP_MASK			0x07
13 #define QIXIS_XMAP_SHIFT		5
14 #define QIXIS_RST_CTL_RESET_EN		0x30
15 #define QIXIS_LBMAP_DFLTBANK		0x00
16 #define QIXIS_LBMAP_ALTBANK		0x20
17 #define QIXIS_LBMAP_QSPI		0x00
18 #define QIXIS_RCW_SRC_QSPI		0xff
19 #define QIXIS_RST_CTL_RESET		0x31
20 #define QIXIS_RCFG_CTL_RECONFIG_IDLE	0x20
21 #define QIXIS_RCFG_CTL_RECONFIG_START	0x21
22 #define QIXIS_RCFG_CTL_WATCHDOG_ENBLE	0x08
23 #define QIXIS_LBMAP_MASK		0x0f
24 #define QIXIS_LBMAP_SD
25 #define QIXIS_RCW_SRC_SD		0x08
26 #define NON_EXTENDED_DUTCFG
27 #define QIXIS_SDID_MASK			0x07
28 #define QIXIS_ESDHC_NO_ADAPTER		0x7
29 
30 /* SYSCLK */
31 #define QIXIS_SYSCLK_100		0x0
32 #define QIXIS_SYSCLK_125		0x1
33 #define QIXIS_SYSCLK_133		0x2
34 
35 /* DDRCLK */
36 #define QIXIS_DDRCLK_100		0x0
37 #define QIXIS_DDRCLK_125		0x1
38 #define QIXIS_DDRCLK_133		0x2
39 
40 #define BRDCFG4_EMI1SEL_MASK		0xF8
41 #define BRDCFG4_EMI1SEL_SHIFT		3
42 #define BRDCFG4_EMI2SEL_MASK		0x07
43 #define BRDCFG4_EMI2SEL_SHIFT		0
44 
45 /* VID */
46 
47 #define I2C_MUX_CH_VOL_MONITOR		0xA
48 /* Voltage monitor on channel 2*/
49 #define I2C_VOL_MONITOR_ADDR		0x63
50 #define I2C_VOL_MONITOR_BUS_V_OFFSET	0x2
51 #define I2C_VOL_MONITOR_BUS_V_OVF	0x1
52 #define I2C_VOL_MONITOR_BUS_V_SHIFT	3
53 #define CONFIG_VID_FLS_ENV		"lx2160aqds_vdd_mv"
54 #define CONFIG_VID
55 
56 /* The lowest and highest voltage allowed*/
57 #define VDD_MV_MIN			775
58 #define VDD_MV_MAX			925
59 
60 /* PM Bus commands code for LTC3882*/
61 #define PMBUS_CMD_PAGE                  0x0
62 #define PMBUS_CMD_READ_VOUT             0x8B
63 #define PMBUS_CMD_PAGE_PLUS_WRITE       0x05
64 #define PMBUS_CMD_VOUT_COMMAND          0x21
65 #define PWM_CHANNEL0                    0x0
66 
67 #define CONFIG_VOL_MONITOR_LTC3882_SET
68 #define CONFIG_VOL_MONITOR_LTC3882_READ
69 
70 /* RTC */
71 #define CONFIG_SYS_RTC_BUS_NUM		0
72 #define I2C_MUX_CH_RTC			0xB
73 
74 /*
75  * MMC
76  */
77 #ifdef CONFIG_MMC
78 #ifndef __ASSEMBLY__
79 u8 qixis_esdhc_detect_quirk(void);
80 #endif
81 #define CONFIG_ESDHC_DETECT_QUIRK  qixis_esdhc_detect_quirk()
82 #endif
83 
84 /* MAC/PHY configuration */
85 #if defined(CONFIG_FSL_MC_ENET)
86 #define CONFIG_MII
87 #define CONFIG_ETHPRIME		"DPMAC17@rgmii-id"
88 
89 #define AQ_PHY_ADDR1		0x00
90 #define AQ_PHY_ADDR2		0x01
91 #define AQ_PHY_ADDR3		0x02
92 #define AQ_PHY_ADDR4		0x03
93 
94 #define CORTINA_NO_FW_UPLOAD
95 #define CORTINA_PHY_ADDR1	0x0
96 
97 #define INPHI_PHY_ADDR1		0x0
98 #define INPHI_PHY_ADDR2		0x1
99 
100 #define RGMII_PHY_ADDR1		0x01
101 #define RGMII_PHY_ADDR2		0x02
102 
103 #define SGMII_CARD_PORT1_PHY_ADDR 0x1C
104 #define SGMII_CARD_PORT2_PHY_ADDR 0x1D
105 #define SGMII_CARD_PORT3_PHY_ADDR 0x1E
106 #define SGMII_CARD_PORT4_PHY_ADDR 0x1F
107 
108 #endif
109 
110 /* EEPROM */
111 #define CONFIG_ID_EEPROM
112 #define CONFIG_SYS_I2C_EEPROM_NXID
113 #define CONFIG_SYS_EEPROM_BUS_NUM		0
114 #define CONFIG_SYS_I2C_EEPROM_ADDR		0x57
115 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN		1
116 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	3
117 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	5
118 
119 /* Initial environment variables */
120 #define CONFIG_EXTRA_ENV_SETTINGS		\
121 	EXTRA_ENV_SETTINGS			\
122 	"lx2160aqds_vdd_mv=800\0"		\
123 	"BOARD=lx2160aqds\0"			\
124 	"xspi_bootcmd=echo Trying load from flexspi..;"		\
125 		"sf probe 0:0 && sf read $load_addr "		\
126 		"$kernel_start $kernel_size ; env exists secureboot &&"	\
127 		"sf read $kernelheader_addr_r $kernelheader_start "	\
128 		"$kernelheader_size && esbc_validate ${kernelheader_addr_r}; "\
129 		" bootm $load_addr#$BOARD\0"			\
130 	"sd_bootcmd=echo Trying load from sd card..;"		\
131 		"mmcinfo; mmc read $load_addr "			\
132 		"$kernel_addr_sd $kernel_size_sd ;"		\
133 		"env exists secureboot && mmc read $kernelheader_addr_r "\
134 		"$kernelhdr_addr_sd $kernelhdr_size_sd "	\
135 		" && esbc_validate ${kernelheader_addr_r};"	\
136 		"bootm $load_addr#$BOARD\0"
137 
138 #include <asm/fsl_secure_boot.h>
139 
140 #endif /* __LX2_QDS_H */
141