1 /*
2  * (C) Copyright 2015
3  * (C) Copyright 2014
4  * Heiko Schocher, DENX Software Engineering, hs@denx.de.
5  *
6  * Based on:
7  * Copyright (C) 2012 Freescale Semiconductor, Inc.
8  *
9  * Configuration settings for the Freescale i.MX6Q SabreSD board.
10  *
11  * SPDX-License-Identifier:	GPL-2.0+
12  */
13 #ifndef __ARISTAINETOS_COMMON_CONFIG_H
14 #define __ARISTAINETOS_COMMON_CONFIG_H
15 
16 #include "mx6_common.h"
17 
18 #define CONFIG_MACH_TYPE	4501
19 #define CONFIG_MMCROOT		"/dev/mmcblk0p1"
20 #define PHYS_SDRAM_SIZE		(1u * 1024 * 1024 * 1024)
21 
22 /* Size of malloc() pool */
23 #define CONFIG_SYS_MALLOC_LEN		(64 * SZ_1M)
24 
25 #define CONFIG_BOARD_EARLY_INIT_F
26 
27 #define CONFIG_MXC_UART
28 
29 /* MMC Configs */
30 #define CONFIG_SYS_FSL_ESDHC_ADDR      0
31 
32 #define CONFIG_CMD_PING
33 #define CONFIG_CMD_DHCP
34 #define CONFIG_CMD_MII
35 #define CONFIG_FEC_MXC
36 #define CONFIG_MII
37 #define IMX_FEC_BASE			ENET_BASE_ADDR
38 #define CONFIG_ETHPRIME			"FEC"
39 #define CONFIG_FEC_MXC_PHYADDR		0
40 
41 #define CONFIG_PHYLIB
42 #define CONFIG_PHY_MICREL
43 
44 #define CONFIG_CMD_SF
45 #define CONFIG_SPI_FLASH_MTD
46 #define CONFIG_SPI_FLASH_STMICRO
47 #define CONFIG_MXC_SPI
48 #define CONFIG_SF_DEFAULT_BUS		3
49 #define CONFIG_SF_DEFAULT_SPEED		20000000
50 #define CONFIG_SF_DEFAULT_MODE		SPI_MODE_0
51 #define CONFIG_SYS_SPI_ST_ENABLE_WP_PIN
52 
53 /* Command definition */
54 #define CONFIG_CMD_BMODE
55 
56 #define CONFIG_EXTRA_ENV_SETTINGS \
57 	"script=u-boot.scr\0" \
58 	"fit_file=/boot/system.itb\0" \
59 	"loadaddr=0x12000000\0" \
60 	"fit_addr_r=0x14000000\0" \
61 	"uboot=/boot/u-boot.imx\0" \
62 	"uboot_sz=d0000\0" \
63 	"rescue_sys_addr=f0000\0" \
64 	"rescue_sys_length=f10000\0" \
65 	"panel=lb07wv8\0" \
66 	"splashpos=m,m\0" \
67 	"console=" CONFIG_CONSOLE_DEV "\0" \
68 	"fdt_high=0xffffffff\0"	  \
69 	"initrd_high=0xffffffff\0" \
70 	"addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
71 	"set_fit_default=fdt addr ${fit_addr_r};fdt set /configurations " \
72 		"default ${board_type}\0" \
73 	"get_env=mw ${loadaddr} 0 0x20000;" \
74 		"mmc rescan;" \
75 		"ext2load mmc ${mmcdev}:${mmcpart} ${loadaddr} env.txt;" \
76 		"env import -t ${loadaddr}\0" \
77 	"default_env=mw ${loadaddr} 0 0x20000;" \
78 		"env export -t ${loadaddr} serial# ethaddr eth1addr " \
79 		"board_type panel;" \
80 		"env default -a;" \
81 		"env import -t ${loadaddr}\0" \
82 	"loadbootscript=" \
83 		"ext2load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
84 	"bootscript=echo Running bootscript from mmc ...; " \
85 		"source\0" \
86 	"mmcpart=1\0" \
87 	"mmcdev=0\0" \
88 	"mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
89 	"mmcargs=setenv bootargs console=${console},${baudrate} " \
90 		"root=${mmcroot}\0" \
91 	"mmcboot=echo Booting from mmc ...; " \
92 		"run mmcargs addmtd addmisc set_fit_default;" \
93 		"bootm ${fit_addr_r}\0" \
94 	"mmc_load_fit=ext2load mmc ${mmcdev}:${mmcpart} ${fit_addr_r} " \
95 		"${fit_file}\0" \
96 	"mmc_load_uboot=ext2load mmc ${mmcdev}:${mmcpart} ${loadaddr} " \
97 		"${uboot}\0" \
98 	"mmc_upd_uboot=mw.b ${loadaddr} 0xff ${uboot_sz};" \
99 		"setexpr cmp_buf ${loadaddr} + ${uboot_sz};" \
100 		"setexpr uboot_maxsize ${uboot_sz} - 400;" \
101 		"mw.b ${cmp_buf} 0x00 ${uboot_sz};" \
102 		"run mmc_load_uboot;sf probe;sf erase 0 ${uboot_sz};" \
103 		"sf write ${loadaddr} 400 ${filesize};" \
104 		"sf read ${cmp_buf} 400 ${uboot_sz};" \
105 		"cmp.b ${loadaddr} ${cmp_buf} ${uboot_maxsize}\0" \
106 	"ubiboot=echo Booting from ubi ...; " \
107 		"run ubiargs addmtd addmisc set_fit_default;" \
108 		"bootm ${fit_addr_r}\0" \
109 	"ubifs_load_fit=sf probe;ubi part ubi 2048;ubifsmount ubi:rootfs;" \
110 		"ubifsload ${fit_addr_r} /boot/system.itb; " \
111 		"imi ${fit_addr_r}\0 " \
112 	"rescueargs=setenv bootargs console=${console},${baudrate} " \
113 		"root=/dev/ram rw\0 " \
114 	"rescueboot=echo Booting rescue system from NOR ...; " \
115 		"run rescueargs addmtd addmisc set_fit_default;" \
116 		"bootm ${fit_addr_r}\0" \
117 	"rescue_load_fit=sf probe;sf read ${fit_addr_r} ${rescue_sys_addr} " \
118 		"${rescue_sys_length}; imi ${fit_addr_r}\0" \
119 	CONFIG_EXTRA_ENV_BOARD_SETTINGS
120 
121 #define CONFIG_BOOTCOMMAND \
122 	"mmc dev ${mmcdev};" \
123 	"if mmc rescan; then " \
124 		"if run loadbootscript; then " \
125 			"run bootscript; " \
126 		"else " \
127 			"if run mmc_load_fit; then " \
128 				"run mmcboot; " \
129 			"else " \
130 				"if run ubifs_load_fit; then " \
131 					"run ubiboot; " \
132 				"else " \
133 					"if run rescue_load_fit; then " \
134 						"run rescueboot; " \
135 					"else " \
136 						"echo RESCUE SYSTEM BOOT " \
137 							"FAILURE;" \
138 					"fi; " \
139 				"fi; " \
140 			"fi; " \
141 		"fi; " \
142 	"else " \
143 		"if run ubifs_load_fit; then " \
144 			"run ubiboot; " \
145 		"else " \
146 			"if run rescue_load_fit; then " \
147 				"run rescueboot; " \
148 			"else " \
149 				"echo RESCUE SYSTEM BOOT FAILURE;" \
150 			"fi; " \
151 		"fi; " \
152 	"fi"
153 
154 #define CONFIG_ARP_TIMEOUT		200UL
155 
156 /* Print Buffer Size */
157 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
158 
159 #define CONFIG_SYS_MEMTEST_START	PHYS_SDRAM
160 #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + 0x100000)
161 #define CONFIG_SYS_MEMTEST_SCRATCH	0x10800000
162 
163 #define CONFIG_STACKSIZE		(128 * 1024)
164 
165 /* Physical Memory Map */
166 #define CONFIG_NR_DRAM_BANKS		1
167 #define PHYS_SDRAM			MMDC0_ARB_BASE_ADDR
168 
169 #define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM
170 #define CONFIG_SYS_INIT_RAM_ADDR	IRAM_BASE_ADDR
171 #define CONFIG_SYS_INIT_RAM_SIZE	IRAM_SIZE
172 
173 #define CONFIG_SYS_INIT_SP_OFFSET \
174 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
175 #define CONFIG_SYS_INIT_SP_ADDR \
176 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
177 
178 /* Environment organization */
179 #define CONFIG_ENV_SIZE			(12 * 1024)
180 #define CONFIG_ENV_IS_IN_SPI_FLASH
181 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
182 #define CONFIG_ENV_SPI_BUS		CONFIG_SF_DEFAULT_BUS
183 #define CONFIG_ENV_SPI_CS		CONFIG_SF_DEFAULT_CS
184 #define CONFIG_ENV_SPI_MAX_HZ		CONFIG_SF_DEFAULT_SPEED
185 #define CONFIG_ENV_SPI_MODE		CONFIG_SF_DEFAULT_MODE
186 #define CONFIG_ENV_SECT_SIZE		(0x010000)
187 #define CONFIG_ENV_OFFSET		(0x0d0000)
188 #define CONFIG_ENV_OFFSET_REDUND	(0x0e0000)
189 
190 #define CONFIG_SYS_FSL_USDHC_NUM	2
191 
192 /* I2C */
193 #define CONFIG_CMD_I2C
194 #define CONFIG_SYS_I2C
195 #define CONFIG_SYS_I2C_MXC
196 #define CONFIG_SYS_I2C_MXC_I2C3		/* enable I2C bus 3 */
197 #define CONFIG_SYS_I2C_SPEED		100000
198 #define CONFIG_SYS_I2C_SLAVE		0x7f
199 #define CONFIG_SYS_I2C_NOPROBES		{ {0, 0x00} }
200 
201 /* NAND stuff */
202 #define CONFIG_CMD_NAND
203 #define CONFIG_CMD_NAND_TRIMFFS
204 #define CONFIG_NAND_MXS
205 #define CONFIG_SYS_MAX_NAND_DEVICE	1
206 #define CONFIG_SYS_NAND_BASE		0x40000000
207 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
208 #define CONFIG_SYS_NAND_ONFI_DETECTION
209 
210 /* DMA stuff, needed for GPMI/MXS NAND support */
211 #define CONFIG_APBH_DMA
212 #define CONFIG_APBH_DMA_BURST
213 #define CONFIG_APBH_DMA_BURST8
214 
215 /* RTC */
216 #define CONFIG_SYS_I2C_RTC_ADDR	0x68
217 #define CONFIG_SYS_RTC_BUS_NUM	2
218 #define CONFIG_RTC_M41T11
219 #define CONFIG_CMD_DATE
220 
221 /* USB Configs */
222 #define CONFIG_CMD_USB
223 #define CONFIG_USB_EHCI
224 #define CONFIG_USB_EHCI_MX6
225 #define CONFIG_USB_STORAGE
226 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
227 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET	/* For OTG port */
228 #define CONFIG_MXC_USB_PORTSC	(PORT_PTS_UTMI | PORT_PTS_PTW)
229 #define CONFIG_MXC_USB_FLAGS	0
230 
231 /* UBI support */
232 #define CONFIG_LZO
233 #define CONFIG_CMD_MTDPARTS
234 #define CONFIG_MTD_PARTITIONS
235 #define CONFIG_MTD_DEVICE
236 #define CONFIG_RBTREE
237 #define CONFIG_CMD_UBI
238 #define CONFIG_CMD_UBIFS
239 
240 #define CONFIG_MTD_UBI_FASTMAP
241 #define CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT	1
242 
243 #define CONFIG_HW_WATCHDOG
244 #define CONFIG_IMX_WATCHDOG
245 
246 #define CONFIG_FIT
247 
248 /* Framebuffer */
249 #define CONFIG_VIDEO
250 #define CONFIG_VIDEO_IPUV3
251 /* check this console not needed, after test remove it */
252 #define CONFIG_CFB_CONSOLE
253 #define CONFIG_VGA_AS_SINGLE_DEVICE
254 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
255 #define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
256 #define CONFIG_VIDEO_BMP_RLE8
257 #define CONFIG_SPLASH_SCREEN
258 #define CONFIG_SPLASH_SCREEN_ALIGN
259 #define CONFIG_BMP_16BPP
260 #define CONFIG_VIDEO_LOGO
261 #define CONFIG_VIDEO_BMP_LOGO
262 #define CONFIG_IPUV3_CLK 198000000
263 #define CONFIG_IMX_VIDEO_SKIP
264 
265 #define CONFIG_CMD_BMP
266 
267 #define CONFIG_PWM_IMX
268 #define CONFIG_IMX6_PWM_PER_CLK	66000000
269 
270 #endif /* __ARISTAINETOS_COMMON_CONFIG_H */
271