1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * (C) Copyright 2015
4  * (C) Copyright 2014
5  * Heiko Schocher, DENX Software Engineering, hs@denx.de.
6  *
7  * Based on:
8  * Copyright (C) 2012 Freescale Semiconductor, Inc.
9  *
10  * Configuration settings for the Freescale i.MX6Q SabreSD board.
11  */
12 #ifndef __ARISTAINETOS_COMMON_CONFIG_H
13 #define __ARISTAINETOS_COMMON_CONFIG_H
14 
15 #include "mx6_common.h"
16 
17 #define CONFIG_MACH_TYPE	4501
18 #define CONFIG_MMCROOT		"/dev/mmcblk0p1"
19 
20 /* Size of malloc() pool */
21 #define CONFIG_SYS_MALLOC_LEN		(64 * SZ_1M)
22 
23 #define CONFIG_MXC_UART
24 
25 /* MMC Configs */
26 #define CONFIG_SYS_FSL_ESDHC_ADDR      0
27 
28 #define CONFIG_FEC_MXC
29 #define IMX_FEC_BASE			ENET_BASE_ADDR
30 #define CONFIG_ETHPRIME			"FEC"
31 #define CONFIG_FEC_MXC_PHYADDR		0
32 
33 #define CONFIG_SPI_FLASH_MTD
34 #define CONFIG_SYS_SPI_ST_ENABLE_WP_PIN
35 
36 #define CONFIG_EXTRA_ENV_SETTINGS \
37 	"script=u-boot.scr\0" \
38 	"fit_file=/boot/system.itb\0" \
39 	"loadaddr=0x12000000\0" \
40 	"fit_addr_r=0x14000000\0" \
41 	"uboot=/boot/u-boot.imx\0" \
42 	"uboot_sz=d0000\0" \
43 	"rescue_sys_addr=f0000\0" \
44 	"rescue_sys_length=f10000\0" \
45 	"panel=lb07wv8\0" \
46 	"splashpos=m,m\0" \
47 	"console=" CONSOLE_DEV "\0" \
48 	"fdt_high=0xffffffff\0"	  \
49 	"initrd_high=0xffffffff\0" \
50 	"addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
51 	"set_fit_default=fdt addr ${fit_addr_r};fdt set /configurations " \
52 		"default ${board_type}\0" \
53 	"get_env=mw ${loadaddr} 0 0x20000;" \
54 		"mmc rescan;" \
55 		"ext2load mmc ${mmcdev}:${mmcpart} ${loadaddr} env.txt;" \
56 		"env import -t ${loadaddr}\0" \
57 	"default_env=mw ${loadaddr} 0 0x20000;" \
58 		"env export -t ${loadaddr} serial# ethaddr eth1addr " \
59 		"board_type panel;" \
60 		"env default -a;" \
61 		"env import -t ${loadaddr}\0" \
62 	"loadbootscript=" \
63 		"ext2load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
64 	"bootscript=echo Running bootscript from mmc ...; " \
65 		"source\0" \
66 	"mmcpart=1\0" \
67 	"mmcdev=0\0" \
68 	"mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
69 	"mmcargs=setenv bootargs console=${console},${baudrate} " \
70 		"root=${mmcroot}\0" \
71 	"mmcboot=echo Booting from mmc ...; " \
72 		"run mmcargs addmtd addmisc set_fit_default;" \
73 		"bootm ${fit_addr_r}\0" \
74 	"mmc_load_fit=ext2load mmc ${mmcdev}:${mmcpart} ${fit_addr_r} " \
75 		"${fit_file}\0" \
76 	"mmc_load_uboot=ext2load mmc ${mmcdev}:${mmcpart} ${loadaddr} " \
77 		"${uboot}\0" \
78 	"mmc_upd_uboot=mw.b ${loadaddr} 0xff ${uboot_sz};" \
79 		"setexpr cmp_buf ${loadaddr} + ${uboot_sz};" \
80 		"setexpr uboot_maxsize ${uboot_sz} - 400;" \
81 		"mw.b ${cmp_buf} 0x00 ${uboot_sz};" \
82 		"run mmc_load_uboot;sf probe;sf erase 0 ${uboot_sz};" \
83 		"sf write ${loadaddr} 400 ${filesize};" \
84 		"sf read ${cmp_buf} 400 ${uboot_sz};" \
85 		"cmp.b ${loadaddr} ${cmp_buf} ${uboot_maxsize}\0" \
86 	"ubiboot=echo Booting from ubi ...; " \
87 		"run ubiargs addmtd addmisc set_fit_default;" \
88 		"bootm ${fit_addr_r}\0" \
89 	"rescueargs=setenv bootargs console=${console},${baudrate} " \
90 		"root=/dev/ram rw\0 " \
91 	"rescueboot=echo Booting rescue system from NOR ...; " \
92 		"run rescueargs addmtd addmisc set_fit_default;" \
93 		"bootm ${fit_addr_r}\0" \
94 	"rescue_load_fit=sf probe;sf read ${fit_addr_r} ${rescue_sys_addr} " \
95 		"${rescue_sys_length}; imi ${fit_addr_r}\0" \
96 	CONFIG_EXTRA_ENV_BOARD_SETTINGS
97 
98 #define CONFIG_BOOTCOMMAND \
99 	"mmc dev ${mmcdev};" \
100 	"if mmc rescan; then " \
101 		"if run loadbootscript; then " \
102 			"run bootscript; " \
103 		"else " \
104 			"if run mmc_load_fit; then " \
105 				"run mmcboot; " \
106 			"else " \
107 				"if run ubifs_load_fit; then " \
108 					"run ubiboot; " \
109 				"else " \
110 					"if run rescue_load_fit; then " \
111 						"run rescueboot; " \
112 					"else " \
113 						"echo RESCUE SYSTEM BOOT " \
114 							"FAILURE;" \
115 					"fi; " \
116 				"fi; " \
117 			"fi; " \
118 		"fi; " \
119 	"else " \
120 		"if run ubifs_load_fit; then " \
121 			"run ubiboot; " \
122 		"else " \
123 			"if run rescue_load_fit; then " \
124 				"run rescueboot; " \
125 			"else " \
126 				"echo RESCUE SYSTEM BOOT FAILURE;" \
127 			"fi; " \
128 		"fi; " \
129 	"fi"
130 
131 #define CONFIG_ARP_TIMEOUT		200UL
132 
133 #define CONFIG_SYS_MEMTEST_START	PHYS_SDRAM
134 #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + 0x100000)
135 #define CONFIG_SYS_MEMTEST_SCRATCH	0x10800000
136 
137 /* Physical Memory Map */
138 #define PHYS_SDRAM			MMDC0_ARB_BASE_ADDR
139 
140 #define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM
141 #define CONFIG_SYS_INIT_RAM_ADDR	IRAM_BASE_ADDR
142 #define CONFIG_SYS_INIT_RAM_SIZE	IRAM_SIZE
143 
144 #define CONFIG_SYS_INIT_SP_OFFSET \
145 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
146 #define CONFIG_SYS_INIT_SP_ADDR \
147 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
148 
149 /* Environment organization */
150 #define CONFIG_ENV_SIZE			(12 * 1024)
151 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
152 #define CONFIG_ENV_SECT_SIZE		(0x010000)
153 #define CONFIG_ENV_OFFSET		(0x0d0000)
154 #define CONFIG_ENV_OFFSET_REDUND	(0x0e0000)
155 
156 #define CONFIG_SYS_FSL_USDHC_NUM	2
157 
158 /* I2C */
159 #define CONFIG_SYS_I2C
160 #define CONFIG_SYS_I2C_MXC
161 #define CONFIG_SYS_I2C_MXC_I2C1		/* enable I2C bus 1 */
162 #define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
163 #define CONFIG_SYS_I2C_MXC_I2C3		/* enable I2C bus 3 */
164 #define CONFIG_SYS_I2C_SPEED		100000
165 #define CONFIG_SYS_I2C_SLAVE		0x7f
166 #define CONFIG_SYS_I2C_NOPROBES		{ {0, 0x00} }
167 
168 /* NAND stuff */
169 #define CONFIG_SYS_MAX_NAND_DEVICE	1
170 #define CONFIG_SYS_NAND_BASE		0x40000000
171 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
172 #define CONFIG_SYS_NAND_ONFI_DETECTION
173 
174 /* DMA stuff, needed for GPMI/MXS NAND support */
175 
176 /* RTC */
177 #define CONFIG_SYS_I2C_RTC_ADDR	0x68
178 #define CONFIG_SYS_RTC_BUS_NUM	2
179 #define CONFIG_RTC_M41T11
180 
181 /* USB Configs */
182 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
183 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET	/* For OTG port */
184 #define CONFIG_MXC_USB_PORTSC	(PORT_PTS_UTMI | PORT_PTS_PTW)
185 #define CONFIG_MXC_USB_FLAGS	0
186 
187 /* UBI support */
188 
189 /* Framebuffer */
190 #define CONFIG_VIDEO_IPUV3
191 /* check this console not needed, after test remove it */
192 #define CONFIG_VIDEO_BMP_RLE8
193 #define CONFIG_SPLASH_SCREEN
194 #define CONFIG_SPLASH_SCREEN_ALIGN
195 #define CONFIG_BMP_16BPP
196 #define CONFIG_VIDEO_LOGO
197 #define CONFIG_VIDEO_BMP_LOGO
198 #define CONFIG_IMX_VIDEO_SKIP
199 
200 #define CONFIG_PWM_IMX
201 #define CONFIG_IMX6_PWM_PER_CLK	66000000
202 
203 #endif /* __ARISTAINETOS_COMMON_CONFIG_H */
204