1 /* 2 * (C) Copyright 2015 3 * (C) Copyright 2014 4 * Heiko Schocher, DENX Software Engineering, hs@denx.de. 5 * 6 * Based on: 7 * Copyright (C) 2012 Freescale Semiconductor, Inc. 8 * 9 * Configuration settings for the Freescale i.MX6Q SabreSD board. 10 * 11 * SPDX-License-Identifier: GPL-2.0+ 12 */ 13 #ifndef __ARISTAINETOS_COMMON_CONFIG_H 14 #define __ARISTAINETOS_COMMON_CONFIG_H 15 16 #include "mx6_common.h" 17 18 #define CONFIG_MACH_TYPE 4501 19 #define CONFIG_MMCROOT "/dev/mmcblk0p1" 20 21 /* Size of malloc() pool */ 22 #define CONFIG_SYS_MALLOC_LEN (64 * SZ_1M) 23 24 #define CONFIG_MXC_UART 25 26 /* MMC Configs */ 27 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 28 29 #define CONFIG_FEC_MXC 30 #define CONFIG_MII 31 #define IMX_FEC_BASE ENET_BASE_ADDR 32 #define CONFIG_ETHPRIME "FEC" 33 #define CONFIG_FEC_MXC_PHYADDR 0 34 35 #define CONFIG_SPI_FLASH_MTD 36 #define CONFIG_MXC_SPI 37 #define CONFIG_SF_DEFAULT_SPEED 20000000 38 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 39 #define CONFIG_SYS_SPI_ST_ENABLE_WP_PIN 40 41 #define CONFIG_EXTRA_ENV_SETTINGS \ 42 "script=u-boot.scr\0" \ 43 "fit_file=/boot/system.itb\0" \ 44 "loadaddr=0x12000000\0" \ 45 "fit_addr_r=0x14000000\0" \ 46 "uboot=/boot/u-boot.imx\0" \ 47 "uboot_sz=d0000\0" \ 48 "rescue_sys_addr=f0000\0" \ 49 "rescue_sys_length=f10000\0" \ 50 "panel=lb07wv8\0" \ 51 "splashpos=m,m\0" \ 52 "console=" CONSOLE_DEV "\0" \ 53 "fdt_high=0xffffffff\0" \ 54 "initrd_high=0xffffffff\0" \ 55 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \ 56 "set_fit_default=fdt addr ${fit_addr_r};fdt set /configurations " \ 57 "default ${board_type}\0" \ 58 "get_env=mw ${loadaddr} 0 0x20000;" \ 59 "mmc rescan;" \ 60 "ext2load mmc ${mmcdev}:${mmcpart} ${loadaddr} env.txt;" \ 61 "env import -t ${loadaddr}\0" \ 62 "default_env=mw ${loadaddr} 0 0x20000;" \ 63 "env export -t ${loadaddr} serial# ethaddr eth1addr " \ 64 "board_type panel;" \ 65 "env default -a;" \ 66 "env import -t ${loadaddr}\0" \ 67 "loadbootscript=" \ 68 "ext2load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ 69 "bootscript=echo Running bootscript from mmc ...; " \ 70 "source\0" \ 71 "mmcpart=1\0" \ 72 "mmcdev=0\0" \ 73 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ 74 "mmcargs=setenv bootargs console=${console},${baudrate} " \ 75 "root=${mmcroot}\0" \ 76 "mmcboot=echo Booting from mmc ...; " \ 77 "run mmcargs addmtd addmisc set_fit_default;" \ 78 "bootm ${fit_addr_r}\0" \ 79 "mmc_load_fit=ext2load mmc ${mmcdev}:${mmcpart} ${fit_addr_r} " \ 80 "${fit_file}\0" \ 81 "mmc_load_uboot=ext2load mmc ${mmcdev}:${mmcpart} ${loadaddr} " \ 82 "${uboot}\0" \ 83 "mmc_upd_uboot=mw.b ${loadaddr} 0xff ${uboot_sz};" \ 84 "setexpr cmp_buf ${loadaddr} + ${uboot_sz};" \ 85 "setexpr uboot_maxsize ${uboot_sz} - 400;" \ 86 "mw.b ${cmp_buf} 0x00 ${uboot_sz};" \ 87 "run mmc_load_uboot;sf probe;sf erase 0 ${uboot_sz};" \ 88 "sf write ${loadaddr} 400 ${filesize};" \ 89 "sf read ${cmp_buf} 400 ${uboot_sz};" \ 90 "cmp.b ${loadaddr} ${cmp_buf} ${uboot_maxsize}\0" \ 91 "ubiboot=echo Booting from ubi ...; " \ 92 "run ubiargs addmtd addmisc set_fit_default;" \ 93 "bootm ${fit_addr_r}\0" \ 94 "rescueargs=setenv bootargs console=${console},${baudrate} " \ 95 "root=/dev/ram rw\0 " \ 96 "rescueboot=echo Booting rescue system from NOR ...; " \ 97 "run rescueargs addmtd addmisc set_fit_default;" \ 98 "bootm ${fit_addr_r}\0" \ 99 "rescue_load_fit=sf probe;sf read ${fit_addr_r} ${rescue_sys_addr} " \ 100 "${rescue_sys_length}; imi ${fit_addr_r}\0" \ 101 CONFIG_EXTRA_ENV_BOARD_SETTINGS 102 103 #define CONFIG_BOOTCOMMAND \ 104 "mmc dev ${mmcdev};" \ 105 "if mmc rescan; then " \ 106 "if run loadbootscript; then " \ 107 "run bootscript; " \ 108 "else " \ 109 "if run mmc_load_fit; then " \ 110 "run mmcboot; " \ 111 "else " \ 112 "if run ubifs_load_fit; then " \ 113 "run ubiboot; " \ 114 "else " \ 115 "if run rescue_load_fit; then " \ 116 "run rescueboot; " \ 117 "else " \ 118 "echo RESCUE SYSTEM BOOT " \ 119 "FAILURE;" \ 120 "fi; " \ 121 "fi; " \ 122 "fi; " \ 123 "fi; " \ 124 "else " \ 125 "if run ubifs_load_fit; then " \ 126 "run ubiboot; " \ 127 "else " \ 128 "if run rescue_load_fit; then " \ 129 "run rescueboot; " \ 130 "else " \ 131 "echo RESCUE SYSTEM BOOT FAILURE;" \ 132 "fi; " \ 133 "fi; " \ 134 "fi" 135 136 #define CONFIG_ARP_TIMEOUT 200UL 137 138 /* Print Buffer Size */ 139 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 140 141 #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM 142 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x100000) 143 #define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 144 145 /* Physical Memory Map */ 146 #define CONFIG_NR_DRAM_BANKS 1 147 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR 148 149 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 150 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 151 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 152 153 #define CONFIG_SYS_INIT_SP_OFFSET \ 154 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 155 #define CONFIG_SYS_INIT_SP_ADDR \ 156 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 157 158 /* Environment organization */ 159 #define CONFIG_ENV_SIZE (12 * 1024) 160 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT 161 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS 162 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS 163 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED 164 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE 165 #define CONFIG_ENV_SECT_SIZE (0x010000) 166 #define CONFIG_ENV_OFFSET (0x0d0000) 167 #define CONFIG_ENV_OFFSET_REDUND (0x0e0000) 168 169 #define CONFIG_SYS_FSL_USDHC_NUM 2 170 171 /* I2C */ 172 #define CONFIG_SYS_I2C 173 #define CONFIG_SYS_I2C_MXC 174 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 175 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 176 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ 177 #define CONFIG_SYS_I2C_SPEED 100000 178 #define CONFIG_SYS_I2C_SLAVE 0x7f 179 #define CONFIG_SYS_I2C_NOPROBES { {0, 0x00} } 180 181 /* NAND stuff */ 182 #define CONFIG_NAND_MXS 183 #define CONFIG_SYS_MAX_NAND_DEVICE 1 184 #define CONFIG_SYS_NAND_BASE 0x40000000 185 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 186 #define CONFIG_SYS_NAND_ONFI_DETECTION 187 188 /* DMA stuff, needed for GPMI/MXS NAND support */ 189 #define CONFIG_APBH_DMA 190 #define CONFIG_APBH_DMA_BURST 191 #define CONFIG_APBH_DMA_BURST8 192 193 /* RTC */ 194 #define CONFIG_SYS_I2C_RTC_ADDR 0x68 195 #define CONFIG_SYS_RTC_BUS_NUM 2 196 #define CONFIG_RTC_M41T11 197 198 /* USB Configs */ 199 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 200 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */ 201 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 202 #define CONFIG_MXC_USB_FLAGS 0 203 204 /* UBI support */ 205 #define CONFIG_MTD_PARTITIONS 206 #define CONFIG_MTD_DEVICE 207 208 #define CONFIG_HW_WATCHDOG 209 #define CONFIG_IMX_WATCHDOG 210 211 /* Framebuffer */ 212 #define CONFIG_VIDEO_IPUV3 213 /* check this console not needed, after test remove it */ 214 #define CONFIG_VIDEO_BMP_RLE8 215 #define CONFIG_SPLASH_SCREEN 216 #define CONFIG_SPLASH_SCREEN_ALIGN 217 #define CONFIG_BMP_16BPP 218 #define CONFIG_VIDEO_LOGO 219 #define CONFIG_VIDEO_BMP_LOGO 220 #define CONFIG_IPUV3_CLK 198000000 221 #define CONFIG_IMX_VIDEO_SKIP 222 223 #define CONFIG_PWM_IMX 224 #define CONFIG_IMX6_PWM_PER_CLK 66000000 225 226 #endif /* __ARISTAINETOS_COMMON_CONFIG_H */ 227