xref: /openbmc/u-boot/drivers/timer/Kconfig (revision 6bd041f0)
1menu "Timer Support"
2
3config TIMER
4	bool "Enable driver model for timer drivers"
5	depends on DM
6	help
7	  Enable driver model for timer access. It uses the same API as
8	  lib/time.c, but now implemented by the uclass. The first timer
9	  will be used. The timer is usually a 32 bits free-running up
10	  counter. There may be no real tick, and no timer interrupt.
11
12config TIMER_EARLY
13	bool "Allow timer to be used early in U-Boot"
14	depends on TIMER
15	help
16	  In some cases the timer must be accessible before driver model is
17	  active. Examples include when using CONFIG_TRACE to trace U-Boot's
18	  execution before driver model is set up. Enable this option to
19	  use an early timer. These functions must be supported by your timer
20	  driver: timer_early_get_count() and timer_early_get_rate().
21
22config ALTERA_TIMER
23	bool "Altera timer support"
24	depends on TIMER
25	help
26	  Select this to enable a timer for Altera devices. Please find
27	  details on the "Embedded Peripherals IP User Guide" of Altera.
28
29config SANDBOX_TIMER
30	bool "Sandbox timer support"
31	depends on SANDBOX && TIMER
32	help
33	  Select this to enable an emulated timer for sandbox. It gets
34	  time from host os.
35
36config X86_TSC_TIMER
37	bool "x86 Time-Stamp Counter (TSC) timer support"
38	depends on TIMER && X86
39	default y if X86
40	help
41	  Select this to enable Time-Stamp Counter (TSC) timer for x86.
42
43config OMAP_TIMER
44	bool "Omap timer support"
45	depends on TIMER
46	help
47	  Select this to enable an timer for Omap devices.
48
49config AST_TIMER
50	bool "Aspeed ast2400/ast2500 timer support"
51	depends on TIMER
52	default y if ARCH_ASPEED
53	help
54	  Select this to enable timer for Aspeed ast2400/ast2500 devices.
55	  This is a simple sys timer driver, it is compatible with lib/time.c,
56	  but does not support any interrupts. Even though SoC has 8 hardware
57	  counters, they are all treated as a single device by this driver.
58	  This is mostly because they all share several registers which
59	  makes it difficult to completely separate them.
60
61config STI_TIMER
62	bool "STi timer support"
63	depends on TIMER
64	default y if ARCH_STI
65	help
66	  Select this to enable a timer for STi devices.
67
68config ARC_TIMER
69	bool "ARC timer support"
70	depends on TIMER && ARC && CLK
71	help
72	  Select this to enable built-in ARC timers.
73	  ARC cores may have up to 2 built-in timers: timer0 and timer1,
74	  usually at least one of them exists. Either of them is supported
75	  in U-Boot.
76
77endmenu
78