1c8a7ba9eSThomas Choumenu "Timer Support" 2c8a7ba9eSThomas Chou 3c8a7ba9eSThomas Chouconfig TIMER 4435ae76eSBin Meng bool "Enable driver model for timer drivers" 5c8a7ba9eSThomas Chou depends on DM 6c8a7ba9eSThomas Chou help 7435ae76eSBin Meng Enable driver model for timer access. It uses the same API as 8435ae76eSBin Meng lib/time.c, but now implemented by the uclass. The first timer 9c8a7ba9eSThomas Chou will be used. The timer is usually a 32 bits free-running up 10c8a7ba9eSThomas Chou counter. There may be no real tick, and no timer interrupt. 11c8a7ba9eSThomas Chou 12c95fec31SSimon Glassconfig TIMER_EARLY 13c95fec31SSimon Glass bool "Allow timer to be used early in U-Boot" 14c95fec31SSimon Glass depends on TIMER 15c95fec31SSimon Glass help 16c95fec31SSimon Glass In some cases the timer must be accessible before driver model is 17c95fec31SSimon Glass active. Examples include when using CONFIG_TRACE to trace U-Boot's 18c95fec31SSimon Glass execution before driver model is set up. Enable this option to 19c95fec31SSimon Glass use an early timer. These functions must be supported by your timer 20c95fec31SSimon Glass driver: timer_early_get_count() and timer_early_get_rate(). 21c95fec31SSimon Glass 22a54915d8SThomas Chouconfig ALTERA_TIMER 23435ae76eSBin Meng bool "Altera timer support" 24a54915d8SThomas Chou depends on TIMER 25a54915d8SThomas Chou help 26435ae76eSBin Meng Select this to enable a timer for Altera devices. Please find 27a54915d8SThomas Chou details on the "Embedded Peripherals IP User Guide" of Altera. 28a54915d8SThomas Chou 299961a0b6SThomas Chouconfig SANDBOX_TIMER 30435ae76eSBin Meng bool "Sandbox timer support" 319961a0b6SThomas Chou depends on SANDBOX && TIMER 329961a0b6SThomas Chou help 339961a0b6SThomas Chou Select this to enable an emulated timer for sandbox. It gets 349961a0b6SThomas Chou time from host os. 359961a0b6SThomas Chou 367030f27eSBin Mengconfig X86_TSC_TIMER 377030f27eSBin Meng bool "x86 Time-Stamp Counter (TSC) timer support" 387030f27eSBin Meng depends on TIMER && X86 397030f27eSBin Meng default y if X86 407030f27eSBin Meng help 417030f27eSBin Meng Select this to enable Time-Stamp Counter (TSC) timer for x86. 427030f27eSBin Meng 43dadf3137SMugunthan V Nconfig OMAP_TIMER 44dadf3137SMugunthan V N bool "Omap timer support" 45dadf3137SMugunthan V N depends on TIMER 46dadf3137SMugunthan V N help 47dadf3137SMugunthan V N Select this to enable an timer for Omap devices. 48dadf3137SMugunthan V N 494697abeaSmaxims@google.comconfig AST_TIMER 504697abeaSmaxims@google.com bool "Aspeed ast2400/ast2500 timer support" 514697abeaSmaxims@google.com depends on TIMER 524697abeaSmaxims@google.com default y if ARCH_ASPEED 534697abeaSmaxims@google.com help 544697abeaSmaxims@google.com Select this to enable timer for Aspeed ast2400/ast2500 devices. 554697abeaSmaxims@google.com This is a simple sys timer driver, it is compatible with lib/time.c, 564697abeaSmaxims@google.com but does not support any interrupts. Even though SoC has 8 hardware 574697abeaSmaxims@google.com counters, they are all treated as a single device by this driver. 584697abeaSmaxims@google.com This is mostly because they all share several registers which 594697abeaSmaxims@google.com makes it difficult to completely separate them. 604697abeaSmaxims@google.com 61347cb2edSPatrice Chotardconfig STI_TIMER 62347cb2edSPatrice Chotard bool "STi timer support" 63347cb2edSPatrice Chotard depends on TIMER 64347cb2edSPatrice Chotard default y if ARCH_STI 65347cb2edSPatrice Chotard help 66347cb2edSPatrice Chotard Select this to enable a timer for STi devices. 67347cb2edSPatrice Chotard 68*ad9b5f77SVlad Zakharovconfig ARC_TIMER 69*ad9b5f77SVlad Zakharov bool "ARC timer support" 70*ad9b5f77SVlad Zakharov depends on TIMER && ARC && CLK 71*ad9b5f77SVlad Zakharov help 72*ad9b5f77SVlad Zakharov Select this to enable built-in ARC timers. 73*ad9b5f77SVlad Zakharov ARC cores may have up to 2 built-in timers: timer0 and timer1, 74*ad9b5f77SVlad Zakharov usually at least one of them exists. Either of them is supported 75*ad9b5f77SVlad Zakharov in U-Boot. 76*ad9b5f77SVlad Zakharov 77c8a7ba9eSThomas Chouendmenu 78