1c8a7ba9eSThomas Choumenu "Timer Support" 2c8a7ba9eSThomas Chou 3c8a7ba9eSThomas Chouconfig TIMER 4435ae76eSBin Meng bool "Enable driver model for timer drivers" 5c8a7ba9eSThomas Chou depends on DM 6c8a7ba9eSThomas Chou help 7435ae76eSBin Meng Enable driver model for timer access. It uses the same API as 8435ae76eSBin Meng lib/time.c, but now implemented by the uclass. The first timer 9c8a7ba9eSThomas Chou will be used. The timer is usually a 32 bits free-running up 10c8a7ba9eSThomas Chou counter. There may be no real tick, and no timer interrupt. 11c8a7ba9eSThomas Chou 12e9e5d9d2SPhilipp Tomsichconfig SPL_TIMER 13e9e5d9d2SPhilipp Tomsich bool "Enable driver model for timer drivers in SPL" 14e9e5d9d2SPhilipp Tomsich depends on TIMER && SPL 15e9e5d9d2SPhilipp Tomsich help 16e9e5d9d2SPhilipp Tomsich Enable support for timer drivers in SPL. These can be used to get 17e9e5d9d2SPhilipp Tomsich a timer value when in SPL, or perhaps for implementing a delay 18e9e5d9d2SPhilipp Tomsich function. This enables the drivers in drivers/timer as part of an 19e9e5d9d2SPhilipp Tomsich SPL build. 20e9e5d9d2SPhilipp Tomsich 21e9e5d9d2SPhilipp Tomsichconfig TPL_TIMER 22e9e5d9d2SPhilipp Tomsich bool "Enable driver model for timer drivers in TPL" 23e9e5d9d2SPhilipp Tomsich depends on TIMER && TPL 24e9e5d9d2SPhilipp Tomsich help 25e9e5d9d2SPhilipp Tomsich Enable support for timer drivers in TPL. These can be used to get 26e9e5d9d2SPhilipp Tomsich a timer value when in TPL, or perhaps for implementing a delay 27e9e5d9d2SPhilipp Tomsich function. This enables the drivers in drivers/timer as part of an 28e9e5d9d2SPhilipp Tomsich TPL build. 29e9e5d9d2SPhilipp Tomsich 30c95fec31SSimon Glassconfig TIMER_EARLY 31c95fec31SSimon Glass bool "Allow timer to be used early in U-Boot" 32c95fec31SSimon Glass depends on TIMER 33c95fec31SSimon Glass help 34c95fec31SSimon Glass In some cases the timer must be accessible before driver model is 35c95fec31SSimon Glass active. Examples include when using CONFIG_TRACE to trace U-Boot's 36c95fec31SSimon Glass execution before driver model is set up. Enable this option to 37c95fec31SSimon Glass use an early timer. These functions must be supported by your timer 38c95fec31SSimon Glass driver: timer_early_get_count() and timer_early_get_rate(). 39c95fec31SSimon Glass 40a54915d8SThomas Chouconfig ALTERA_TIMER 41435ae76eSBin Meng bool "Altera timer support" 42a54915d8SThomas Chou depends on TIMER 43a54915d8SThomas Chou help 44435ae76eSBin Meng Select this to enable a timer for Altera devices. Please find 45a54915d8SThomas Chou details on the "Embedded Peripherals IP User Guide" of Altera. 46a54915d8SThomas Chou 4747edaea4SWenyou.Yang@microchip.comconfig ATMEL_PIT_TIMER 4847edaea4SWenyou.Yang@microchip.com bool "Atmel periodic interval timer support" 4947edaea4SWenyou.Yang@microchip.com depends on TIMER 5047edaea4SWenyou.Yang@microchip.com help 5147edaea4SWenyou.Yang@microchip.com Select this to enable a periodic interval timer for Atmel devices, 5247edaea4SWenyou.Yang@microchip.com it is designed to offer maximum accuracy and efficient management, 5347edaea4SWenyou.Yang@microchip.com even for systems with long response time. 5447edaea4SWenyou.Yang@microchip.com 5572c37d12SMichal Simekconfig CADENCE_TTC_TIMER 5672c37d12SMichal Simek bool "Cadence TTC (Triple Timer Counter)" 5772c37d12SMichal Simek depends on TIMER 5872c37d12SMichal Simek help 5972c37d12SMichal Simek Enables support for the cadence ttc driver. This driver is present 6072c37d12SMichal Simek on Xilinx Zynq and ZynqMP SoCs. 6172c37d12SMichal Simek 62*66011a08SMarek Vasutconfig DESIGNWARE_APB_TIMER 63*66011a08SMarek Vasut bool "Designware APB Timer" 64*66011a08SMarek Vasut depends on TIMER 65*66011a08SMarek Vasut help 66*66011a08SMarek Vasut Enables support for the Designware APB Timer driver. This timer is 67*66011a08SMarek Vasut present on Altera SoCFPGA SoCs. 68*66011a08SMarek Vasut 699961a0b6SThomas Chouconfig SANDBOX_TIMER 70435ae76eSBin Meng bool "Sandbox timer support" 719961a0b6SThomas Chou depends on SANDBOX && TIMER 729961a0b6SThomas Chou help 739961a0b6SThomas Chou Select this to enable an emulated timer for sandbox. It gets 749961a0b6SThomas Chou time from host os. 759961a0b6SThomas Chou 767030f27eSBin Mengconfig X86_TSC_TIMER 777030f27eSBin Meng bool "x86 Time-Stamp Counter (TSC) timer support" 787030f27eSBin Meng depends on TIMER && X86 797030f27eSBin Meng help 807030f27eSBin Meng Select this to enable Time-Stamp Counter (TSC) timer for x86. 817030f27eSBin Meng 82dadf3137SMugunthan V Nconfig OMAP_TIMER 83dadf3137SMugunthan V N bool "Omap timer support" 84dadf3137SMugunthan V N depends on TIMER 85dadf3137SMugunthan V N help 86dadf3137SMugunthan V N Select this to enable an timer for Omap devices. 87dadf3137SMugunthan V N 884697abeaSmaxims@google.comconfig AST_TIMER 894697abeaSmaxims@google.com bool "Aspeed ast2400/ast2500 timer support" 904697abeaSmaxims@google.com depends on TIMER 914697abeaSmaxims@google.com default y if ARCH_ASPEED 924697abeaSmaxims@google.com help 934697abeaSmaxims@google.com Select this to enable timer for Aspeed ast2400/ast2500 devices. 944697abeaSmaxims@google.com This is a simple sys timer driver, it is compatible with lib/time.c, 954697abeaSmaxims@google.com but does not support any interrupts. Even though SoC has 8 hardware 964697abeaSmaxims@google.com counters, they are all treated as a single device by this driver. 974697abeaSmaxims@google.com This is mostly because they all share several registers which 984697abeaSmaxims@google.com makes it difficult to completely separate them. 994697abeaSmaxims@google.com 100347cb2edSPatrice Chotardconfig STI_TIMER 101347cb2edSPatrice Chotard bool "STi timer support" 102347cb2edSPatrice Chotard depends on TIMER 103347cb2edSPatrice Chotard default y if ARCH_STI 104347cb2edSPatrice Chotard help 105347cb2edSPatrice Chotard Select this to enable a timer for STi devices. 106347cb2edSPatrice Chotard 107ad9b5f77SVlad Zakharovconfig ARC_TIMER 108ad9b5f77SVlad Zakharov bool "ARC timer support" 109ad9b5f77SVlad Zakharov depends on TIMER && ARC && CLK 110ad9b5f77SVlad Zakharov help 111ad9b5f77SVlad Zakharov Select this to enable built-in ARC timers. 112ad9b5f77SVlad Zakharov ARC cores may have up to 2 built-in timers: timer0 and timer1, 113ad9b5f77SVlad Zakharov usually at least one of them exists. Either of them is supported 114ad9b5f77SVlad Zakharov in U-Boot. 115ad9b5f77SVlad Zakharov 116f5076f86Srickconfig AG101P_TIMER 117b841b6e9Srick bool "AG101P timer support" 118b841b6e9Srick depends on TIMER && NDS32 119f5076f86Srick help 120b841b6e9Srick Select this to enable a timer for AG01P devices. 121b841b6e9Srick 122fa3e354bSRick Chenconfig ATCPIT100_TIMER 123fa3e354bSRick Chen bool "ATCPIT100 timer support" 1240f4a395fSRick Chen depends on TIMER 125b841b6e9Srick help 126fa3e354bSRick Chen Select this to enable a ATCPIT100 timer which will be embeded 127fa3e354bSRick Chen in AE3XX, AE250 boards. 128f5076f86Srick 1291168d2ddSPhilipp Tomsichconfig ROCKCHIP_TIMER 1301168d2ddSPhilipp Tomsich bool "Rockchip timer support" 1311168d2ddSPhilipp Tomsich depends on TIMER 1321168d2ddSPhilipp Tomsich help 1331168d2ddSPhilipp Tomsich Select this to enable support for the timer found on 1341168d2ddSPhilipp Tomsich Rockchip devices. 1351168d2ddSPhilipp Tomsich 1365120a083SPatrice Chotardconfig STM32_TIMER 1375120a083SPatrice Chotard bool "STM32 timer support" 1385120a083SPatrice Chotard depends on TIMER 1395120a083SPatrice Chotard help 1405120a083SPatrice Chotard Select this to enable support for the timer found on 1415120a083SPatrice Chotard STM32 devices. 1425120a083SPatrice Chotard 143c8a7ba9eSThomas Chouendmenu 144