xref: /openbmc/u-boot/drivers/spi/Kconfig (revision ec35e123) 
1menu "SPI Support"
2
3config DM_SPI
4	bool "Enable Driver Model for SPI drivers"
5	depends on DM
6	help
7	  Enable driver model for SPI. The SPI slave interface
8	  (spi_setup_slave(), spi_xfer(), etc.) is then implemented by
9	  the SPI uclass. Drivers provide methods to access the SPI
10	  buses that they control. The uclass interface is defined in
11	  include/spi.h. The existing spi_slave structure is attached
12	  as 'parent data' to every slave on each bus. Slaves
13	  typically use driver-private data instead of extending the
14	  spi_slave structure.
15
16if DM_SPI
17
18config ALTERA_SPI
19	bool "Altera SPI driver"
20	help
21	  Enable the Altera SPI driver. This driver can be used to
22	  access the SPI NOR flash on platforms embedding this Altera
23	  IP core. Please find details on the "Embedded Peripherals IP
24	  User Guide" of Altera.
25
26config ATH79_SPI
27	bool "Atheros SPI driver"
28	depends on ARCH_ATH79
29	help
30	  Enable the Atheros ar7xxx/ar9xxx SoC SPI driver, it was used
31	  to access SPI NOR flash and other SPI peripherals. This driver
32	  uses driver model and requires a device tree binding to operate.
33	  please refer to doc/device-tree-bindings/spi/spi-ath79.txt.
34
35config CADENCE_QSPI
36	bool "Cadence QSPI driver"
37	help
38	  Enable the Cadence Quad-SPI (QSPI) driver. This driver can be
39	  used to access the SPI NOR flash on platforms embedding this
40	  Cadence IP core.
41
42config DESIGNWARE_SPI
43	bool "Designware SPI driver"
44	help
45	  Enable the Designware SPI driver. This driver can be used to
46	  access the SPI NOR flash on platforms embedding this Designware
47	  IP core.
48
49config EXYNOS_SPI
50	bool "Samsung Exynos SPI driver"
51	help
52	  Enable the Samsung Exynos SPI driver. This driver can be used to
53	  access the SPI NOR flash on platforms embedding this Samsung
54	  Exynos IP core.
55
56config FSL_DSPI
57	bool "Freescale DSPI driver"
58	help
59	  Enable the Freescale DSPI driver. This driver can be used to
60	  access the SPI NOR flash and SPI Data flash on platforms embedding
61	  this Freescale DSPI IP core. LS102xA and Colibri VF50/VF61 platforms
62	  use this driver.
63
64config FSL_QSPI
65	bool "Freescale QSPI driver"
66	help
67	  Enable the Freescale Quad-SPI (QSPI) driver. This driver can be
68	  used to access the SPI NOR flash on platforms embedding this
69	  Freescale IP core.
70
71config ICH_SPI
72	bool "Intel ICH SPI driver"
73	help
74	  Enable the Intel ICH SPI driver. This driver can be used to
75	  access the SPI NOR flash on platforms embedding this Intel
76	  ICH IP core.
77
78config ROCKCHIP_SPI
79	bool "Rockchip SPI driver"
80	help
81	  Enable the Rockchip SPI driver, used to access SPI NOR flash and
82	  other SPI peripherals (such as the Chrome OS EC) on Rockchip SoCs.
83	  This uses driver model and requires a device tree binding to
84	  operate.
85
86config SANDBOX_SPI
87	bool "Sandbox SPI driver"
88	depends on SANDBOX && DM
89	help
90	  Enable SPI support for sandbox. This is an emulation of a real SPI
91	  bus. Devices can be attached to the bus using the device tree
92	  which specifies the driver to use. As an example, see this device
93	  tree fragment from sandbox.dts. It shows that the SPI bus has a
94	  single flash device on chip select 0 which is emulated by the driver
95	  for "sandbox,spi-flash", which is in drivers/mtd/spi/sandbox.c.
96
97	  spi@0 {
98		#address-cells = <1>;
99		#size-cells = <0>;
100		reg = <0>;
101		compatible = "sandbox,spi";
102		cs-gpios = <0>, <&gpio_a 0>;
103		flash@0 {
104			reg = <0>;
105			compatible = "spansion,m25p16", "sandbox,spi-flash";
106			spi-max-frequency = <40000000>;
107			sandbox,filename = "spi.bin";
108		};
109	  };
110
111config TEGRA114_SPI
112	bool "nVidia Tegra114 SPI driver"
113	help
114	  Enable the nVidia Tegra114 SPI driver. This driver can be used to
115	  access the SPI NOR flash on platforms embedding this nVidia Tegra114
116	  IP core.
117
118	  This controller is different than the older SoCs SPI controller and
119	  also register interface get changed with this controller.
120
121config TEGRA20_SFLASH
122	bool "nVidia Tegra20 Serial Flash controller driver"
123	help
124	  Enable the nVidia Tegra20 Serial Flash controller driver. This driver
125	  can be used to access the SPI NOR flash on platforms embedding this
126	  nVidia Tegra20 IP core.
127
128config TEGRA20_SLINK
129	bool "nVidia Tegra20/Tegra30 SLINK driver"
130	help
131	  Enable the nVidia Tegra20/Tegra30 SLINK driver. This driver can
132	  be used to access the SPI NOR flash on platforms embedding this
133	  nVidia Tegra20/Tegra30 IP cores.
134
135config TEGRA210_QSPI
136	bool "nVidia Tegra210 QSPI driver"
137	help
138	  Enable the Tegra Quad-SPI (QSPI) driver for T210. This driver
139	  be used to access SPI chips on platforms embedding this
140	  NVIDIA Tegra210 IP core.
141
142config XILINX_SPI
143	bool "Xilinx SPI driver"
144	help
145	  Enable the Xilinx SPI driver from the Xilinx EDK. This SPI
146	  controller support 8 bit SPI transfers only, with or w/o FIFO.
147	  For more info on Xilinx SPI Register Definitions and Overview
148	  see driver file - drivers/spi/xilinx_spi.c
149
150config ZYNQ_SPI
151	bool "Zynq SPI driver"
152	depends on ARCH_ZYNQ || ARCH_ZYNQMP
153	help
154	  Enable the Zynq SPI driver. This driver can be used to
155	  access the SPI NOR flash on platforms embedding this Zynq
156	  SPI IP core.
157
158config ZYNQ_QSPI
159	bool "Zynq QSPI driver"
160	depends on ARCH_ZYNQ
161	help
162	  Enable the Zynq Quad-SPI (QSPI) driver. This driver can be
163	  used to access the SPI NOR flash on platforms embedding this
164	  Zynq QSPI IP core. This IP is used to connect the flash in
165	  4-bit qspi, 8-bit dual stacked and shared 4-bit dual parallel.
166
167config OMAP3_SPI
168	bool "McSPI driver for OMAP"
169	help
170	  SPI master controller for OMAP24XX and later Multichannel SPI
171	  (McSPI). This driver be used to access SPI chips on platforms
172	  embedding this OMAP3 McSPI IP core.
173
174endif # if DM_SPI
175
176config FSL_ESPI
177	bool "Freescale eSPI driver"
178	help
179	  Enable the Freescale eSPI driver. This driver can be used to
180	  access the SPI interface and SPI NOR flash on platforms embedding
181	  this Freescale eSPI IP core.
182
183config TI_QSPI
184	bool "TI QSPI driver"
185	help
186	  Enable the TI Quad-SPI (QSPI) driver for DRA7xx and AM43xx evms.
187	  This driver support spi flash single, quad and memory reads.
188
189endmenu # menu "SPI Support"
190