xref: /openbmc/u-boot/drivers/spi/Kconfig (revision ce2f2d2a) 
1menu "SPI Support"
2
3config DM_SPI
4	bool "Enable Driver Model for SPI drivers"
5	depends on DM
6	help
7	  Enable driver model for SPI. The SPI slave interface
8	  (spi_setup_slave(), spi_xfer(), etc.) is then implemented by
9	  the SPI uclass. Drivers provide methods to access the SPI
10	  buses that they control. The uclass interface is defined in
11	  include/spi.h. The existing spi_slave structure is attached
12	  as 'parent data' to every slave on each bus. Slaves
13	  typically use driver-private data instead of extending the
14	  spi_slave structure.
15
16if DM_SPI
17
18config ALTERA_SPI
19	bool "Altera SPI driver"
20	help
21	  Enable the Altera SPI driver. This driver can be used to
22	  access the SPI NOR flash on platforms embedding this Altera
23	  IP core. Please find details on the "Embedded Peripherals IP
24	  User Guide" of Altera.
25
26config ATH79_SPI
27	bool "Atheros SPI driver"
28	depends on ARCH_ATH79
29	help
30	  Enable the Atheros ar7xxx/ar9xxx SoC SPI driver, it was used
31	  to access SPI NOR flash and other SPI peripherals. This driver
32	  uses driver model and requires a device tree binding to operate.
33	  please refer to doc/device-tree-bindings/spi/spi-ath79.txt.
34
35config CADENCE_QSPI
36	bool "Cadence QSPI driver"
37	help
38	  Enable the Cadence Quad-SPI (QSPI) driver. This driver can be
39	  used to access the SPI NOR flash on platforms embedding this
40	  Cadence IP core.
41
42config DESIGNWARE_SPI
43	bool "Designware SPI driver"
44	help
45	  Enable the Designware SPI driver. This driver can be used to
46	  access the SPI NOR flash on platforms embedding this Designware
47	  IP core.
48
49config EXYNOS_SPI
50	bool "Samsung Exynos SPI driver"
51	help
52	  Enable the Samsung Exynos SPI driver. This driver can be used to
53	  access the SPI NOR flash on platforms embedding this Samsung
54	  Exynos IP core.
55
56config FSL_DSPI
57	bool "Freescale DSPI driver"
58	help
59	  Enable the Freescale DSPI driver. This driver can be used to
60	  access the SPI NOR flash and SPI Data flash on platforms embedding
61	  this Freescale DSPI IP core. LS102xA and Colibri VF50/VF61 platforms
62	  use this driver.
63
64config ICH_SPI
65	bool "Intel ICH SPI driver"
66	help
67	  Enable the Intel ICH SPI driver. This driver can be used to
68	  access the SPI NOR flash on platforms embedding this Intel
69	  ICH IP core.
70
71config PIC32_SPI
72	bool "Microchip PIC32 SPI driver"
73	depends on MACH_PIC32
74	help
75	  Enable the Microchip PIC32 SPI driver. This driver can be used
76	  to access the SPI NOR flash, MMC-over-SPI on platforms based on
77	  Microchip PIC32 family devices.
78
79config ROCKCHIP_SPI
80	bool "Rockchip SPI driver"
81	help
82	  Enable the Rockchip SPI driver, used to access SPI NOR flash and
83	  other SPI peripherals (such as the Chrome OS EC) on Rockchip SoCs.
84	  This uses driver model and requires a device tree binding to
85	  operate.
86
87config SANDBOX_SPI
88	bool "Sandbox SPI driver"
89	depends on SANDBOX && DM
90	help
91	  Enable SPI support for sandbox. This is an emulation of a real SPI
92	  bus. Devices can be attached to the bus using the device tree
93	  which specifies the driver to use. As an example, see this device
94	  tree fragment from sandbox.dts. It shows that the SPI bus has a
95	  single flash device on chip select 0 which is emulated by the driver
96	  for "sandbox,spi-flash", which is in drivers/mtd/spi/sandbox.c.
97
98	  spi@0 {
99		#address-cells = <1>;
100		#size-cells = <0>;
101		reg = <0>;
102		compatible = "sandbox,spi";
103		cs-gpios = <0>, <&gpio_a 0>;
104		flash@0 {
105			reg = <0>;
106			compatible = "spansion,m25p16", "sandbox,spi-flash";
107			spi-max-frequency = <40000000>;
108			sandbox,filename = "spi.bin";
109		};
110	  };
111
112config TEGRA114_SPI
113	bool "nVidia Tegra114 SPI driver"
114	help
115	  Enable the nVidia Tegra114 SPI driver. This driver can be used to
116	  access the SPI NOR flash on platforms embedding this nVidia Tegra114
117	  IP core.
118
119	  This controller is different than the older SoCs SPI controller and
120	  also register interface get changed with this controller.
121
122config TEGRA20_SFLASH
123	bool "nVidia Tegra20 Serial Flash controller driver"
124	help
125	  Enable the nVidia Tegra20 Serial Flash controller driver. This driver
126	  can be used to access the SPI NOR flash on platforms embedding this
127	  nVidia Tegra20 IP core.
128
129config TEGRA20_SLINK
130	bool "nVidia Tegra20/Tegra30 SLINK driver"
131	help
132	  Enable the nVidia Tegra20/Tegra30 SLINK driver. This driver can
133	  be used to access the SPI NOR flash on platforms embedding this
134	  nVidia Tegra20/Tegra30 IP cores.
135
136config TEGRA210_QSPI
137	bool "nVidia Tegra210 QSPI driver"
138	help
139	  Enable the Tegra Quad-SPI (QSPI) driver for T210. This driver
140	  be used to access SPI chips on platforms embedding this
141	  NVIDIA Tegra210 IP core.
142
143config XILINX_SPI
144	bool "Xilinx SPI driver"
145	help
146	  Enable the Xilinx SPI driver from the Xilinx EDK. This SPI
147	  controller support 8 bit SPI transfers only, with or w/o FIFO.
148	  For more info on Xilinx SPI Register Definitions and Overview
149	  see driver file - drivers/spi/xilinx_spi.c
150
151config ZYNQ_SPI
152	bool "Zynq SPI driver"
153	depends on ARCH_ZYNQ || ARCH_ZYNQMP
154	help
155	  Enable the Zynq SPI driver. This driver can be used to
156	  access the SPI NOR flash on platforms embedding this Zynq
157	  SPI IP core.
158
159config ZYNQ_QSPI
160	bool "Zynq QSPI driver"
161	depends on ARCH_ZYNQ
162	help
163	  Enable the Zynq Quad-SPI (QSPI) driver. This driver can be
164	  used to access the SPI NOR flash on platforms embedding this
165	  Zynq QSPI IP core. This IP is used to connect the flash in
166	  4-bit qspi, 8-bit dual stacked and shared 4-bit dual parallel.
167
168config OMAP3_SPI
169	bool "McSPI driver for OMAP"
170	help
171	  SPI master controller for OMAP24XX and later Multichannel SPI
172	  (McSPI). This driver be used to access SPI chips on platforms
173	  embedding this OMAP3 McSPI IP core.
174
175endif # if DM_SPI
176
177config FSL_ESPI
178	bool "Freescale eSPI driver"
179	help
180	  Enable the Freescale eSPI driver. This driver can be used to
181	  access the SPI interface and SPI NOR flash on platforms embedding
182	  this Freescale eSPI IP core.
183
184config FSL_QSPI
185	bool "Freescale QSPI driver"
186	help
187	  Enable the Freescale Quad-SPI (QSPI) driver. This driver can be
188	  used to access the SPI NOR flash on platforms embedding this
189	  Freescale IP core.
190
191config TI_QSPI
192	bool "TI QSPI driver"
193	help
194	  Enable the TI Quad-SPI (QSPI) driver for DRA7xx and AM43xx evms.
195	  This driver support spi flash single, quad and memory reads.
196
197endmenu # menu "SPI Support"
198