xref: /openbmc/u-boot/drivers/spi/Kconfig (revision aa5e3e22) 
1menu "SPI Support"
2
3config DM_SPI
4	bool "Enable Driver Model for SPI drivers"
5	depends on DM
6	help
7	  Enable driver model for SPI. The SPI slave interface
8	  (spi_setup_slave(), spi_xfer(), etc.) is then implemented by
9	  the SPI uclass. Drivers provide methods to access the SPI
10	  buses that they control. The uclass interface is defined in
11	  include/spi.h. The existing spi_slave structure is attached
12	  as 'parent data' to every slave on each bus. Slaves
13	  typically use driver-private data instead of extending the
14	  spi_slave structure.
15
16if DM_SPI
17
18config ALTERA_SPI
19	bool "Altera SPI driver"
20	help
21	  Enable the Altera SPI driver. This driver can be used to
22	  access the SPI NOR flash on platforms embedding this Altera
23	  IP core. Please find details on the "Embedded Peripherals IP
24	  User Guide" of Altera.
25
26config ATH79_SPI
27	bool "Atheros SPI driver"
28	depends on ARCH_ATH79
29	help
30	  Enable the Atheros ar7xxx/ar9xxx SoC SPI driver, it was used
31	  to access SPI NOR flash and other SPI peripherals. This driver
32	  uses driver model and requires a device tree binding to operate.
33	  please refer to doc/device-tree-bindings/spi/spi-ath79.txt.
34
35config ATMEL_SPI
36	bool "Atmel SPI driver"
37	depends on ARCH_AT91
38	help
39	  This enables driver for the Atmel SPI Controller, present on
40	  many AT91 (ARM) chips. This driver can be used to access
41	  the SPI Flash, such as AT25DF321.
42
43config BCM63XX_HSSPI
44	bool "BCM63XX HSSPI driver"
45	depends on ARCH_BMIPS
46	help
47	  Enable the BCM6328 HSSPI driver. This driver can be used to
48	  access the SPI NOR flash on platforms embedding this Broadcom
49	  SPI core.
50
51config BCM63XX_SPI
52	bool "BCM6348 SPI driver"
53	depends on ARCH_BMIPS
54	help
55	  Enable the BCM6348/BCM6358 SPI driver. This driver can be used to
56	  access the SPI NOR flash on platforms embedding these Broadcom
57	  SPI cores.
58
59config CADENCE_QSPI
60	bool "Cadence QSPI driver"
61	help
62	  Enable the Cadence Quad-SPI (QSPI) driver. This driver can be
63	  used to access the SPI NOR flash on platforms embedding this
64	  Cadence IP core.
65
66config DESIGNWARE_SPI
67	bool "Designware SPI driver"
68	help
69	  Enable the Designware SPI driver. This driver can be used to
70	  access the SPI NOR flash on platforms embedding this Designware
71	  IP core.
72
73config EXYNOS_SPI
74	bool "Samsung Exynos SPI driver"
75	help
76	  Enable the Samsung Exynos SPI driver. This driver can be used to
77	  access the SPI NOR flash on platforms embedding this Samsung
78	  Exynos IP core.
79
80config FSL_DSPI
81	bool "Freescale DSPI driver"
82	help
83	  Enable the Freescale DSPI driver. This driver can be used to
84	  access the SPI NOR flash and SPI Data flash on platforms embedding
85	  this Freescale DSPI IP core. LS102xA and Colibri VF50/VF61 platforms
86	  use this driver.
87
88config ICH_SPI
89	bool "Intel ICH SPI driver"
90	help
91	  Enable the Intel ICH SPI driver. This driver can be used to
92	  access the SPI NOR flash on platforms embedding this Intel
93	  ICH IP core.
94
95config MVEBU_A3700_SPI
96	bool "Marvell Armada 3700 SPI driver"
97	help
98	  Enable the Marvell Armada 3700 SPI driver. This driver can be
99	  used to access the SPI NOR flash on platforms embedding this
100	  Marvell IP core.
101
102config PIC32_SPI
103	bool "Microchip PIC32 SPI driver"
104	depends on MACH_PIC32
105	help
106	  Enable the Microchip PIC32 SPI driver. This driver can be used
107	  to access the SPI NOR flash, MMC-over-SPI on platforms based on
108	  Microchip PIC32 family devices.
109
110config ROCKCHIP_SPI
111	bool "Rockchip SPI driver"
112	help
113	  Enable the Rockchip SPI driver, used to access SPI NOR flash and
114	  other SPI peripherals (such as the Chrome OS EC) on Rockchip SoCs.
115	  This uses driver model and requires a device tree binding to
116	  operate.
117
118config SANDBOX_SPI
119	bool "Sandbox SPI driver"
120	depends on SANDBOX && DM
121	help
122	  Enable SPI support for sandbox. This is an emulation of a real SPI
123	  bus. Devices can be attached to the bus using the device tree
124	  which specifies the driver to use. As an example, see this device
125	  tree fragment from sandbox.dts. It shows that the SPI bus has a
126	  single flash device on chip select 0 which is emulated by the driver
127	  for "sandbox,spi-flash", which is in drivers/mtd/spi/sandbox.c.
128
129	  spi@0 {
130		#address-cells = <1>;
131		#size-cells = <0>;
132		reg = <0>;
133		compatible = "sandbox,spi";
134		cs-gpios = <0>, <&gpio_a 0>;
135		flash@0 {
136			reg = <0>;
137			compatible = "spansion,m25p16", "sandbox,spi-flash";
138			spi-max-frequency = <40000000>;
139			sandbox,filename = "spi.bin";
140		};
141	  };
142
143config STM32_QSPI
144	bool "STM32F7 QSPI driver"
145	depends on STM32F7
146	help
147	  Enable the STM32F7 Quad-SPI (QSPI) driver. This driver can be
148	  used to access the SPI NOR flash chips on platforms embedding
149	  this ST IP core.
150
151config TEGRA114_SPI
152	bool "nVidia Tegra114 SPI driver"
153	help
154	  Enable the nVidia Tegra114 SPI driver. This driver can be used to
155	  access the SPI NOR flash on platforms embedding this nVidia Tegra114
156	  IP core.
157
158	  This controller is different than the older SoCs SPI controller and
159	  also register interface get changed with this controller.
160
161config TEGRA20_SFLASH
162	bool "nVidia Tegra20 Serial Flash controller driver"
163	help
164	  Enable the nVidia Tegra20 Serial Flash controller driver. This driver
165	  can be used to access the SPI NOR flash on platforms embedding this
166	  nVidia Tegra20 IP core.
167
168config TEGRA20_SLINK
169	bool "nVidia Tegra20/Tegra30 SLINK driver"
170	help
171	  Enable the nVidia Tegra20/Tegra30 SLINK driver. This driver can
172	  be used to access the SPI NOR flash on platforms embedding this
173	  nVidia Tegra20/Tegra30 IP cores.
174
175config TEGRA210_QSPI
176	bool "nVidia Tegra210 QSPI driver"
177	help
178	  Enable the Tegra Quad-SPI (QSPI) driver for T210. This driver
179	  be used to access SPI chips on platforms embedding this
180	  NVIDIA Tegra210 IP core.
181
182config XILINX_SPI
183	bool "Xilinx SPI driver"
184	help
185	  Enable the Xilinx SPI driver from the Xilinx EDK. This SPI
186	  controller support 8 bit SPI transfers only, with or w/o FIFO.
187	  For more info on Xilinx SPI Register Definitions and Overview
188	  see driver file - drivers/spi/xilinx_spi.c
189
190config ZYNQ_SPI
191	bool "Zynq SPI driver"
192	depends on ARCH_ZYNQ || ARCH_ZYNQMP
193	help
194	  Enable the Zynq SPI driver. This driver can be used to
195	  access the SPI NOR flash on platforms embedding this Zynq
196	  SPI IP core.
197
198config ZYNQ_QSPI
199	bool "Zynq QSPI driver"
200	depends on ARCH_ZYNQ
201	help
202	  Enable the Zynq Quad-SPI (QSPI) driver. This driver can be
203	  used to access the SPI NOR flash on platforms embedding this
204	  Zynq QSPI IP core. This IP is used to connect the flash in
205	  4-bit qspi, 8-bit dual stacked and shared 4-bit dual parallel.
206
207endif # if DM_SPI
208
209config SOFT_SPI
210	bool "Soft SPI driver"
211	help
212	 Enable Soft SPI driver. This driver is to use GPIO simulate
213	 the SPI protocol.
214
215config CF_SPI
216	bool "ColdFire SPI driver"
217	help
218	  Enable the ColdFire SPI driver. This driver can be used on
219	  some m68k SoCs.
220
221config FSL_ESPI
222	bool "Freescale eSPI driver"
223	help
224	  Enable the Freescale eSPI driver. This driver can be used to
225	  access the SPI interface and SPI NOR flash on platforms embedding
226	  this Freescale eSPI IP core.
227
228config FSL_QSPI
229	bool "Freescale QSPI driver"
230	help
231	  Enable the Freescale Quad-SPI (QSPI) driver. This driver can be
232	  used to access the SPI NOR flash on platforms embedding this
233	  Freescale IP core.
234
235config ATCSPI200_SPI
236	bool "Andestech ATCSPI200 SPI driver"
237	help
238	  Enable the Andestech ATCSPI200 SPI driver. This driver can be
239	  used to access the SPI flash on AE3XX and AE250 platforms embedding
240	  this Andestech IP core.
241
242config DAVINCI_SPI
243	bool "Davinci & Keystone SPI driver"
244	depends on ARCH_DAVINCI || ARCH_KEYSTONE
245	help
246	  Enable the Davinci SPI driver
247
248config SH_SPI
249	bool "SuperH SPI driver"
250	help
251	  Enable the SuperH SPI controller driver. This driver can be used
252	  on various SuperH SoCs, such as SH7757.
253
254config SH_QSPI
255	bool "Renesas Quad SPI driver"
256	help
257	  Enable the Renesas Quad SPI controller driver. This driver can be
258	  used on Renesas SoCs.
259
260config TI_QSPI
261	bool "TI QSPI driver"
262	help
263	  Enable the TI Quad-SPI (QSPI) driver for DRA7xx and AM43xx evms.
264	  This driver support spi flash single, quad and memory reads.
265
266config KIRKWOOD_SPI
267	bool "Marvell Kirkwood SPI Driver"
268	help
269	  Enable support for SPI on various Marvell SoCs, such as
270	  Kirkwood and Armada 375.
271
272config LPC32XX_SSP
273	bool "LPC32XX SPI Driver"
274	help
275	  Enable support for SPI on LPC32xx
276
277config MPC8XX_SPI
278	bool "MPC8XX SPI Driver"
279	depends on 8xx
280	help
281	  Enable support for SPI on MPC8XX
282
283config MPC8XXX_SPI
284	bool "MPC8XXX SPI Driver"
285	help
286	  Enable support for SPI on the MPC8XXX PowerPC SoCs.
287
288config MXC_SPI
289	bool "MXC SPI Driver"
290	help
291	  Enable the MXC SPI controller driver. This driver can be used
292	  on various i.MX SoCs such as i.MX31/35/51/6/7.
293
294config MXS_SPI
295	bool "MXS SPI Driver"
296	help
297	  Enable the MXS SPI controller driver. This driver can be used
298	  on the i.MX23 and i.MX28 SoCs.
299
300config OMAP3_SPI
301	bool "McSPI driver for OMAP"
302	help
303	  SPI master controller for OMAP24XX and later Multichannel SPI
304	  (McSPI). This driver be used to access SPI chips on platforms
305	  embedding this OMAP3 McSPI IP core.
306
307endmenu # menu "SPI Support"
308