xref: /openbmc/u-boot/drivers/pinctrl/Kconfig (revision 400b4acf)
1#
2# PINCTRL infrastructure and drivers
3#
4
5menu "Pin controllers"
6
7config PINCTRL
8	bool "Support pin controllers"
9	depends on DM
10	help
11	  This enables the basic support for pinctrl framework.  You may want
12	  to enable some more options depending on what you want to do.
13
14config PINCTRL_FULL
15	bool "Support full pin controllers"
16	depends on PINCTRL && OF_CONTROL
17	default y
18	help
19	  This provides Linux-compatible device tree interface for the pinctrl
20	  subsystem.  This feature depends on device tree configuration because
21	  it parses a device tree to look for the pinctrl device which the
22	  peripheral device is associated with.
23
24	  If this option is disabled (it is the only possible choice for non-DT
25	  boards), the pinctrl core provides no systematic mechanism for
26	  identifying peripheral devices, applying needed pinctrl settings.
27	  It is totally up to the implementation of each low-level driver.
28	  You can save memory footprint in return for some limitations.
29
30config PINCTRL_GENERIC
31	bool "Support generic pin controllers"
32	depends on PINCTRL_FULL
33	default y
34	help
35	  Say Y here if you want to use the pinctrl subsystem through the
36	  generic DT interface.  If enabled, some functions become available
37	  to parse common properties such as "pins", "groups", "functions" and
38	  some pin configuration parameters.  It would be easier if you only
39	  need the generic DT interface for pin muxing and pin configuration.
40	  If you need to handle vendor-specific DT properties, you can disable
41	  this option and implement your own set_state callback in the pinctrl
42	  operations.
43
44config PINMUX
45	bool "Support pin multiplexing controllers"
46	depends on PINCTRL_GENERIC
47	default y
48	help
49	  This option enables pin multiplexing through the generic pinctrl
50	  framework. Most SoCs have their own own multiplexing arrangement
51	  where a single pin can be used for several functions. An SoC pinctrl
52	  driver allows the required function to be selected for each pin.
53	  The driver is typically controlled by the device tree.
54
55config PINCONF
56	bool "Support pin configuration controllers"
57	depends on PINCTRL_GENERIC
58	help
59	  This option enables pin configuration through the generic pinctrl
60	  framework.
61
62config SPL_PINCTRL
63	bool "Support pin controlloers in SPL"
64	depends on SPL && SPL_DM
65	help
66	  This option is an SPL-variant of the PINCTRL option.
67	  See the help of PINCTRL for details.
68
69config SPL_PINCTRL_FULL
70	bool "Support full pin controllers in SPL"
71	depends on SPL_PINCTRL && SPL_OF_CONTROL
72	default y
73	help
74	  This option is an SPL-variant of the PINCTRL_FULL option.
75	  See the help of PINCTRL_FULL for details.
76
77config SPL_PINCTRL_GENERIC
78	bool "Support generic pin controllers in SPL"
79	depends on SPL_PINCTRL_FULL
80	default y
81	help
82	  This option is an SPL-variant of the PINCTRL_GENERIC option.
83	  See the help of PINCTRL_GENERIC for details.
84
85config SPL_PINMUX
86	bool "Support pin multiplexing controllers in SPL"
87	depends on SPL_PINCTRL_GENERIC
88	default y
89	help
90	  This option is an SPL-variant of the PINMUX option.
91	  See the help of PINMUX for details.
92	  The pinctrl subsystem can add a substantial overhead to the SPL
93	  image since it typically requires quite a few tables either in the
94	  driver or in the device tree. If this is acceptable and you need
95	  to adjust pin multiplexing in SPL in order to boot into U-Boot,
96	  enable this option. You will need to enable device tree in SPL
97	  for this to work.
98
99config SPL_PINCONF
100	bool "Support pin configuration controllers in SPL"
101	depends on SPL_PINCTRL_GENERIC
102	help
103	  This option is an SPL-variant of the PINCONF option.
104	  See the help of PINCONF for details.
105
106if PINCTRL || SPL_PINCTRL
107
108config PINCTRL_AR933X
109	bool "QCA/Athores ar933x pin control driver"
110	depends on DM && SOC_AR933X
111	help
112	  Support pin multiplexing control on QCA/Athores ar933x SoCs.
113	  The driver is controlled by a device tree node which contains
114	  both the GPIO definitions and pin control functions for each
115	  available multiplex function.
116
117config PINCTRL_AT91
118	bool "AT91 pinctrl driver"
119	depends on DM
120	help
121	  This option is to enable the AT91 pinctrl driver for AT91 PIO
122	  controller.
123
124	  AT91 PIO controller is a combined gpio-controller, pin-mux and
125	  pin-config module. Each I/O pin may be dedicated as a general-purpose
126	  I/O or be assigned to a function of an embedded peripheral. Each I/O
127	  pin has a glitch filter providing rejection of glitches lower than
128	  one-half of peripheral clock cycle and a debouncing filter providing
129	  rejection of unwanted pulses from key or push button operations. You
130	  can also control the multi-driver capability, pull-up and pull-down
131	  feature on each I/O pin.
132
133config PINCTRL_AT91PIO4
134	bool "AT91 PIO4 pinctrl driver"
135	depends on DM
136	help
137	  This option is to enable the AT91 pinctrl driver for AT91 PIO4
138	  controller which is available on SAMA5D2 SoC.
139
140config PINCTRL_PIC32
141	bool "Microchip PIC32 pin-control and pin-mux driver"
142	depends on DM && MACH_PIC32
143	default y
144	help
145	  Supports individual pin selection and configuration for each
146	  remappable peripheral available on Microchip PIC32
147	  SoCs. This driver is controlled by a device tree node which
148	  contains both GPIO defintion and pin control functions.
149
150config PINCTRL_QCA953X
151	bool "QCA/Athores qca953x pin control driver"
152	depends on DM && SOC_QCA953X
153	help
154	  Support pin multiplexing control on QCA/Athores qca953x SoCs.
155
156	  The driver is controlled by a device tree node which contains both
157	  the GPIO definitions and pin control functions for each available
158	  multiplex function.
159
160config PINCTRL_ROCKCHIP_RK3036
161	bool "Rockchip rk3036 pin control driver"
162	depends on DM
163	help
164	  Support pin multiplexing control on Rockchip rk3036 SoCs.
165
166	  The driver is controlled by a device tree node which contains both
167	  the GPIO definitions and pin control functions for each available
168	  multiplex function.
169
170config PINCTRL_ROCKCHIP_RK3188
171	bool "Rockchip rk3188 pin control driver"
172	depends on DM
173	help
174	  Support pin multiplexing control on Rockchip rk3188 SoCs.
175
176	  The driver is controlled by a device tree node which contains both
177	  the GPIO definitions and pin control functions for each available
178	  multiplex function.
179
180config PINCTRL_ROCKCHIP_RK3288
181	bool "Rockchip rk3288 pin control driver"
182	depends on DM
183	help
184	  Support pin multiplexing control on Rockchip rk3288 SoCs.
185
186	  The driver is controlled by a device tree node which contains both
187	  the GPIO definitions and pin control functions for each available
188	  multiplex function.
189
190config PINCTRL_ROCKCHIP_RK3328
191	bool "Rockchip rk3328 pin control driver"
192	depends on DM
193	help
194	  Support pin multiplexing control on Rockchip rk3328 SoCs.
195
196	  The driver is controlled by a device tree node which contains both
197	  the GPIO definitions and pin control functions for each available
198	  multiplex function.
199
200config PINCTRL_ROCKCHIP_RK3399
201	bool "Rockchip rk3399 pin control driver"
202	depends on DM
203	help
204	  Support pin multiplexing control on Rockchip rk3399 SoCs.
205
206	  The driver is controlled by a device tree node which contains both
207	  the GPIO definitions and pin control functions for each available
208	  multiplex function.
209
210config PINCTRL_SANDBOX
211	bool "Sandbox pinctrl driver"
212	depends on SANDBOX
213	help
214	  This enables pinctrl driver for sandbox.
215
216	  Currently, this driver actually does nothing but print debug
217	  messages when pinctrl operations are invoked.
218
219config PINCTRL_SINGLE
220	bool "Single register pin-control and pin-multiplex driver"
221	depends on DM
222	help
223	  This enables pinctrl driver for systems using a single register for
224	  pin configuration and multiplexing. TI's AM335X SoCs are examples of
225	  such systems.
226
227	  Depending on the platform make sure to also enable OF_TRANSLATE and
228	  eventually SPL_OF_TRANSLATE to get correct address translations.
229
230config PINCTRL_STI
231	bool "STMicroelectronics STi pin-control and pin-mux driver"
232	depends on DM && ARCH_STI
233	default y
234	help
235	  Support pin multiplexing control on STMicrolectronics STi SoCs.
236
237	  The driver is controlled by a device tree node which contains both
238	  the GPIO definitions and pin control functions for each available
239	  multiplex function.
240
241config PINCTRL_STM32
242	bool "ST STM32 pin control driver"
243	depends on DM
244	help
245	  Supports pin multiplexing control on stm32 SoCs.
246
247	  The driver is controlled by a device tree node which contains both
248	  the GPIO definitions and pin control functions for each available
249	  multiplex function.
250
251config ASPEED_AST2500_PINCTRL
252  bool "Aspeed AST2500 pin control driver"
253  depends on DM && PINCTRL_GENERIC && ASPEED_AST2500
254  default y
255  help
256    Support pin multiplexing control on Aspeed ast2500 SoC. The driver uses
257	Generic Pinctrl framework and is compatible with the Linux driver,
258	i.e. it uses the same device tree configuration.
259
260endif
261
262source "drivers/pinctrl/meson/Kconfig"
263source "drivers/pinctrl/nxp/Kconfig"
264source "drivers/pinctrl/uniphier/Kconfig"
265source "drivers/pinctrl/exynos/Kconfig"
266source "drivers/pinctrl/mvebu/Kconfig"
267
268endmenu
269