1# 2# PINCTRL infrastructure and drivers 3# 4 5menu "Pin controllers" 6 7config PINCTRL 8 bool "Support pin controllers" 9 depends on DM 10 help 11 This enables the basic support for pinctrl framework. You may want 12 to enable some more options depending on what you want to do. 13 14config PINCTRL_FULL 15 bool "Support full pin controllers" 16 depends on PINCTRL && OF_CONTROL 17 default y 18 help 19 This provides Linux-compatible device tree interface for the pinctrl 20 subsystem. This feature depends on device tree configuration because 21 it parses a device tree to look for the pinctrl device which the 22 peripheral device is associated with. 23 24 If this option is disabled (it is the only possible choice for non-DT 25 boards), the pinctrl core provides no systematic mechanism for 26 identifying peripheral devices, applying needed pinctrl settings. 27 It is totally up to the implementation of each low-level driver. 28 You can save memory footprint in return for some limitations. 29 30config PINCTRL_GENERIC 31 bool "Support generic pin controllers" 32 depends on PINCTRL_FULL 33 default y 34 help 35 Say Y here if you want to use the pinctrl subsystem through the 36 generic DT interface. If enabled, some functions become available 37 to parse common properties such as "pins", "groups", "functions" and 38 some pin configuration parameters. It would be easier if you only 39 need the generic DT interface for pin muxing and pin configuration. 40 If you need to handle vendor-specific DT properties, you can disable 41 this option and implement your own set_state callback in the pinctrl 42 operations. 43 44config PINMUX 45 bool "Support pin multiplexing controllers" 46 depends on PINCTRL_GENERIC 47 default y 48 help 49 This option enables pin multiplexing through the generic pinctrl 50 framework. Most SoCs have their own multiplexing arrangement where 51 a single pin can be used for several functions. An SoC pinctrl driver 52 allows the required function to be selected for each pin. 53 The driver is typically controlled by the device tree. 54 55config PINCONF 56 bool "Support pin configuration controllers" 57 depends on PINCTRL_GENERIC 58 help 59 This option enables pin configuration through the generic pinctrl 60 framework. 61 62config SPL_PINCTRL 63 bool "Support pin controllers in SPL" 64 depends on SPL && SPL_DM 65 help 66 This option is an SPL-variant of the PINCTRL option. 67 See the help of PINCTRL for details. 68 69config SPL_PINCTRL_FULL 70 bool "Support full pin controllers in SPL" 71 depends on SPL_PINCTRL && SPL_OF_CONTROL 72 default n if TARGET_STM32F746_DISCO 73 default y 74 help 75 This option is an SPL-variant of the PINCTRL_FULL option. 76 See the help of PINCTRL_FULL for details. 77 78config SPL_PINCTRL_GENERIC 79 bool "Support generic pin controllers in SPL" 80 depends on SPL_PINCTRL_FULL 81 default y 82 help 83 This option is an SPL-variant of the PINCTRL_GENERIC option. 84 See the help of PINCTRL_GENERIC for details. 85 86config SPL_PINMUX 87 bool "Support pin multiplexing controllers in SPL" 88 depends on SPL_PINCTRL_GENERIC 89 default y 90 help 91 This option is an SPL-variant of the PINMUX option. 92 See the help of PINMUX for details. 93 The pinctrl subsystem can add a substantial overhead to the SPL 94 image since it typically requires quite a few tables either in the 95 driver or in the device tree. If this is acceptable and you need 96 to adjust pin multiplexing in SPL in order to boot into U-Boot, 97 enable this option. You will need to enable device tree in SPL 98 for this to work. 99 100config SPL_PINCONF 101 bool "Support pin configuration controllers in SPL" 102 depends on SPL_PINCTRL_GENERIC 103 help 104 This option is an SPL-variant of the PINCONF option. 105 See the help of PINCONF for details. 106 107if PINCTRL || SPL_PINCTRL 108 109config PINCTRL_AR933X 110 bool "QCA/Athores ar933x pin control driver" 111 depends on DM && SOC_AR933X 112 help 113 Support pin multiplexing control on QCA/Athores ar933x SoCs. 114 The driver is controlled by a device tree node which contains 115 both the GPIO definitions and pin control functions for each 116 available multiplex function. 117 118config PINCTRL_AT91 119 bool "AT91 pinctrl driver" 120 depends on DM 121 help 122 This option is to enable the AT91 pinctrl driver for AT91 PIO 123 controller. 124 125 AT91 PIO controller is a combined gpio-controller, pin-mux and 126 pin-config module. Each I/O pin may be dedicated as a general-purpose 127 I/O or be assigned to a function of an embedded peripheral. Each I/O 128 pin has a glitch filter providing rejection of glitches lower than 129 one-half of peripheral clock cycle and a debouncing filter providing 130 rejection of unwanted pulses from key or push button operations. You 131 can also control the multi-driver capability, pull-up and pull-down 132 feature on each I/O pin. 133 134config PINCTRL_AT91PIO4 135 bool "AT91 PIO4 pinctrl driver" 136 depends on DM 137 help 138 This option is to enable the AT91 pinctrl driver for AT91 PIO4 139 controller which is available on SAMA5D2 SoC. 140 141config PINCTRL_PIC32 142 bool "Microchip PIC32 pin-control and pin-mux driver" 143 depends on DM && MACH_PIC32 144 default y 145 help 146 Supports individual pin selection and configuration for each 147 remappable peripheral available on Microchip PIC32 148 SoCs. This driver is controlled by a device tree node which 149 contains both GPIO definition and pin control functions. 150 151config PINCTRL_QCA953X 152 bool "QCA/Athores qca953x pin control driver" 153 depends on DM && SOC_QCA953X 154 help 155 Support pin multiplexing control on QCA/Athores qca953x SoCs. 156 157 The driver is controlled by a device tree node which contains both 158 the GPIO definitions and pin control functions for each available 159 multiplex function. 160 161config PINCTRL_ROCKCHIP_RV1108 162 bool "Rockchip rv1108 pin control driver" 163 depends on DM 164 help 165 Support pin multiplexing control on Rockchip rv1108 SoC. 166 167 The driver is controlled by a device tree node which contains 168 both the GPIO definitions and pin control functions for each 169 available multiplex function. 170 171config PINCTRL_SANDBOX 172 bool "Sandbox pinctrl driver" 173 depends on SANDBOX 174 help 175 This enables pinctrl driver for sandbox. 176 177 Currently, this driver actually does nothing but print debug 178 messages when pinctrl operations are invoked. 179 180config PINCTRL_SINGLE 181 bool "Single register pin-control and pin-multiplex driver" 182 depends on DM 183 help 184 This enables pinctrl driver for systems using a single register for 185 pin configuration and multiplexing. TI's AM335X SoCs are examples of 186 such systems. 187 188 Depending on the platform make sure to also enable OF_TRANSLATE and 189 eventually SPL_OF_TRANSLATE to get correct address translations. 190 191config PINCTRL_STI 192 bool "STMicroelectronics STi pin-control and pin-mux driver" 193 depends on DM && ARCH_STI 194 default y 195 help 196 Support pin multiplexing control on STMicrolectronics STi SoCs. 197 198 The driver is controlled by a device tree node which contains both 199 the GPIO definitions and pin control functions for each available 200 multiplex function. 201 202config PINCTRL_STM32 203 bool "ST STM32 pin control driver" 204 depends on DM 205 help 206 Supports pin multiplexing control on stm32 SoCs. 207 208 The driver is controlled by a device tree node which contains both 209 the GPIO definitions and pin control functions for each available 210 multiplex function. 211 212endif 213 214source "drivers/pinctrl/aspeed/Kconfig" 215source "drivers/pinctrl/broadcom/Kconfig" 216source "drivers/pinctrl/exynos/Kconfig" 217source "drivers/pinctrl/mediatek/Kconfig" 218source "drivers/pinctrl/meson/Kconfig" 219source "drivers/pinctrl/mscc/Kconfig" 220source "drivers/pinctrl/mvebu/Kconfig" 221source "drivers/pinctrl/nxp/Kconfig" 222source "drivers/pinctrl/renesas/Kconfig" 223source "drivers/pinctrl/rockchip/Kconfig" 224source "drivers/pinctrl/uniphier/Kconfig" 225 226endmenu 227