xref: /openbmc/u-boot/drivers/pinctrl/Kconfig (revision 239ae4a9)
1#
2# PINCTRL infrastructure and drivers
3#
4
5menu "Pin controllers"
6
7config PINCTRL
8	bool "Support pin controllers"
9	depends on DM
10	help
11	  This enables the basic support for pinctrl framework.  You may want
12	  to enable some more options depending on what you want to do.
13
14config PINCTRL_FULL
15	bool "Support full pin controllers"
16	depends on PINCTRL && OF_CONTROL
17	default y
18	help
19	  This provides Linux-compatible device tree interface for the pinctrl
20	  subsystem.  This feature depends on device tree configuration because
21	  it parses a device tree to look for the pinctrl device which the
22	  peripheral device is associated with.
23
24	  If this option is disabled (it is the only possible choice for non-DT
25	  boards), the pinctrl core provides no systematic mechanism for
26	  identifying peripheral devices, applying needed pinctrl settings.
27	  It is totally up to the implementation of each low-level driver.
28	  You can save memory footprint in return for some limitations.
29
30config PINCTRL_GENERIC
31	bool "Support generic pin controllers"
32	depends on PINCTRL_FULL
33	default y
34	help
35	  Say Y here if you want to use the pinctrl subsystem through the
36	  generic DT interface.  If enabled, some functions become available
37	  to parse common properties such as "pins", "groups", "functions" and
38	  some pin configuration parameters.  It would be easier if you only
39	  need the generic DT interface for pin muxing and pin configuration.
40	  If you need to handle vendor-specific DT properties, you can disable
41	  this option and implement your own set_state callback in the pinctrl
42	  operations.
43
44config PINMUX
45	bool "Support pin multiplexing controllers"
46	depends on PINCTRL_GENERIC
47	default y
48	help
49	  This option enables pin multiplexing through the generic pinctrl
50	  framework. Most SoCs have their own own multiplexing arrangement
51	  where a single pin can be used for several functions. An SoC pinctrl
52	  driver allows the required function to be selected for each pin.
53	  The driver is typically controlled by the device tree.
54
55config PINCONF
56	bool "Support pin configuration controllers"
57	depends on PINCTRL_GENERIC
58	help
59	  This option enables pin configuration through the generic pinctrl
60	  framework.
61
62config SPL_PINCTRL
63	bool "Support pin controlloers in SPL"
64	depends on SPL && SPL_DM
65	help
66	  This option is an SPL-variant of the PINCTRL option.
67	  See the help of PINCTRL for details.
68
69config SPL_PINCTRL_FULL
70	bool "Support full pin controllers in SPL"
71	depends on SPL_PINCTRL && SPL_OF_CONTROL
72	default y
73	help
74	  This option is an SPL-variant of the PINCTRL_FULL option.
75	  See the help of PINCTRL_FULL for details.
76
77config SPL_PINCTRL_GENERIC
78	bool "Support generic pin controllers in SPL"
79	depends on SPL_PINCTRL_FULL
80	default y
81	help
82	  This option is an SPL-variant of the PINCTRL_GENERIC option.
83	  See the help of PINCTRL_GENERIC for details.
84
85config SPL_PINMUX
86	bool "Support pin multiplexing controllers in SPL"
87	depends on SPL_PINCTRL_GENERIC
88	default y
89	help
90	  This option is an SPL-variant of the PINMUX option.
91	  See the help of PINMUX for details.
92	  The pinctrl subsystem can add a substantial overhead to the SPL
93	  image since it typically requires quite a few tables either in the
94	  driver or in the device tree. If this is acceptable and you need
95	  to adjust pin multiplexing in SPL in order to boot into U-Boot,
96	  enable this option. You will need to enable device tree in SPL
97	  for this to work.
98
99config SPL_PINCONF
100	bool "Support pin configuration controllers in SPL"
101	depends on SPL_PINCTRL_GENERIC
102	help
103	  This option is an SPL-variant of the PINCONF option.
104	  See the help of PINCONF for details.
105
106if PINCTRL || SPL_PINCTRL
107
108config AR933X_PINCTRL
109	bool "QCA/Athores ar933x pin control driver"
110	depends on DM && SOC_AR933X
111	help
112	  Support pin multiplexing control on QCA/Athores ar933x SoCs.
113	  The driver is controlled by a device tree node which contains
114	  both the GPIO definitions and pin control functions for each
115	  available multiplex function.
116
117config QCA953X_PINCTRL
118	bool "QCA/Athores qca953x pin control driver"
119	depends on DM && SOC_QCA953X
120	help
121	  Support pin multiplexing control on QCA/Athores qca953x SoCs.
122	  The driver is controlled by a device tree node which contains
123	  both the GPIO definitions and pin control functions for each
124	  available multiplex function.
125
126config ROCKCHIP_RK3036_PINCTRL
127	bool "Rockchip rk3036 pin control driver"
128	depends on DM
129	help
130	  Support pin multiplexing control on Rockchip rk3036 SoCs. The driver is
131	  controlled by a device tree node which contains both the GPIO
132	  definitions and pin control functions for each available multiplex
133	  function.
134
135config ROCKCHIP_RK3188_PINCTRL
136	bool "Rockchip pin control driver"
137	depends on DM
138	help
139	  Support pin multiplexing control on Rockchip rk3188 SoCs. The driver
140	  is controlled by a device tree node which contains both the GPIO
141	  definitions and pin control functions for each available multiplex
142	  function.
143
144config ROCKCHIP_RK3288_PINCTRL
145	bool "Rockchip pin control driver"
146	depends on DM
147	help
148	  Support pin multiplexing control on Rockchip rk3288 SoCs. The driver
149	  is controlled by a device tree node which contains both the GPIO
150	  definitions and pin control functions for each available multiplex
151	  function.
152
153config PINCTRL_AT91PIO4
154	bool "AT91 PIO4 pinctrl driver"
155	depends on DM
156	help
157	  This option is to enable the AT91 pinctrl driver for AT91 PIO4
158	  controller which is available on SAMA5D2 SoC.
159
160config ROCKCHIP_RK3328_PINCTRL
161	bool "Rockchip pin control driver"
162	depends on DM
163	help
164	  Support pin multiplexing control on Rockchip rk3328 SoCs. The driver
165	  is controlled by a device tree node which contains both the GPIO
166	  definitions and pin control functions for each available multiplex
167	  function.
168
169config ROCKCHIP_RK3399_PINCTRL
170	bool "Rockchip pin control driver"
171	depends on DM
172	help
173	  Support pin multiplexing control on Rockchip rk3399 SoCs. The driver
174	  is controlled by a device tree node which contains both the GPIO
175	  definitions and pin control functions for each available multiplex
176	  function.
177
178config PINCTRL_SANDBOX
179	bool "Sandbox pinctrl driver"
180	depends on SANDBOX
181	help
182	  This enables pinctrl driver for sandbox.  Currently, this driver
183	  actually does nothing but print debug messages when pinctrl
184	  operations are invoked.
185
186config PIC32_PINCTRL
187	bool "Microchip PIC32 pin-control and pin-mux driver"
188	depends on DM && MACH_PIC32
189	default y
190	help
191	  Supports individual pin selection and configuration for each remappable
192	  peripheral available on Microchip PIC32 SoCs. This driver is controlled
193	  by a device tree node which contains both GPIO defintion and pin control
194	  functions.
195
196config PINCTRL_STI
197	bool "STMicroelectronics STi pin-control and pin-mux driver"
198	depends on DM && ARCH_STI
199	default y
200	help
201	  Support pin multiplexing control on STMicrolectronics STi SoCs.
202	  The driver is controlled by a device tree node which contains both
203	  the GPIO definitions and pin control functions for each available multiplex
204	  function.
205
206config PINCTRL_STM32
207	bool "ST STM32 pin control driver"
208	depends on DM
209	help
210	  Supports pin multiplexing control on stm32 SoCs. The driver is
211	  controlled by a device tree node which contains both the GPIO
212	  definitions and pin control functions for each available multiplex
213	  function.
214
215config PINCTRL_SINGLE
216	bool "Single register pin-control and pin-multiplex driver"
217	depends on DM
218	help
219	  This enables pinctrl driver for systems using a single register for
220	  pin configuration and multiplexing. TI's AM335X SoCs are examples of
221	  such systems.
222	  Depending on the platform make sure to also enable OF_TRANSLATE and
223	  eventually SPL_OF_TRANSLATE to get correct address translations.
224
225endif
226
227source "drivers/pinctrl/meson/Kconfig"
228source "drivers/pinctrl/nxp/Kconfig"
229source "drivers/pinctrl/uniphier/Kconfig"
230source "drivers/pinctrl/exynos/Kconfig"
231source "drivers/pinctrl/mvebu/Kconfig"
232
233endmenu
234