xref: /openbmc/u-boot/drivers/pci/Kconfig (revision ce2f2d2a)
1menu "PCI"
2
3config DM_PCI
4	bool "Enable driver mode for PCI"
5	depends on DM
6	help
7	  Use driver model for PCI. Driver model is the new method for
8	  orgnising devices in U-Boot. For PCI, driver model keeps track of
9	  available PCI devices, allows scanning of PCI buses and provides
10	  device configuration support.
11
12config DM_PCI_COMPAT
13	bool "Enable compatible functions for PCI"
14	depends on DM_PCI
15	help
16	  Enable compatibility functions for PCI so that old code can be used
17	  with CONFIG_DM_PCI enabled. This should be used as an interim
18	  measure when porting a board to use driver model for PCI. Once the
19	  board is fully supported, this option should be disabled.
20
21config PCI_SANDBOX
22	bool "Sandbox PCI support"
23	depends on SANDBOX && DM_PCI
24	help
25	  Support PCI on sandbox, as an emulated bus. This permits testing of
26	  PCI feature such as bus scanning, device configuration and device
27	  access. The available (emulated) devices are defined statically in
28	  the device tree but the normal PCI scan technique is used to find
29	  then.
30
31config PCI_TEGRA
32	bool "Tegra PCI support"
33	depends on TEGRA
34	depends on (TEGRA186 && POWER_DOMAIN) || (!TEGRA186)
35	help
36	  Enable support for the PCIe controller found on some generations of
37	  Tegra. Tegra20 has 2 root ports with a total of 4 lanes, Tegra30 has
38	  3 root ports with a total of 6 lanes and Tegra124 has 2 root ports
39	  with a total of 5 lanes. Some boards require this for Ethernet
40	  support to work (e.g. beaver, jetson-tk1).
41
42config PCI_XILINX
43	bool "Xilinx AXI Bridge for PCI Express"
44	depends on DM_PCI
45	help
46	  Enable support for the Xilinx AXI bridge for PCI express, an IP block
47	  which can be used on some generations of Xilinx FPGAs.
48
49endmenu
50