xref: /openbmc/u-boot/drivers/net/phy/Kconfig (revision 449ea2cd0d0c4e46c5b2b21480f34523dd928e33)
1af2cbfd6SAlex
2af2cbfd6SAlexconfig BITBANGMII
3af2cbfd6SAlex	bool "Bit-banged ethernet MII management channel support"
4af2cbfd6SAlex
5af2cbfd6SAlexconfig MV88E6352_SWITCH
6af2cbfd6SAlex	bool "Marvell 88E6352 switch support"
7af2cbfd6SAlex
8af2cbfd6SAlexmenuconfig PHYLIB
9af2cbfd6SAlex	bool "Ethernet PHY (physical media interface) support"
10af2cbfd6SAlex	help
11af2cbfd6SAlex	  Enable Ethernet PHY (physical media interface) support.
12af2cbfd6SAlex
13af2cbfd6SAlexif PHYLIB
14af2cbfd6SAlex
15af2cbfd6SAlexconfig MV88E61XX_SWITCH
16af2cbfd6SAlex	bool "Marvel MV88E61xx Ethernet switch PHY support."
17af2cbfd6SAlex
18b4f4b0f5STim Harveyif MV88E61XX_SWITCH
19b4f4b0f5STim Harvey
20b4f4b0f5STim Harveyconfig MV88E61XX_CPU_PORT
21b4f4b0f5STim Harvey	int "CPU Port"
22b4f4b0f5STim Harvey
23b4f4b0f5STim Harveyconfig MV88E61XX_PHY_PORTS
24b4f4b0f5STim Harvey	hex "Bitmask of PHY Ports"
25b4f4b0f5STim Harvey
26b4f4b0f5STim Harveyconfig MV88E61XX_FIXED_PORTS
27b4f4b0f5STim Harvey	hex "Bitmask of PHYless serdes Ports"
28b4f4b0f5STim Harvey
29b4f4b0f5STim Harveyendif # MV88E61XX_SWITCH
30b4f4b0f5STim Harvey
31af2cbfd6SAlexconfig PHYLIB_10G
32af2cbfd6SAlex	bool "Generic 10G PHY support"
33af2cbfd6SAlex
34af2cbfd6SAlexconfig PHY_AQUANTIA
35af2cbfd6SAlex	bool "Aquantia Ethernet PHYs support"
36af2cbfd6SAlex
37af2cbfd6SAlexconfig PHY_ATHEROS
38af2cbfd6SAlex	bool "Atheros Ethernet PHYs support"
39af2cbfd6SAlex
40af2cbfd6SAlexconfig PHY_BROADCOM
41af2cbfd6SAlex	bool "Broadcom Ethernet PHYs support"
42af2cbfd6SAlex
43af2cbfd6SAlexconfig PHY_CORTINA
44af2cbfd6SAlex	bool "Cortina Ethernet PHYs support"
45af2cbfd6SAlex
46af2cbfd6SAlexconfig PHY_DAVICOM
47af2cbfd6SAlex	bool "Davicom Ethernet PHYs support"
48af2cbfd6SAlex
49af2cbfd6SAlexconfig PHY_ET1011C
50af2cbfd6SAlex	bool "LSI TruePHY ET1011C support"
51af2cbfd6SAlex
52af2cbfd6SAlexconfig PHY_LXT
53af2cbfd6SAlex	bool "LXT971 Ethernet PHY support"
54af2cbfd6SAlex
55af2cbfd6SAlexconfig PHY_MARVELL
56af2cbfd6SAlex	bool "Marvell Ethernet PHYs support"
57af2cbfd6SAlex
58af2cbfd6SAlexconfig PHY_MICREL
59af2cbfd6SAlex	bool "Micrel Ethernet PHYs support"
60*449ea2cdSPhilipp Tomsich	help
61*449ea2cdSPhilipp Tomsich	  Enable support for the GbE PHYs manufactured by Micrel (now
62*449ea2cdSPhilipp Tomsich	  a part of Microchip). This includes drivers for the KSZ804,
63*449ea2cdSPhilipp Tomsich	  KSZ8031, KSZ8051, KSZ8081, KSZ8895, KSZ886x, KSZ8721
64*449ea2cdSPhilipp Tomsich	  either/or KSZ9021 (see the "Micrel KSZ9021 family support"
65*449ea2cdSPhilipp Tomsich	  config option for details), and KSZ9031 (if configured).
66*449ea2cdSPhilipp Tomsich
67*449ea2cdSPhilipp Tomsichif PHY_MICREL
68*449ea2cdSPhilipp Tomsich
69*449ea2cdSPhilipp Tomsichconfig PHY_MICREL_KSZ9021
70*449ea2cdSPhilipp Tomsich	bool "Micrel KSZ9021 family support"
71*449ea2cdSPhilipp Tomsich	select PHY_GIGE
72*449ea2cdSPhilipp Tomsich	help
73*449ea2cdSPhilipp Tomsich	  Enable support for the Micrel KSZ9021 GbE PHY family.  If
74*449ea2cdSPhilipp Tomsich	  enabled, the extended register read/write for KSZ9021 PHYs
75*449ea2cdSPhilipp Tomsich	  is supported through the 'mdio' command and any RGMII signal
76*449ea2cdSPhilipp Tomsich	  delays configured in the device tree will be applied to the
77*449ea2cdSPhilipp Tomsich	  PHY during initialisation.
78*449ea2cdSPhilipp Tomsich
79*449ea2cdSPhilipp Tomsich	  Note that the KSZ9021 uses the same part number os the
80*449ea2cdSPhilipp Tomsich	  KSZ8921BL, so enabling this option disables support for the
81*449ea2cdSPhilipp Tomsich	  KSZ8721BL.
82*449ea2cdSPhilipp Tomsich
83*449ea2cdSPhilipp Tomsichconfig PHY_MICREL_KSZ9031
84*449ea2cdSPhilipp Tomsich	bool "Micrel KSZ9031 family support"
85*449ea2cdSPhilipp Tomsich	select PHY_GIGE
86*449ea2cdSPhilipp Tomsich	help
87*449ea2cdSPhilipp Tomsich	  Enable support for the Micrel KSZ9031 GbE PHY family.  If
88*449ea2cdSPhilipp Tomsich	  enabled, the extended register read/write for KSZ9021 PHYs
89*449ea2cdSPhilipp Tomsich	  is supported through the 'mdio' command and any RGMII signal
90*449ea2cdSPhilipp Tomsich	  delays configured in the device tree will be applied to the
91*449ea2cdSPhilipp Tomsich	  PHY during initialisatioin.
92*449ea2cdSPhilipp Tomsich
93*449ea2cdSPhilipp Tomsichendif # PHY_MICREL
94af2cbfd6SAlex
95a5fd13adSJohn Haechtenconfig PHY_MSCC
96a5fd13adSJohn Haechten	bool "Microsemi Corp Ethernet PHYs support"
97a5fd13adSJohn Haechten
98af2cbfd6SAlexconfig PHY_NATSEMI
99af2cbfd6SAlex	bool "National Semiconductor Ethernet PHYs support"
100af2cbfd6SAlex
101af2cbfd6SAlexconfig PHY_REALTEK
102af2cbfd6SAlex	bool "Realtek Ethernet PHYs support"
103af2cbfd6SAlex
104af2cbfd6SAlexconfig RTL8211X_PHY_FORCE_MASTER
105af2cbfd6SAlex	bool "Ethernet PHY RTL8211x: force 1000BASE-T master mode"
106af2cbfd6SAlex	depends on PHY_REALTEK
107af2cbfd6SAlex	help
108af2cbfd6SAlex	  Force master mode for 1000BASE-T on RTl8211x PHYs (except for RTL8211F).
109af2cbfd6SAlex	  This can work around link stability and data corruption issues on gigabit
110af2cbfd6SAlex	  links which can occur in slave mode on certain PHYs, e.g. on the
111af2cbfd6SAlex	  RTL8211C(L).
112af2cbfd6SAlex
113af2cbfd6SAlex	  Please note that two directly connected devices (i.e. via crossover cable)
114af2cbfd6SAlex	  will not be able to establish a link between each other if they both force
115af2cbfd6SAlex	  master mode. Multiple devices forcing master mode when connected by a
116af2cbfd6SAlex	  network switch do not pose a problem as the switch configures its affected
117af2cbfd6SAlex	  ports into slave mode.
118af2cbfd6SAlex
119af2cbfd6SAlex	  This option only affects gigabit links. If you must establish a direct
120af2cbfd6SAlex	  connection between two devices which both force master mode, try forcing
121af2cbfd6SAlex	  the link speed to 100MBit/s.
122af2cbfd6SAlex
123af2cbfd6SAlex	  If unsure, say N.
124af2cbfd6SAlex
125af2cbfd6SAlexconfig PHY_SMSC
126af2cbfd6SAlex	bool  "Microchip(SMSC) Ethernet PHYs support"
127af2cbfd6SAlex
128af2cbfd6SAlexconfig PHY_TERANETICS
129af2cbfd6SAlex	bool "Teranetics Ethernet PHYs support"
130af2cbfd6SAlex
131af2cbfd6SAlexconfig PHY_TI
132af2cbfd6SAlex	bool "Texas Instruments Ethernet PHYs support"
133af2cbfd6SAlex
134af2cbfd6SAlexconfig PHY_VITESSE
135af2cbfd6SAlex	bool "Vitesse Ethernet PHYs support"
136af2cbfd6SAlex
137af2cbfd6SAlexconfig PHY_XILINX
138af2cbfd6SAlex	bool "Xilinx Ethernet PHYs support"
139af2cbfd6SAlex
140db40c1aaSHannes Schmelzerconfig PHY_FIXED
141db40c1aaSHannes Schmelzer	bool "Fixed-Link PHY"
142db40c1aaSHannes Schmelzer	depends on DM_ETH
143db40c1aaSHannes Schmelzer	help
144db40c1aaSHannes Schmelzer	  Fixed PHY is used for having a 'fixed-link' to another MAC with a direct
145db40c1aaSHannes Schmelzer	  connection (MII, RGMII, ...).
146db40c1aaSHannes Schmelzer	  There is nothing like autoneogation and so
147db40c1aaSHannes Schmelzer	  on, the link is always up with fixed speed and fixed duplex-setting.
148db40c1aaSHannes Schmelzer	  More information: doc/device-tree-bindings/net/fixed-link.txt
149db40c1aaSHannes Schmelzer
150af2cbfd6SAlexendif #PHYLIB
151