xref: /openbmc/u-boot/drivers/net/phy/Kconfig (revision 16879cd25a4089cde2f3393fb09567df53402679)
1af2cbfd6SAlex
2af2cbfd6SAlexconfig BITBANGMII
3af2cbfd6SAlex	bool "Bit-banged ethernet MII management channel support"
4af2cbfd6SAlex
5af2cbfd6SAlexconfig MV88E6352_SWITCH
6af2cbfd6SAlex	bool "Marvell 88E6352 switch support"
7af2cbfd6SAlex
8af2cbfd6SAlexmenuconfig PHYLIB
9af2cbfd6SAlex	bool "Ethernet PHY (physical media interface) support"
10c946b0e9SMichal Simek	depends on NET
11af2cbfd6SAlex	help
12af2cbfd6SAlex	  Enable Ethernet PHY (physical media interface) support.
13af2cbfd6SAlex
14af2cbfd6SAlexif PHYLIB
15af2cbfd6SAlex
16*16879cd2SJoe Hershbergerconfig PHY_ADDR_ENABLE
17*16879cd2SJoe Hershberger	bool "Limit phy address"
18*16879cd2SJoe Hershberger	default y if ARCH_SUNXI
19*16879cd2SJoe Hershberger	help
20*16879cd2SJoe Hershberger	  Select this if you want to control which phy address is used
21*16879cd2SJoe Hershberger
22*16879cd2SJoe Hershbergerif PHY_ADDR_ENABLE
23b30c4190SStefan Mavrodievconfig PHY_ADDR
24b30c4190SStefan Mavrodiev	int "PHY address"
25b30c4190SStefan Mavrodiev	default 1 if ARCH_SUNXI
26b30c4190SStefan Mavrodiev	default 0
27b30c4190SStefan Mavrodiev	help
28b30c4190SStefan Mavrodiev	  The address of PHY on MII bus. Usually in range of 0 to 31.
29*16879cd2SJoe Hershbergerendif
30b30c4190SStefan Mavrodiev
31137963d7SFlorian Fainelliconfig B53_SWITCH
32137963d7SFlorian Fainelli	bool "Broadcom BCM53xx (RoboSwitch) Ethernet switch PHY support."
33137963d7SFlorian Fainelli	help
34137963d7SFlorian Fainelli	  Enable support for Broadcom BCM53xx (RoboSwitch) Ethernet switches.
35137963d7SFlorian Fainelli	  This currently supports BCM53125 and similar models.
36137963d7SFlorian Fainelli
37137963d7SFlorian Fainelliif B53_SWITCH
38137963d7SFlorian Fainelli
39137963d7SFlorian Fainelliconfig B53_CPU_PORT
40137963d7SFlorian Fainelli	int "CPU port"
41137963d7SFlorian Fainelli	default 8
42137963d7SFlorian Fainelli
43137963d7SFlorian Fainelliconfig B53_PHY_PORTS
44137963d7SFlorian Fainelli	hex "Bitmask of PHY ports"
45137963d7SFlorian Fainelli
46137963d7SFlorian Fainelliendif # B53_SWITCH
47137963d7SFlorian Fainelli
48af2cbfd6SAlexconfig MV88E61XX_SWITCH
49af2cbfd6SAlex	bool "Marvel MV88E61xx Ethernet switch PHY support."
50af2cbfd6SAlex
51b4f4b0f5STim Harveyif MV88E61XX_SWITCH
52b4f4b0f5STim Harvey
53b4f4b0f5STim Harveyconfig MV88E61XX_CPU_PORT
54b4f4b0f5STim Harvey	int "CPU Port"
55b4f4b0f5STim Harvey
56b4f4b0f5STim Harveyconfig MV88E61XX_PHY_PORTS
57b4f4b0f5STim Harvey	hex "Bitmask of PHY Ports"
58b4f4b0f5STim Harvey
59b4f4b0f5STim Harveyconfig MV88E61XX_FIXED_PORTS
60b4f4b0f5STim Harvey	hex "Bitmask of PHYless serdes Ports"
61b4f4b0f5STim Harvey
62b4f4b0f5STim Harveyendif # MV88E61XX_SWITCH
63b4f4b0f5STim Harvey
64af2cbfd6SAlexconfig PHYLIB_10G
65af2cbfd6SAlex	bool "Generic 10G PHY support"
66af2cbfd6SAlex
67af2cbfd6SAlexconfig PHY_AQUANTIA
68af2cbfd6SAlex	bool "Aquantia Ethernet PHYs support"
69af2cbfd6SAlex
70af2cbfd6SAlexconfig PHY_ATHEROS
71af2cbfd6SAlex	bool "Atheros Ethernet PHYs support"
72af2cbfd6SAlex
73af2cbfd6SAlexconfig PHY_BROADCOM
74af2cbfd6SAlex	bool "Broadcom Ethernet PHYs support"
75af2cbfd6SAlex
76af2cbfd6SAlexconfig PHY_CORTINA
77af2cbfd6SAlex	bool "Cortina Ethernet PHYs support"
78af2cbfd6SAlex
79af2cbfd6SAlexconfig PHY_DAVICOM
80af2cbfd6SAlex	bool "Davicom Ethernet PHYs support"
81af2cbfd6SAlex
82af2cbfd6SAlexconfig PHY_ET1011C
83af2cbfd6SAlex	bool "LSI TruePHY ET1011C support"
84af2cbfd6SAlex
85af2cbfd6SAlexconfig PHY_LXT
86af2cbfd6SAlex	bool "LXT971 Ethernet PHY support"
87af2cbfd6SAlex
88af2cbfd6SAlexconfig PHY_MARVELL
89af2cbfd6SAlex	bool "Marvell Ethernet PHYs support"
90af2cbfd6SAlex
918995a96dSNeil Armstrongconfig PHY_MESON_GXL
928995a96dSNeil Armstrong	bool "Amlogic Meson GXL Internal PHY support"
938995a96dSNeil Armstrong
94af2cbfd6SAlexconfig PHY_MICREL
95af2cbfd6SAlex	bool "Micrel Ethernet PHYs support"
96449ea2cdSPhilipp Tomsich	help
97449ea2cdSPhilipp Tomsich	  Enable support for the GbE PHYs manufactured by Micrel (now
98449ea2cdSPhilipp Tomsich	  a part of Microchip). This includes drivers for the KSZ804,
99449ea2cdSPhilipp Tomsich	  KSZ8031, KSZ8051, KSZ8081, KSZ8895, KSZ886x, KSZ8721
100449ea2cdSPhilipp Tomsich	  either/or KSZ9021 (see the "Micrel KSZ9021 family support"
101449ea2cdSPhilipp Tomsich	  config option for details), and KSZ9031 (if configured).
102449ea2cdSPhilipp Tomsich
103449ea2cdSPhilipp Tomsichif PHY_MICREL
104449ea2cdSPhilipp Tomsich
105449ea2cdSPhilipp Tomsichconfig PHY_MICREL_KSZ9021
1069a31c739SAlexandru Gagniuc	bool
107449ea2cdSPhilipp Tomsich	select PHY_GIGE
108d397f7c4SAlexandru Gagniuc	select PHY_MICREL_KSZ90X1
109d397f7c4SAlexandru Gagniuc
110449ea2cdSPhilipp Tomsichconfig PHY_MICREL_KSZ9031
1119a31c739SAlexandru Gagniuc	bool
112449ea2cdSPhilipp Tomsich	select PHY_GIGE
113d397f7c4SAlexandru Gagniuc	select PHY_MICREL_KSZ90X1
114d397f7c4SAlexandru Gagniuc
115d397f7c4SAlexandru Gagniucconfig PHY_MICREL_KSZ90X1
116d397f7c4SAlexandru Gagniuc	bool "Micrel KSZ90x1 family support"
117d397f7c4SAlexandru Gagniuc	select PHY_GIGE
118d397f7c4SAlexandru Gagniuc	help
119d397f7c4SAlexandru Gagniuc	  Enable support for the Micrel KSZ9021 and KSZ9031 GbE PHYs. If
120d397f7c4SAlexandru Gagniuc	  enabled, the extended register read/write for KSZ90x1 PHYs
121d397f7c4SAlexandru Gagniuc	  is supported through the 'mdio' command and any RGMII signal
122d397f7c4SAlexandru Gagniuc	  delays configured in the device tree will be applied to the
123d397f7c4SAlexandru Gagniuc	  PHY during initialization.
124d397f7c4SAlexandru Gagniuc
125d397f7c4SAlexandru Gagniuc	  This should not be enabled at the same time with PHY_MICREL_KSZ8XXX
126d397f7c4SAlexandru Gagniuc	  as the KSZ9021 and KS8721 share the same ID.
127d397f7c4SAlexandru Gagniuc
128d397f7c4SAlexandru Gagniucconfig PHY_MICREL_KSZ8XXX
129d397f7c4SAlexandru Gagniuc	bool "Micrel KSZ8xxx family support"
130d397f7c4SAlexandru Gagniuc	default y if !PHY_MICREL_KSZ90X1
131d397f7c4SAlexandru Gagniuc	help
132d397f7c4SAlexandru Gagniuc	  Enable support for the 8000 series GbE PHYs manufactured by Micrel
133d397f7c4SAlexandru Gagniuc	  (now a part of Microchip). This includes drivers for the KSZ804,
134d397f7c4SAlexandru Gagniuc	  KSZ8031, KSZ8051, KSZ8081, KSZ8895, KSZ886x, and KSZ8721.
135d397f7c4SAlexandru Gagniuc
136d397f7c4SAlexandru Gagniuc	  This should not be enabled at the same time with PHY_MICREL_KSZ90X1
137d397f7c4SAlexandru Gagniuc	  as the KSZ9021 and KS8721 share the same ID.
138d397f7c4SAlexandru Gagniuc
139449ea2cdSPhilipp Tomsichendif # PHY_MICREL
140af2cbfd6SAlex
141a5fd13adSJohn Haechtenconfig PHY_MSCC
142a5fd13adSJohn Haechten	bool "Microsemi Corp Ethernet PHYs support"
143a5fd13adSJohn Haechten
144af2cbfd6SAlexconfig PHY_NATSEMI
145af2cbfd6SAlex	bool "National Semiconductor Ethernet PHYs support"
146af2cbfd6SAlex
147af2cbfd6SAlexconfig PHY_REALTEK
148af2cbfd6SAlex	bool "Realtek Ethernet PHYs support"
149af2cbfd6SAlex
15066526e70Skevans@FreeBSD.orgconfig RTL8211E_PINE64_GIGABIT_FIX
15166526e70Skevans@FreeBSD.org	bool "Fix gigabit throughput on some Pine64+ models"
15266526e70Skevans@FreeBSD.org	depends on PHY_REALTEK
15366526e70Skevans@FreeBSD.org	help
15466526e70Skevans@FreeBSD.org	  Configure the Realtek RTL8211E found on some Pine64+ models differently to
15566526e70Skevans@FreeBSD.org	  fix throughput on Gigabit links, turning off all internal delays in the
15666526e70Skevans@FreeBSD.org	  process. The settings that this touches are not documented in the CONFREG
15766526e70Skevans@FreeBSD.org	  section of the RTL8211E datasheet, but come from Realtek by way of the
15866526e70Skevans@FreeBSD.org	  Pine64 engineering team.
15966526e70Skevans@FreeBSD.org
160af2cbfd6SAlexconfig RTL8211X_PHY_FORCE_MASTER
161af2cbfd6SAlex	bool "Ethernet PHY RTL8211x: force 1000BASE-T master mode"
162af2cbfd6SAlex	depends on PHY_REALTEK
163af2cbfd6SAlex	help
164af2cbfd6SAlex	  Force master mode for 1000BASE-T on RTl8211x PHYs (except for RTL8211F).
165af2cbfd6SAlex	  This can work around link stability and data corruption issues on gigabit
166af2cbfd6SAlex	  links which can occur in slave mode on certain PHYs, e.g. on the
167af2cbfd6SAlex	  RTL8211C(L).
168af2cbfd6SAlex
169af2cbfd6SAlex	  Please note that two directly connected devices (i.e. via crossover cable)
170af2cbfd6SAlex	  will not be able to establish a link between each other if they both force
171af2cbfd6SAlex	  master mode. Multiple devices forcing master mode when connected by a
172af2cbfd6SAlex	  network switch do not pose a problem as the switch configures its affected
173af2cbfd6SAlex	  ports into slave mode.
174af2cbfd6SAlex
175af2cbfd6SAlex	  This option only affects gigabit links. If you must establish a direct
176af2cbfd6SAlex	  connection between two devices which both force master mode, try forcing
177af2cbfd6SAlex	  the link speed to 100MBit/s.
178af2cbfd6SAlex
179af2cbfd6SAlex	  If unsure, say N.
180af2cbfd6SAlex
181af2cbfd6SAlexconfig PHY_SMSC
182af2cbfd6SAlex	bool  "Microchip(SMSC) Ethernet PHYs support"
183af2cbfd6SAlex
184af2cbfd6SAlexconfig PHY_TERANETICS
185af2cbfd6SAlex	bool "Teranetics Ethernet PHYs support"
186af2cbfd6SAlex
187af2cbfd6SAlexconfig PHY_TI
188af2cbfd6SAlex	bool "Texas Instruments Ethernet PHYs support"
189af2cbfd6SAlex
190af2cbfd6SAlexconfig PHY_VITESSE
191af2cbfd6SAlex	bool "Vitesse Ethernet PHYs support"
192af2cbfd6SAlex
193af2cbfd6SAlexconfig PHY_XILINX
194af2cbfd6SAlex	bool "Xilinx Ethernet PHYs support"
195af2cbfd6SAlex
196db40c1aaSHannes Schmelzerconfig PHY_FIXED
197db40c1aaSHannes Schmelzer	bool "Fixed-Link PHY"
198db40c1aaSHannes Schmelzer	depends on DM_ETH
199db40c1aaSHannes Schmelzer	help
200db40c1aaSHannes Schmelzer	  Fixed PHY is used for having a 'fixed-link' to another MAC with a direct
201db40c1aaSHannes Schmelzer	  connection (MII, RGMII, ...).
202db40c1aaSHannes Schmelzer	  There is nothing like autoneogation and so
203db40c1aaSHannes Schmelzer	  on, the link is always up with fixed speed and fixed duplex-setting.
204db40c1aaSHannes Schmelzer	  More information: doc/device-tree-bindings/net/fixed-link.txt
205db40c1aaSHannes Schmelzer
206af2cbfd6SAlexendif #PHYLIB
207