1source "drivers/net/phy/Kconfig" 2source "drivers/net/pfe_eth/Kconfig" 3 4config DM_ETH 5 bool "Enable Driver Model for Ethernet drivers" 6 depends on DM 7 help 8 Enable driver model for Ethernet. 9 10 The eth_*() interface will be implemented by the UCLASS_ETH class 11 This is currently implemented in net/eth-uclass.c 12 Look in include/net.h for details. 13 14menuconfig NETDEVICES 15 bool "Network device support" 16 depends on NET 17 default y if DM_ETH 18 help 19 You must select Y to enable any network device support 20 Generally if you have any networking support this is a given 21 22 If unsure, say Y 23 24if NETDEVICES 25 26config PHY_GIGE 27 bool "Enable GbE PHY status parsing and configuration" 28 help 29 Enables support for parsing the status output and for 30 configuring GbE PHYs (affects the inner workings of some 31 commands and miiphyutil.c). 32 33config AG7XXX 34 bool "Atheros AG7xxx Ethernet MAC support" 35 depends on DM_ETH && ARCH_ATH79 36 select PHYLIB 37 help 38 This driver supports the Atheros AG7xxx Ethernet MAC. This MAC is 39 present in the Atheros AR7xxx, AR9xxx and QCA9xxx MIPS chips. 40 41 42config ALTERA_TSE 43 bool "Altera Triple-Speed Ethernet MAC support" 44 depends on DM_ETH 45 select PHYLIB 46 help 47 This driver supports the Altera Triple-Speed (TSE) Ethernet MAC. 48 Please find details on the "Triple-Speed Ethernet MegaCore Function 49 Resource Center" of Altera. 50 51config BCM_SF2_ETH 52 bool "Broadcom SF2 (Starfighter2) Ethernet support" 53 select PHYLIB 54 help 55 This is an abstract framework which provides a generic interface 56 to MAC and DMA management for multiple Broadcom SoCs such as 57 Cygnus, NSP and bcm28155_ap platforms. 58 59config BCM_SF2_ETH_DEFAULT_PORT 60 int "Broadcom SF2 (Starfighter2) Ethernet default port number" 61 depends on BCM_SF2_ETH 62 default 0 63 help 64 Default port number for the Starfighter2 ethernet driver. 65 66config BCM_SF2_ETH_GMAC 67 bool "Broadcom SF2 (Starfighter2) GMAC Ethernet support" 68 depends on BCM_SF2_ETH 69 help 70 This flag enables the ethernet support for Broadcom platforms with 71 GMAC such as Cygnus. This driver is based on the framework provided 72 by the BCM_SF2_ETH driver. 73 Say Y to any bcmcygnus based platforms. 74 75config DWC_ETH_QOS 76 bool "Synopsys DWC Ethernet QOS device support" 77 depends on DM_ETH 78 select PHYLIB 79 help 80 This driver supports the Synopsys Designware Ethernet QOS (Quality 81 Of Service) IP block. The IP supports many options for bus type, 82 clocking/reset structure, and feature list. This driver currently 83 supports the specific configuration used in NVIDIA's Tegra186 chip, 84 but should be extensible to other combinations quite easily. 85 86config E1000 87 bool "Intel PRO/1000 Gigabit Ethernet support" 88 help 89 This driver supports Intel(R) PRO/1000 gigabit ethernet family of 90 adapters. For more information on how to identify your adapter, go 91 to the Adapter & Driver ID Guide at: 92 93 <http://support.intel.com/support/network/adapter/pro100/21397.htm> 94 95config E1000_SPI_GENERIC 96 bool "Allow access to the Intel 8257x SPI bus" 97 depends on E1000 98 help 99 Allow generic access to the SPI bus on the Intel 8257x, for 100 example with the "sspi" command. 101 102config E1000_SPI 103 bool "Enable SPI bus utility code" 104 depends on E1000 105 help 106 Utility code for direct access to the SPI bus on Intel 8257x. 107 This does not do anything useful unless you set at least one 108 of CONFIG_CMD_E1000 or CONFIG_E1000_SPI_GENERIC. 109 110config CMD_E1000 111 bool "Enable the e1000 command" 112 depends on E1000 113 help 114 This enables the 'e1000' management command for E1000 devices. When 115 used on devices with SPI support you can reprogram the EEPROM from 116 U-Boot. 117 118config ETH_SANDBOX 119 depends on DM_ETH && SANDBOX 120 default y 121 bool "Sandbox: Mocked Ethernet driver" 122 help 123 This driver simply responds with fake ARP replies and ping 124 replies that are used to verify network stack functionality 125 126 This driver is particularly useful in the test/dm/eth.c tests 127 128config ETH_SANDBOX_RAW 129 depends on DM_ETH && SANDBOX 130 default y 131 bool "Sandbox: Bridge to Linux Raw Sockets" 132 help 133 This driver is a bridge from the bottom of the network stack 134 in U-Boot to the RAW AF_PACKET API in Linux. This allows real 135 network traffic to be tested from within sandbox. See 136 board/sandbox/README.sandbox for more details. 137 138config ETH_DESIGNWARE 139 bool "Synopsys Designware Ethernet MAC" 140 select PHYLIB 141 help 142 This MAC is present in SoCs from various vendors. It supports 143 100Mbit and 1 Gbit operation. You must enable CONFIG_PHYLIB to 144 provide the PHY (physical media interface). 145 146config ETH_DESIGNWARE_SOCFPGA 147 bool "Altera SoCFPGA extras for Synopsys Designware Ethernet MAC" 148 depends on DM_ETH && ETH_DESIGNWARE 149 help 150 The Altera SoCFPGA requires additional configuration of the 151 Altera system manager to correctly interface with the PHY. 152 This code handles those SoC specifics. 153 154config ETHOC 155 bool "OpenCores 10/100 Mbps Ethernet MAC" 156 help 157 This MAC is present in OpenRISC and Xtensa XTFPGA boards. 158 159config FEC_MXC_SHARE_MDIO 160 bool "Share the MDIO bus for FEC controller" 161 depends on FEC_MXC 162 163config FEC_MXC_MDIO_BASE 164 hex "MDIO base address for the FEC controller" 165 depends on FEC_MXC_SHARE_MDIO 166 help 167 This specifies the MDIO registers base address. It is used when 168 two FEC controllers share MDIO bus. 169 170config FEC_MXC 171 bool "FEC Ethernet controller" 172 depends on MX5 || MX6 || MX7 || IMX8 173 help 174 This driver supports the 10/100 Fast Ethernet controller for 175 NXP i.MX processors. 176 177config FTMAC100 178 bool "Ftmac100 Ethernet Support" 179 help 180 This MAC is present in Andestech SoCs. 181 182config FTGMAC100 183 bool "Ftgmac100 Ethernet Support" 184 depends on DM_ETH 185 select PHYLIB 186 help 187 This driver supports the Faraday's FTGMAC100 Gigabit SoC 188 Ethernet controller that can be found on Aspeed SoCs (which 189 include NCSI). 190 191 It is fully compliant with IEEE 802.3 specification for 192 10/100 Mbps Ethernet and IEEE 802.3z specification for 1000 193 Mbps Ethernet and includes Reduced Media Independent 194 Interface (RMII) and Reduced Gigabit Media Independent 195 Interface (RGMII) interfaces. It adopts an AHB bus interface 196 and integrates a link list DMA engine with direct M-Bus 197 accesses for transmitting and receiving packets. It has 198 independent TX/RX fifos, supports half and full duplex (1000 199 Mbps mode only supports full duplex), flow control for full 200 duplex and backpressure for half duplex. 201 202 The FTGMAC100 also implements IP, TCP, UDP checksum offloads 203 and supports IEEE 802.1Q VLAN tag insertion and removal. It 204 offers high-priority transmit queue for QoS and CoS 205 applications. 206 207 208config MVGBE 209 bool "Marvell Orion5x/Kirkwood network interface support" 210 depends on KIRKWOOD || ORION5X 211 select PHYLIB if DM_ETH 212 help 213 This driver supports the network interface units in the 214 Marvell Orion5x and Kirkwood SoCs 215 216config MVNETA 217 bool "Marvell Armada XP/385/3700 network interface support" 218 depends on ARMADA_XP || ARMADA_38X || ARMADA_3700 219 select PHYLIB 220 help 221 This driver supports the network interface units in the 222 Marvell ARMADA XP, ARMADA 38X and ARMADA 3700 SoCs 223 224config MVPP2 225 bool "Marvell Armada 375/7K/8K network interface support" 226 depends on ARMADA_375 || ARMADA_8K 227 select PHYLIB 228 help 229 This driver supports the network interface units in the 230 Marvell ARMADA 375, 7K and 8K SoCs. 231 232config MACB 233 bool "Cadence MACB/GEM Ethernet Interface" 234 depends on DM_ETH 235 select PHYLIB 236 help 237 The Cadence MACB ethernet interface is found on many Atmel 238 AT91 and SAMA5 parts. This driver also supports the Cadence 239 GEM (Gigabit Ethernet MAC) found in some ARM SoC devices. 240 Say Y to include support for the MACB/GEM chip. 241 242config MACB_ZYNQ 243 bool "Cadence MACB/GEM Ethernet Interface for Xilinx Zynq" 244 depends on MACB 245 help 246 The Cadence MACB ethernet interface was used on Zynq platform. 247 Say Y to enable support for the MACB/GEM in Zynq chip. 248 249config MT7628_ETH 250 bool "MediaTek MT7628 Ethernet Interface" 251 depends on ARCH_MT7620 252 help 253 The MediaTek MT7628 ethernet interface is used on MT7628 and 254 MT7688 based boards. 255 256config PCH_GBE 257 bool "Intel Platform Controller Hub EG20T GMAC driver" 258 depends on DM_ETH && DM_PCI 259 select PHYLIB 260 help 261 This MAC is present in Intel Platform Controller Hub EG20T. It 262 supports 10/100/1000 Mbps operation. 263 264config RGMII 265 bool "Enable RGMII" 266 help 267 Enable the support of the Reduced Gigabit Media-Independent 268 Interface (RGMII). 269 270config MII 271 bool "Enable MII" 272 help 273 Enable support of the Media-Independent Interface (MII) 274 275config RTL8139 276 bool "Realtek 8139 series Ethernet controller driver" 277 help 278 This driver supports Realtek 8139 series fast ethernet family of 279 PCI chipsets/adapters. 280 281config RTL8169 282 bool "Realtek 8169 series Ethernet controller driver" 283 help 284 This driver supports Realtek 8169 series gigabit ethernet family of 285 PCI/PCIe chipsets/adapters. 286 287config SMC911X 288 bool "SMSC LAN911x and LAN921x controller driver" 289 290if SMC911X 291 292config SMC911X_BASE 293 hex "SMC911X Base Address" 294 help 295 Define this to hold the physical address 296 of the device (I/O space) 297 298choice 299 prompt "SMC911X bus width" 300 default SMC911X_16_BIT 301 302config SMC911X_32_BIT 303 bool "Enable 32-bit interface" 304 305config SMC911X_16_BIT 306 bool "Enable 16-bit interface" 307 help 308 Define this if data bus is 16 bits. If your processor 309 automatically converts one 32 bit word to two 16 bit 310 words you may also try CONFIG_SMC911X_32_BIT. 311 312endchoice 313endif #SMC911X 314 315config SUN7I_GMAC 316 bool "Enable Allwinner GMAC Ethernet support" 317 help 318 Enable the support for Sun7i GMAC Ethernet controller 319 320config SUN7I_GMAC_FORCE_TXERR 321 bool "Force PA17 as gmac function" 322 depends on SUN7I_GMAC 323 help 324 Some ethernet phys needs TXERR control. Since the GMAC 325 doesn't have such signal, setting PA17 as GMAC function 326 makes the pin output low, which enables data transmission. 327 328config SUN4I_EMAC 329 bool "Allwinner Sun4i Ethernet MAC support" 330 depends on DM_ETH 331 select PHYLIB 332 help 333 This driver supports the Allwinner based SUN4I Ethernet MAC. 334 335config SUN8I_EMAC 336 bool "Allwinner Sun8i Ethernet MAC support" 337 depends on DM_ETH 338 select PHYLIB 339 select PHY_GIGE 340 help 341 This driver supports the Allwinner based SUN8I/SUN50I Ethernet MAC. 342 It can be found in H3/A64/A83T based SoCs and compatible with both 343 External and Internal PHYs. 344 345config SH_ETHER 346 bool "Renesas SH Ethernet MAC" 347 select PHYLIB 348 help 349 This driver supports the Ethernet for Renesas SH and ARM SoCs. 350 351source "drivers/net/ti/Kconfig" 352 353config XILINX_AXIEMAC 354 depends on DM_ETH && (MICROBLAZE || ARCH_ZYNQ || ARCH_ZYNQMP) 355 select PHYLIB 356 select MII 357 bool "Xilinx AXI Ethernet" 358 help 359 This MAC is present in Xilinx Microblaze, Zynq and ZynqMP SoCs. 360 361config XILINX_EMACLITE 362 depends on DM_ETH && (MICROBLAZE || ARCH_ZYNQ || ARCH_ZYNQMP || MIPS) 363 select PHYLIB 364 select MII 365 bool "Xilinx Ethernetlite" 366 help 367 This MAC is present in Xilinx Microblaze, Zynq and ZynqMP SoCs. 368 369config ZYNQ_GEM 370 depends on DM_ETH && (ARCH_ZYNQ || ARCH_ZYNQMP || ARCH_VERSAL) 371 select PHYLIB 372 bool "Xilinx Ethernet GEM" 373 help 374 This MAC is present in Xilinx Zynq and ZynqMP SoCs. 375 376config PIC32_ETH 377 bool "Microchip PIC32 Ethernet Support" 378 depends on DM_ETH && MACH_PIC32 379 select PHYLIB 380 help 381 This driver implements 10/100 Mbps Ethernet and MAC layer for 382 Microchip PIC32 microcontrollers. 383 384config GMAC_ROCKCHIP 385 bool "Rockchip Synopsys Designware Ethernet MAC" 386 depends on DM_ETH && ETH_DESIGNWARE 387 help 388 This driver provides Rockchip SoCs network support based on the 389 Synopsys Designware driver. 390 391config RENESAS_RAVB 392 bool "Renesas Ethernet AVB MAC" 393 depends on DM_ETH && RCAR_GEN3 394 select PHYLIB 395 help 396 This driver implements support for the Ethernet AVB block in 397 Renesas M3 and H3 SoCs. 398 399config MPC8XX_FEC 400 bool "Fast Ethernet Controller on MPC8XX" 401 depends on MPC8xx 402 select MII 403 help 404 This driver implements support for the Fast Ethernet Controller 405 on MPC8XX 406 407config SNI_AVE 408 bool "Socionext AVE Ethernet support" 409 depends on DM_ETH && ARCH_UNIPHIER 410 select PHYLIB 411 select SYSCON 412 select REGMAP 413 help 414 This driver implements support for the Socionext AVE Ethernet 415 controller, as found on the Socionext UniPhier family. 416 417config ETHER_ON_FEC1 418 bool "FEC1" 419 depends on MPC8XX_FEC 420 default y 421 422config FEC1_PHY 423 int "FEC1 PHY" 424 depends on ETHER_ON_FEC1 425 default -1 426 help 427 Define to the hardcoded PHY address which corresponds 428 to the given FEC; i. e. 429 #define CONFIG_FEC1_PHY 4 430 means that the PHY with address 4 is connected to FEC1 431 432 When set to -1, means to probe for first available. 433 434config PHY_NORXERR 435 bool "PHY_NORXERR" 436 depends on ETHER_ON_FEC1 437 default n 438 help 439 The PHY does not have a RXERR line (RMII only). 440 (so program the FEC to ignore it). 441 442config ETHER_ON_FEC2 443 bool "FEC2" 444 depends on MPC8XX_FEC && MPC885 445 default y 446 447config FEC2_PHY 448 int "FEC2 PHY" 449 depends on ETHER_ON_FEC2 450 default -1 451 help 452 Define to the hardcoded PHY address which corresponds 453 to the given FEC; i. e. 454 #define CONFIG_FEC1_PHY 4 455 means that the PHY with address 4 is connected to FEC1 456 457 When set to -1, means to probe for first available. 458 459config FEC2_PHY_NORXERR 460 bool "PHY_NORXERR" 461 depends on ETHER_ON_FEC2 462 default n 463 help 464 The PHY does not have a RXERR line (RMII only). 465 (so program the FEC to ignore it). 466 467config SYS_DPAA_QBMAN 468 bool "Device tree fixup for QBMan on freescale SOCs" 469 depends on (ARM || PPC) && !SPL_BUILD 470 default y if ARCH_B4860 || \ 471 ARCH_B4420 || \ 472 ARCH_P1023 || \ 473 ARCH_P2041 || \ 474 ARCH_T1023 || \ 475 ARCH_T1024 || \ 476 ARCH_T1040 || \ 477 ARCH_T1042 || \ 478 ARCH_T2080 || \ 479 ARCH_T2081 || \ 480 ARCH_T4240 || \ 481 ARCH_T4160 || \ 482 ARCH_P4080 || \ 483 ARCH_P3041 || \ 484 ARCH_P5040 || \ 485 ARCH_P5020 || \ 486 ARCH_LS1043A || \ 487 ARCH_LS1046A 488 help 489 QBman fixups to allow deep sleep in DPAA 1 SOCs 490 491config TSEC_ENET 492 select PHYLIB 493 bool "Enable Three-Speed Ethernet Controller" 494 help 495 This driver implements support for the (Enhanced) Three-Speed 496 Ethernet Controller found on Freescale SoCs. 497 498endif # NETDEVICES 499