1source "drivers/net/phy/Kconfig" 2source "drivers/net/pfe_eth/Kconfig" 3 4config DM_ETH 5 bool "Enable Driver Model for Ethernet drivers" 6 depends on DM 7 help 8 Enable driver model for Ethernet. 9 10 The eth_*() interface will be implemented by the UCLASS_ETH class 11 This is currently implemented in net/eth-uclass.c 12 Look in include/net.h for details. 13 14config DRIVER_TI_CPSW 15 bool "TI Common Platform Ethernet Switch" 16 select PHYLIB 17 help 18 This driver supports the TI three port switch gigabit ethernet 19 subsystem found in the TI SoCs. 20 21menuconfig NETDEVICES 22 bool "Network device support" 23 depends on NET 24 default y if DM_ETH 25 help 26 You must select Y to enable any network device support 27 Generally if you have any networking support this is a given 28 29 If unsure, say Y 30 31if NETDEVICES 32 33config PHY_GIGE 34 bool "Enable GbE PHY status parsing and configuration" 35 help 36 Enables support for parsing the status output and for 37 configuring GbE PHYs (affects the inner workings of some 38 commands and miiphyutil.c). 39 40config AG7XXX 41 bool "Atheros AG7xxx Ethernet MAC support" 42 depends on DM_ETH && ARCH_ATH79 43 select PHYLIB 44 help 45 This driver supports the Atheros AG7xxx Ethernet MAC. This MAC is 46 present in the Atheros AR7xxx, AR9xxx and QCA9xxx MIPS chips. 47 48 49config ALTERA_TSE 50 bool "Altera Triple-Speed Ethernet MAC support" 51 depends on DM_ETH 52 select PHYLIB 53 help 54 This driver supports the Altera Triple-Speed (TSE) Ethernet MAC. 55 Please find details on the "Triple-Speed Ethernet MegaCore Function 56 Resource Center" of Altera. 57 58config BCM_SF2_ETH 59 bool "Broadcom SF2 (Starfighter2) Ethernet support" 60 select PHYLIB 61 help 62 This is an abstract framework which provides a generic interface 63 to MAC and DMA management for multiple Broadcom SoCs such as 64 Cygnus, NSP and bcm28155_ap platforms. 65 66config BCM_SF2_ETH_DEFAULT_PORT 67 int "Broadcom SF2 (Starfighter2) Ethernet default port number" 68 depends on BCM_SF2_ETH 69 default 0 70 help 71 Default port number for the Starfighter2 ethernet driver. 72 73config BCM_SF2_ETH_GMAC 74 bool "Broadcom SF2 (Starfighter2) GMAC Ethernet support" 75 depends on BCM_SF2_ETH 76 help 77 This flag enables the ethernet support for Broadcom platforms with 78 GMAC such as Cygnus. This driver is based on the framework provided 79 by the BCM_SF2_ETH driver. 80 Say Y to any bcmcygnus based platforms. 81 82config DWC_ETH_QOS 83 bool "Synopsys DWC Ethernet QOS device support" 84 depends on DM_ETH 85 select PHYLIB 86 help 87 This driver supports the Synopsys Designware Ethernet QOS (Quality 88 Of Service) IP block. The IP supports many options for bus type, 89 clocking/reset structure, and feature list. This driver currently 90 supports the specific configuration used in NVIDIA's Tegra186 chip, 91 but should be extensible to other combinations quite easily. 92 93config E1000 94 bool "Intel PRO/1000 Gigabit Ethernet support" 95 help 96 This driver supports Intel(R) PRO/1000 gigabit ethernet family of 97 adapters. For more information on how to identify your adapter, go 98 to the Adapter & Driver ID Guide at: 99 100 <http://support.intel.com/support/network/adapter/pro100/21397.htm> 101 102config E1000_SPI_GENERIC 103 bool "Allow access to the Intel 8257x SPI bus" 104 depends on E1000 105 help 106 Allow generic access to the SPI bus on the Intel 8257x, for 107 example with the "sspi" command. 108 109config E1000_SPI 110 bool "Enable SPI bus utility code" 111 depends on E1000 112 help 113 Utility code for direct access to the SPI bus on Intel 8257x. 114 This does not do anything useful unless you set at least one 115 of CONFIG_CMD_E1000 or CONFIG_E1000_SPI_GENERIC. 116 117config CMD_E1000 118 bool "Enable the e1000 command" 119 depends on E1000 120 help 121 This enables the 'e1000' management command for E1000 devices. When 122 used on devices with SPI support you can reprogram the EEPROM from 123 U-Boot. 124 125config ETH_SANDBOX 126 depends on DM_ETH && SANDBOX 127 default y 128 bool "Sandbox: Mocked Ethernet driver" 129 help 130 This driver simply responds with fake ARP replies and ping 131 replies that are used to verify network stack functionality 132 133 This driver is particularly useful in the test/dm/eth.c tests 134 135config ETH_SANDBOX_RAW 136 depends on DM_ETH && SANDBOX 137 default y 138 bool "Sandbox: Bridge to Linux Raw Sockets" 139 help 140 This driver is a bridge from the bottom of the network stack 141 in U-Boot to the RAW AF_PACKET API in Linux. This allows real 142 network traffic to be tested from within sandbox. See 143 board/sandbox/README.sandbox for more details. 144 145config ETH_DESIGNWARE 146 bool "Synopsys Designware Ethernet MAC" 147 select PHYLIB 148 help 149 This MAC is present in SoCs from various vendors. It supports 150 100Mbit and 1 Gbit operation. You must enable CONFIG_PHYLIB to 151 provide the PHY (physical media interface). 152 153config ETHOC 154 bool "OpenCores 10/100 Mbps Ethernet MAC" 155 help 156 This MAC is present in OpenRISC and Xtensa XTFPGA boards. 157 158config FEC_MXC_SHARE_MDIO 159 bool "Share the MDIO bus for FEC controller" 160 depends on FEC_MXC 161 162config FEC_MXC_MDIO_BASE 163 hex "MDIO base address for the FEC controller" 164 depends on FEC_MXC_SHARE_MDIO 165 help 166 This specifies the MDIO registers base address. It is used when 167 two FEC controllers share MDIO bus. 168 169config FEC_MXC 170 bool "FEC Ethernet controller" 171 depends on MX5 || MX6 || MX7 172 help 173 This driver supports the 10/100 Fast Ethernet controller for 174 NXP i.MX processors. 175 176config FTMAC100 177 bool "Ftmac100 Ethernet Support" 178 help 179 This MAC is present in Andestech SoCs. 180 181config MVGBE 182 bool "Marvell Orion5x/Kirkwood network interface support" 183 depends on KIRKWOOD || ORION5X 184 select PHYLIB if DM_ETH 185 help 186 This driver supports the network interface units in the 187 Marvell Orion5x and Kirkwood SoCs 188 189config MVNETA 190 bool "Marvell Armada XP/385/3700 network interface support" 191 depends on ARMADA_XP || ARMADA_38X || ARMADA_3700 192 select PHYLIB 193 help 194 This driver supports the network interface units in the 195 Marvell ARMADA XP, ARMADA 38X and ARMADA 3700 SoCs 196 197config MVPP2 198 bool "Marvell Armada 375/7K/8K network interface support" 199 depends on ARMADA_375 || ARMADA_8K 200 select PHYLIB 201 help 202 This driver supports the network interface units in the 203 Marvell ARMADA 375, 7K and 8K SoCs. 204 205config MACB 206 bool "Cadence MACB/GEM Ethernet Interface" 207 depends on DM_ETH 208 select PHYLIB 209 help 210 The Cadence MACB ethernet interface is found on many Atmel 211 AT91 and SAMA5 parts. This driver also supports the Cadence 212 GEM (Gigabit Ethernet MAC) found in some ARM SoC devices. 213 Say Y to include support for the MACB/GEM chip. 214 215config MACB_ZYNQ 216 bool "Cadence MACB/GEM Ethernet Interface for Xilinx Zynq" 217 depends on MACB 218 help 219 The Cadence MACB ethernet interface was used on Zynq platform. 220 Say Y to enable support for the MACB/GEM in Zynq chip. 221 222config PCH_GBE 223 bool "Intel Platform Controller Hub EG20T GMAC driver" 224 depends on DM_ETH && DM_PCI 225 select PHYLIB 226 help 227 This MAC is present in Intel Platform Controller Hub EG20T. It 228 supports 10/100/1000 Mbps operation. 229 230config RGMII 231 bool "Enable RGMII" 232 help 233 Enable the support of the Reduced Gigabit Media-Independent 234 Interface (RGMII). 235 236config RTL8139 237 bool "Realtek 8139 series Ethernet controller driver" 238 help 239 This driver supports Realtek 8139 series fast ethernet family of 240 PCI chipsets/adapters. 241 242config RTL8169 243 bool "Realtek 8169 series Ethernet controller driver" 244 help 245 This driver supports Realtek 8169 series gigabit ethernet family of 246 PCI/PCIe chipsets/adapters. 247 248config SMC911X 249 bool "SMSC LAN911x and LAN921x controller driver" 250 251if SMC911X 252 253config SMC911X_BASE 254 hex "SMC911X Base Address" 255 help 256 Define this to hold the physical address 257 of the device (I/O space) 258 259choice 260 prompt "SMC911X bus width" 261 default SMC911X_16_BIT 262 263config SMC911X_32_BIT 264 bool "Enable 32-bit interface" 265 266config SMC911X_16_BIT 267 bool "Enable 16-bit interface" 268 help 269 Define this if data bus is 16 bits. If your processor 270 automatically converts one 32 bit word to two 16 bit 271 words you may also try CONFIG_SMC911X_32_BIT. 272 273endchoice 274endif #SMC911X 275 276config SUN7I_GMAC 277 bool "Enable Allwinner GMAC Ethernet support" 278 help 279 Enable the support for Sun7i GMAC Ethernet controller 280 281config SUN7I_GMAC_FORCE_TXERR 282 bool "Force PA17 as gmac function" 283 depends on SUN7I_GMAC 284 help 285 Some ethernet phys needs TXERR control. Since the GMAC 286 doesn't have such signal, setting PA17 as GMAC function 287 makes the pin output low, which enables data transmission. 288 289config SUN4I_EMAC 290 bool "Allwinner Sun4i Ethernet MAC support" 291 depends on DM_ETH 292 select PHYLIB 293 help 294 This driver supports the Allwinner based SUN4I Ethernet MAC. 295 296config SUN8I_EMAC 297 bool "Allwinner Sun8i Ethernet MAC support" 298 depends on DM_ETH 299 select PHYLIB 300 select PHY_GIGE 301 help 302 This driver supports the Allwinner based SUN8I/SUN50I Ethernet MAC. 303 It can be found in H3/A64/A83T based SoCs and compatible with both 304 External and Internal PHYs. 305 306config SH_ETHER 307 bool "Renesas SH Ethernet MAC" 308 select PHYLIB 309 help 310 This driver supports the Ethernet for Renesas SH and ARM SoCs. 311 312config XILINX_AXIEMAC 313 depends on DM_ETH && (MICROBLAZE || ARCH_ZYNQ || ARCH_ZYNQMP) 314 select PHYLIB 315 select MII 316 bool "Xilinx AXI Ethernet" 317 help 318 This MAC is present in Xilinx Microblaze, Zynq and ZynqMP SoCs. 319 320config XILINX_EMACLITE 321 depends on DM_ETH && (MICROBLAZE || ARCH_ZYNQ || ARCH_ZYNQMP || MIPS) 322 select PHYLIB 323 select MII 324 bool "Xilinx Ethernetlite" 325 help 326 This MAC is present in Xilinx Microblaze, Zynq and ZynqMP SoCs. 327 328config ZYNQ_GEM 329 depends on DM_ETH && (ARCH_ZYNQ || ARCH_ZYNQMP) 330 select PHYLIB 331 bool "Xilinx Ethernet GEM" 332 help 333 This MAC is present in Xilinx Zynq and ZynqMP SoCs. 334 335config PIC32_ETH 336 bool "Microchip PIC32 Ethernet Support" 337 depends on DM_ETH && MACH_PIC32 338 select PHYLIB 339 help 340 This driver implements 10/100 Mbps Ethernet and MAC layer for 341 Microchip PIC32 microcontrollers. 342 343config GMAC_ROCKCHIP 344 bool "Rockchip Synopsys Designware Ethernet MAC" 345 depends on DM_ETH && ETH_DESIGNWARE 346 help 347 This driver provides Rockchip SoCs network support based on the 348 Synopsys Designware driver. 349 350config RENESAS_RAVB 351 bool "Renesas Ethernet AVB MAC" 352 depends on DM_ETH && RCAR_GEN3 353 select PHYLIB 354 help 355 This driver implements support for the Ethernet AVB block in 356 Renesas M3 and H3 SoCs. 357 358config MPC8XX_FEC 359 bool "Fast Ethernet Controller on MPC8XX" 360 depends on MPC8xx 361 select MII 362 help 363 This driver implements support for the Fast Ethernet Controller 364 on MPC8XX 365 366config SNI_AVE 367 bool "Socionext AVE Ethernet support" 368 depends on DM_ETH && ARCH_UNIPHIER 369 select PHYLIB 370 select SYSCON 371 select REGMAP 372 help 373 This driver implements support for the Socionext AVE Ethernet 374 controller, as found on the Socionext UniPhier family. 375 376config ETHER_ON_FEC1 377 bool "FEC1" 378 depends on MPC8XX_FEC 379 default y 380 381config FEC1_PHY 382 int "FEC1 PHY" 383 depends on ETHER_ON_FEC1 384 default -1 385 help 386 Define to the hardcoded PHY address which corresponds 387 to the given FEC; i. e. 388 #define CONFIG_FEC1_PHY 4 389 means that the PHY with address 4 is connected to FEC1 390 391 When set to -1, means to probe for first available. 392 393config PHY_NORXERR 394 bool "PHY_NORXERR" 395 depends on ETHER_ON_FEC1 396 default n 397 help 398 The PHY does not have a RXERR line (RMII only). 399 (so program the FEC to ignore it). 400 401config ETHER_ON_FEC2 402 bool "FEC2" 403 depends on MPC8XX_FEC && MPC885 404 default y 405 406config FEC2_PHY 407 int "FEC2 PHY" 408 depends on ETHER_ON_FEC2 409 default -1 410 help 411 Define to the hardcoded PHY address which corresponds 412 to the given FEC; i. e. 413 #define CONFIG_FEC1_PHY 4 414 means that the PHY with address 4 is connected to FEC1 415 416 When set to -1, means to probe for first available. 417 418config FEC2_PHY_NORXERR 419 bool "PHY_NORXERR" 420 depends on ETHER_ON_FEC2 421 default n 422 help 423 The PHY does not have a RXERR line (RMII only). 424 (so program the FEC to ignore it). 425 426config SYS_DPAA_QBMAN 427 bool "Device tree fixup for QBMan on freescale SOCs" 428 depends on (ARM || PPC) && !SPL_BUILD 429 default y if ARCH_B4860 || \ 430 ARCH_B4420 || \ 431 ARCH_P1023 || \ 432 ARCH_P2041 || \ 433 ARCH_T1023 || \ 434 ARCH_T1024 || \ 435 ARCH_T1040 || \ 436 ARCH_T1042 || \ 437 ARCH_T2080 || \ 438 ARCH_T2081 || \ 439 ARCH_T4240 || \ 440 ARCH_T4160 || \ 441 ARCH_P4080 || \ 442 ARCH_P3041 || \ 443 ARCH_P5040 || \ 444 ARCH_P5020 || \ 445 ARCH_LS1043A || \ 446 ARCH_LS1046A 447 help 448 QBman fixups to allow deep sleep in DPAA 1 SOCs 449 450config TSEC_ENET 451 select PHYLIB 452 bool "Enable Three-Speed Ethernet Controller" 453 help 454 This driver implements support for the (Enhanced) Three-Speed 455 Ethernet Controller found on Freescale SoCs. 456 457endif # NETDEVICES 458