xref: /openbmc/u-boot/drivers/net/Kconfig (revision 46caea7f) 
1source "drivers/net/phy/Kconfig"
2
3config DM_ETH
4	bool "Enable Driver Model for Ethernet drivers"
5	depends on DM
6	help
7	  Enable driver model for Ethernet.
8
9	  The eth_*() interface will be implemented by the UC_ETH class
10	  This is currently implemented in net/eth.c
11	  Look in include/net.h for details.
12
13menuconfig NETDEVICES
14	bool "Network device support"
15	depends on NET
16	default y if DM_ETH
17	help
18	  You must select Y to enable any network device support
19	  Generally if you have any networking support this is a given
20
21	  If unsure, say Y
22
23if NETDEVICES
24
25config PHY_GIGE
26	bool "Enable GbE PHY status parsing and configuration"
27	help
28	  Enables support for parsing the status output and for
29	  configuring GbE PHYs (affects the inner workings of some
30	  commands and miiphyutil.c).
31
32config AG7XXX
33	bool "Atheros AG7xxx Ethernet MAC support"
34	depends on DM_ETH && ARCH_ATH79
35	select PHYLIB
36	help
37	  This driver supports the Atheros AG7xxx Ethernet MAC. This MAC is
38	  present in the Atheros AR7xxx, AR9xxx and QCA9xxx MIPS chips.
39
40
41config ALTERA_TSE
42	bool "Altera Triple-Speed Ethernet MAC support"
43	depends on DM_ETH
44	select PHYLIB
45	help
46	  This driver supports the Altera Triple-Speed (TSE) Ethernet MAC.
47	  Please find details on the "Triple-Speed Ethernet MegaCore Function
48	  Resource Center" of Altera.
49
50config BCM_SF2_ETH
51	bool "Broadcom SF2 (Starfighter2) Ethernet support"
52	select PHYLIB
53	help
54	  This is an abstract framework which provides a generic interface
55	  to MAC and DMA management for multiple Broadcom SoCs such as
56	  Cygnus, NSP and bcm28155_ap platforms.
57
58config BCM_SF2_ETH_DEFAULT_PORT
59	int "Broadcom SF2 (Starfighter2) Ethernet default port number"
60	depends on BCM_SF2_ETH
61	default 0
62	help
63	  Default port number for the Starfighter2 ethernet driver.
64
65config BCM_SF2_ETH_GMAC
66	bool "Broadcom SF2 (Starfighter2) GMAC Ethernet support"
67	depends on BCM_SF2_ETH
68	help
69	  This flag enables the ethernet support for Broadcom platforms with
70	  GMAC such as Cygnus. This driver is based on the framework provided
71	  by the BCM_SF2_ETH driver.
72	  Say Y to any bcmcygnus based platforms.
73
74config DWC_ETH_QOS
75	bool "Synopsys DWC Ethernet QOS device support"
76	depends on DM_ETH
77	select PHYLIB
78	help
79	  This driver supports the Synopsys Designware Ethernet QOS (Quality
80	  Of Service) IP block. The IP supports many options for bus type,
81	  clocking/reset structure, and feature list. This driver currently
82	  supports the specific configuration used in NVIDIA's Tegra186 chip,
83	  but should be extensible to other combinations quite easily.
84
85config E1000
86	bool "Intel PRO/1000 Gigabit Ethernet support"
87	help
88	  This driver supports Intel(R) PRO/1000 gigabit ethernet family of
89	  adapters.  For more information on how to identify your adapter, go
90	  to the Adapter & Driver ID Guide at:
91
92	  <http://support.intel.com/support/network/adapter/pro100/21397.htm>
93
94config E1000_SPI_GENERIC
95	bool "Allow access to the Intel 8257x SPI bus"
96	depends on E1000
97	help
98	  Allow generic access to the SPI bus on the Intel 8257x, for
99	  example with the "sspi" command.
100
101config E1000_SPI
102	bool "Enable SPI bus utility code"
103	depends on E1000
104	help
105	  Utility code for direct access to the SPI bus on Intel 8257x.
106	  This does not do anything useful unless you set at least one
107	  of CONFIG_CMD_E1000 or CONFIG_E1000_SPI_GENERIC.
108
109config CMD_E1000
110	bool "Enable the e1000 command"
111	depends on E1000
112	help
113	  This enables the 'e1000' management command for E1000 devices. When
114	  used on devices with SPI support you can reprogram the EEPROM from
115	  U-Boot.
116
117config ETH_SANDBOX
118	depends on DM_ETH && SANDBOX
119	default y
120	bool "Sandbox: Mocked Ethernet driver"
121	help
122	  This driver simply responds with fake ARP replies and ping
123	  replies that are used to verify network stack functionality
124
125	  This driver is particularly useful in the test/dm/eth.c tests
126
127config ETH_SANDBOX_RAW
128	depends on DM_ETH && SANDBOX
129	default y
130	bool "Sandbox: Bridge to Linux Raw Sockets"
131	help
132	  This driver is a bridge from the bottom of the network stack
133	  in U-Boot to the RAW AF_PACKET API in Linux. This allows real
134	  network traffic to be tested from within sandbox. See
135	  board/sandbox/README.sandbox for more details.
136
137config ETH_DESIGNWARE
138	bool "Synopsys Designware Ethernet MAC"
139	select PHYLIB
140	help
141	  This MAC is present in SoCs from various vendors. It supports
142	  100Mbit and 1 Gbit operation. You must enable CONFIG_PHYLIB to
143	  provide the PHY (physical media interface).
144
145config ETHOC
146	bool "OpenCores 10/100 Mbps Ethernet MAC"
147	help
148	  This MAC is present in OpenRISC and Xtensa XTFPGA boards.
149
150config FEC_MXC
151	bool "FEC Ethernet controller"
152	depends on MX5 || MX6
153	help
154	  This driver supports the 10/100 Fast Ethernet controller for
155	  NXP i.MX processors.
156
157config FTMAC100
158	bool "Ftmac100 Ethernet Support"
159	help
160	  This MAC is present in Andestech SoCs.
161
162config MVNETA
163	bool "Marvell Armada 385 network interface support"
164	depends on ARMADA_XP || ARMADA_38X
165	select PHYLIB
166	help
167	  This driver supports the network interface units in the
168	  Marvell ARMADA XP and 38X SoCs
169
170config MVPP2
171	bool "Marvell Armada 375/7K/8K network interface support"
172	depends on ARMADA_375 || ARMADA_8K
173	select PHYLIB
174	help
175	  This driver supports the network interface units in the
176	  Marvell ARMADA 375, 7K and 8K SoCs.
177
178config MACB
179	bool "Cadence MACB/GEM Ethernet Interface"
180	depends on DM_ETH
181	select PHYLIB
182	help
183	  The Cadence MACB ethernet interface is found on many Atmel
184	  AT91 and SAMA5 parts.  This driver also supports the Cadence
185	  GEM (Gigabit Ethernet MAC) found in some ARM SoC devices.
186	  Say Y to include support for the MACB/GEM chip.
187
188config PCH_GBE
189	bool "Intel Platform Controller Hub EG20T GMAC driver"
190	depends on DM_ETH && DM_PCI
191	select PHYLIB
192	help
193	  This MAC is present in Intel Platform Controller Hub EG20T. It
194	  supports 10/100/1000 Mbps operation.
195
196config RGMII
197	bool "Enable RGMII"
198	help
199	  Enable the support of the Reduced Gigabit Media-Independent
200	  Interface (RGMII).
201
202config RTL8139
203	bool "Realtek 8139 series Ethernet controller driver"
204	help
205	  This driver supports Realtek 8139 series fast ethernet family of
206	  PCI chipsets/adapters.
207
208config RTL8169
209	bool "Realtek 8169 series Ethernet controller driver"
210	help
211	  This driver supports Realtek 8169 series gigabit ethernet family of
212	  PCI/PCIe chipsets/adapters.
213
214config SMC911X
215	bool "SMSC LAN911x and LAN921x controller driver"
216
217if SMC911X
218
219config SMC911X_BASE
220	hex "SMC911X Base Address"
221	help
222	  Define this to hold the physical address
223	  of the device (I/O space)
224
225choice
226	prompt "SMC911X bus width"
227	default SMC911X_16_BIT
228
229config SMC911X_32_BIT
230	bool "Enable 32-bit interface"
231
232config SMC911X_16_BIT
233	bool "Enable 16-bit interface"
234	help
235	  Define this if data bus is 16 bits. If your processor
236	  automatically converts one 32 bit word to two 16 bit
237	  words you may also try CONFIG_SMC911X_32_BIT.
238
239endchoice
240endif #SMC911X
241
242config SUN7I_GMAC
243	bool "Enable Allwinner GMAC Ethernet support"
244	help
245	  Enable the support for Sun7i GMAC Ethernet controller
246
247config SUN7I_GMAC_FORCE_TXERR
248	bool "Force PA17 as gmac function"
249	depends on SUN7I_GMAC
250	help
251	  Some ethernet phys needs TXERR control. Since the GMAC
252	  doesn't have such signal, setting PA17 as GMAC function
253	  makes the pin output low, which enables data transmission.
254
255config SUN4I_EMAC
256	bool "Allwinner Sun4i Ethernet MAC support"
257	depends on DM_ETH
258	select PHYLIB
259	help
260	  This driver supports the Allwinner based SUN4I Ethernet MAC.
261
262config SUN8I_EMAC
263        bool "Allwinner Sun8i Ethernet MAC support"
264        depends on DM_ETH
265        select PHYLIB
266	select PHY_GIGE
267        help
268          This driver supports the  Allwinner based SUN8I/SUN50I Ethernet MAC.
269	  It can be found in H3/A64/A83T based SoCs and compatible with both
270	  External and Internal PHYs.
271
272config XILINX_AXIEMAC
273	depends on DM_ETH && (MICROBLAZE || ARCH_ZYNQ || ARCH_ZYNQMP)
274	select PHYLIB
275	select MII
276	bool "Xilinx AXI Ethernet"
277	help
278	  This MAC is present in Xilinx Microblaze, Zynq and ZynqMP SoCs.
279
280config XILINX_EMACLITE
281	depends on DM_ETH && (MICROBLAZE || ARCH_ZYNQ || ARCH_ZYNQMP || MIPS)
282	select PHYLIB
283	select MII
284	bool "Xilinx Ethernetlite"
285	help
286	  This MAC is present in Xilinx Microblaze, Zynq and ZynqMP SoCs.
287
288config ZYNQ_GEM
289	depends on DM_ETH && (ARCH_ZYNQ || ARCH_ZYNQMP)
290	select PHYLIB
291	bool "Xilinx Ethernet GEM"
292	help
293	  This MAC is present in Xilinx Zynq and ZynqMP SoCs.
294
295config PIC32_ETH
296	bool "Microchip PIC32 Ethernet Support"
297	depends on DM_ETH && MACH_PIC32
298	select PHYLIB
299	help
300	  This driver implements 10/100 Mbps Ethernet and MAC layer for
301	  Microchip PIC32 microcontrollers.
302
303config GMAC_ROCKCHIP
304	bool "Rockchip Synopsys Designware Ethernet MAC"
305	depends on DM_ETH && ETH_DESIGNWARE
306	help
307	  This driver provides Rockchip SoCs network support based on the
308	  Synopsys Designware driver.
309
310config RENESAS_RAVB
311	bool "Renesas Ethernet AVB MAC"
312	depends on DM_ETH && RCAR_GEN3
313	select PHYLIB
314	help
315	  This driver implements support for the Ethernet AVB block in
316	  Renesas M3 and H3 SoCs.
317
318config MPC8XX_FEC
319	bool "Fast Ethernet Controller on MPC8XX"
320	depends on 8xx
321	select MII
322	help
323	  This driver implements support for the Fast Ethernet Controller
324	  on MPC8XX
325
326config ETHER_ON_FEC1
327	bool "FEC1"
328	depends on MPC8XX_FEC
329	default y
330
331config FEC1_PHY
332	int "FEC1 PHY"
333	depends on ETHER_ON_FEC1
334	default -1
335	help
336	  Define to the hardcoded PHY address which corresponds
337	  to the given FEC; i. e.
338		#define CONFIG_FEC1_PHY 4
339	  means that the PHY with address 4 is connected to FEC1
340
341	  When set to -1, means to probe for first available.
342
343config PHY_NORXERR
344	bool "PHY_NORXERR"
345	depends on ETHER_ON_FEC1
346	default n
347	help
348	  The PHY does not have a RXERR line (RMII only).
349	  (so program the FEC to ignore it).
350
351config ETHER_ON_FEC2
352	bool "FEC2"
353	depends on MPC8XX_FEC && MPC885
354	default y
355
356config FEC2_PHY
357	int "FEC2 PHY"
358	depends on ETHER_ON_FEC2
359	default -1
360	help
361	  Define to the hardcoded PHY address which corresponds
362	  to the given FEC; i. e.
363		#define CONFIG_FEC1_PHY 4
364	  means that the PHY with address 4 is connected to FEC1
365
366	  When set to -1, means to probe for first available.
367
368config FEC2_PHY_NORXERR
369	bool "PHY_NORXERR"
370	depends on ETHER_ON_FEC2
371	default n
372	help
373	  The PHY does not have a RXERR line (RMII only).
374	  (so program the FEC to ignore it).
375
376endif # NETDEVICES
377