1source "drivers/net/phy/Kconfig" 2source "drivers/net/pfe_eth/Kconfig" 3 4config DM_ETH 5 bool "Enable Driver Model for Ethernet drivers" 6 depends on DM 7 help 8 Enable driver model for Ethernet. 9 10 The eth_*() interface will be implemented by the UCLASS_ETH class 11 This is currently implemented in net/eth-uclass.c 12 Look in include/net.h for details. 13 14menuconfig NETDEVICES 15 bool "Network device support" 16 depends on NET 17 default y if DM_ETH 18 help 19 You must select Y to enable any network device support 20 Generally if you have any networking support this is a given 21 22 If unsure, say Y 23 24if NETDEVICES 25 26config PHY_GIGE 27 bool "Enable GbE PHY status parsing and configuration" 28 help 29 Enables support for parsing the status output and for 30 configuring GbE PHYs (affects the inner workings of some 31 commands and miiphyutil.c). 32 33config AG7XXX 34 bool "Atheros AG7xxx Ethernet MAC support" 35 depends on DM_ETH && ARCH_ATH79 36 select PHYLIB 37 help 38 This driver supports the Atheros AG7xxx Ethernet MAC. This MAC is 39 present in the Atheros AR7xxx, AR9xxx and QCA9xxx MIPS chips. 40 41 42config ALTERA_TSE 43 bool "Altera Triple-Speed Ethernet MAC support" 44 depends on DM_ETH 45 select PHYLIB 46 help 47 This driver supports the Altera Triple-Speed (TSE) Ethernet MAC. 48 Please find details on the "Triple-Speed Ethernet MegaCore Function 49 Resource Center" of Altera. 50 51config BCM_SF2_ETH 52 bool "Broadcom SF2 (Starfighter2) Ethernet support" 53 select PHYLIB 54 help 55 This is an abstract framework which provides a generic interface 56 to MAC and DMA management for multiple Broadcom SoCs such as 57 Cygnus, NSP and bcm28155_ap platforms. 58 59config BCM_SF2_ETH_DEFAULT_PORT 60 int "Broadcom SF2 (Starfighter2) Ethernet default port number" 61 depends on BCM_SF2_ETH 62 default 0 63 help 64 Default port number for the Starfighter2 ethernet driver. 65 66config BCM_SF2_ETH_GMAC 67 bool "Broadcom SF2 (Starfighter2) GMAC Ethernet support" 68 depends on BCM_SF2_ETH 69 help 70 This flag enables the ethernet support for Broadcom platforms with 71 GMAC such as Cygnus. This driver is based on the framework provided 72 by the BCM_SF2_ETH driver. 73 Say Y to any bcmcygnus based platforms. 74 75config BCM6348_ETH 76 bool "BCM6348 EMAC support" 77 depends on DM_ETH && ARCH_BMIPS 78 select DMA 79 select DMA_CHANNELS 80 select MII 81 select PHYLIB 82 help 83 This driver supports the BCM6348 Ethernet MAC. 84 85config BCM6368_ETH 86 bool "BCM6368 EMAC support" 87 depends on DM_ETH && ARCH_BMIPS 88 select DMA 89 select MII 90 help 91 This driver supports the BCM6368 Ethernet MAC. 92 93config DWC_ETH_QOS 94 bool "Synopsys DWC Ethernet QOS device support" 95 depends on DM_ETH 96 select PHYLIB 97 help 98 This driver supports the Synopsys Designware Ethernet QOS (Quality 99 Of Service) IP block. The IP supports many options for bus type, 100 clocking/reset structure, and feature list. This driver currently 101 supports the specific configuration used in NVIDIA's Tegra186 chip, 102 but should be extensible to other combinations quite easily. 103 104config E1000 105 bool "Intel PRO/1000 Gigabit Ethernet support" 106 help 107 This driver supports Intel(R) PRO/1000 gigabit ethernet family of 108 adapters. For more information on how to identify your adapter, go 109 to the Adapter & Driver ID Guide at: 110 111 <http://support.intel.com/support/network/adapter/pro100/21397.htm> 112 113config E1000_SPI_GENERIC 114 bool "Allow access to the Intel 8257x SPI bus" 115 depends on E1000 116 help 117 Allow generic access to the SPI bus on the Intel 8257x, for 118 example with the "sspi" command. 119 120config E1000_SPI 121 bool "Enable SPI bus utility code" 122 depends on E1000 123 help 124 Utility code for direct access to the SPI bus on Intel 8257x. 125 This does not do anything useful unless you set at least one 126 of CONFIG_CMD_E1000 or CONFIG_E1000_SPI_GENERIC. 127 128config CMD_E1000 129 bool "Enable the e1000 command" 130 depends on E1000 131 help 132 This enables the 'e1000' management command for E1000 devices. When 133 used on devices with SPI support you can reprogram the EEPROM from 134 U-Boot. 135 136config ETH_SANDBOX 137 depends on DM_ETH && SANDBOX 138 default y 139 bool "Sandbox: Mocked Ethernet driver" 140 help 141 This driver simply responds with fake ARP replies and ping 142 replies that are used to verify network stack functionality 143 144 This driver is particularly useful in the test/dm/eth.c tests 145 146config ETH_SANDBOX_RAW 147 depends on DM_ETH && SANDBOX 148 default y 149 bool "Sandbox: Bridge to Linux Raw Sockets" 150 help 151 This driver is a bridge from the bottom of the network stack 152 in U-Boot to the RAW AF_PACKET API in Linux. This allows real 153 network traffic to be tested from within sandbox. See 154 board/sandbox/README.sandbox for more details. 155 156config ETH_DESIGNWARE 157 bool "Synopsys Designware Ethernet MAC" 158 select PHYLIB 159 imply ETH_DESIGNWARE_SOCFPGA if ARCH_SOCFPGA 160 help 161 This MAC is present in SoCs from various vendors. It supports 162 100Mbit and 1 Gbit operation. You must enable CONFIG_PHYLIB to 163 provide the PHY (physical media interface). 164 165config ETH_DESIGNWARE_SOCFPGA 166 select REGMAP 167 select SYSCON 168 bool "Altera SoCFPGA extras for Synopsys Designware Ethernet MAC" 169 depends on DM_ETH && ETH_DESIGNWARE 170 help 171 The Altera SoCFPGA requires additional configuration of the 172 Altera system manager to correctly interface with the PHY. 173 This code handles those SoC specifics. 174 175config ETHOC 176 bool "OpenCores 10/100 Mbps Ethernet MAC" 177 help 178 This MAC is present in OpenRISC and Xtensa XTFPGA boards. 179 180config FEC_MXC_SHARE_MDIO 181 bool "Share the MDIO bus for FEC controller" 182 depends on FEC_MXC 183 184config FEC_MXC_MDIO_BASE 185 hex "MDIO base address for the FEC controller" 186 depends on FEC_MXC_SHARE_MDIO 187 help 188 This specifies the MDIO registers base address. It is used when 189 two FEC controllers share MDIO bus. 190 191config FEC_MXC 192 bool "FEC Ethernet controller" 193 depends on MX5 || MX6 || MX7 || IMX8 194 help 195 This driver supports the 10/100 Fast Ethernet controller for 196 NXP i.MX processors. 197 198config FTMAC100 199 bool "Ftmac100 Ethernet Support" 200 help 201 This MAC is present in Andestech SoCs. 202 203config FTGMAC100 204 bool "Ftgmac100 Ethernet Support" 205 depends on DM_ETH 206 select PHYLIB 207 help 208 This driver supports the Faraday's FTGMAC100 Gigabit SoC 209 Ethernet controller that can be found on Aspeed SoCs (which 210 include NCSI). 211 212 It is fully compliant with IEEE 802.3 specification for 213 10/100 Mbps Ethernet and IEEE 802.3z specification for 1000 214 Mbps Ethernet and includes Reduced Media Independent 215 Interface (RMII) and Reduced Gigabit Media Independent 216 Interface (RGMII) interfaces. It adopts an AHB bus interface 217 and integrates a link list DMA engine with direct M-Bus 218 accesses for transmitting and receiving packets. It has 219 independent TX/RX fifos, supports half and full duplex (1000 220 Mbps mode only supports full duplex), flow control for full 221 duplex and backpressure for half duplex. 222 223 The FTGMAC100 also implements IP, TCP, UDP checksum offloads 224 and supports IEEE 802.1Q VLAN tag insertion and removal. It 225 offers high-priority transmit queue for QoS and CoS 226 applications. 227 228 229config MVGBE 230 bool "Marvell Orion5x/Kirkwood network interface support" 231 depends on KIRKWOOD || ORION5X 232 select PHYLIB if DM_ETH 233 help 234 This driver supports the network interface units in the 235 Marvell Orion5x and Kirkwood SoCs 236 237config MVNETA 238 bool "Marvell Armada XP/385/3700 network interface support" 239 depends on ARMADA_XP || ARMADA_38X || ARMADA_3700 240 select PHYLIB 241 help 242 This driver supports the network interface units in the 243 Marvell ARMADA XP, ARMADA 38X and ARMADA 3700 SoCs 244 245config MVPP2 246 bool "Marvell Armada 375/7K/8K network interface support" 247 depends on ARMADA_375 || ARMADA_8K 248 select PHYLIB 249 help 250 This driver supports the network interface units in the 251 Marvell ARMADA 375, 7K and 8K SoCs. 252 253config MACB 254 bool "Cadence MACB/GEM Ethernet Interface" 255 depends on DM_ETH 256 select PHYLIB 257 help 258 The Cadence MACB ethernet interface is found on many Atmel 259 AT91 and SAMA5 parts. This driver also supports the Cadence 260 GEM (Gigabit Ethernet MAC) found in some ARM SoC devices. 261 Say Y to include support for the MACB/GEM chip. 262 263config MACB_ZYNQ 264 bool "Cadence MACB/GEM Ethernet Interface for Xilinx Zynq" 265 depends on MACB 266 help 267 The Cadence MACB ethernet interface was used on Zynq platform. 268 Say Y to enable support for the MACB/GEM in Zynq chip. 269 270config MT7628_ETH 271 bool "MediaTek MT7628 Ethernet Interface" 272 depends on ARCH_MT7620 273 help 274 The MediaTek MT7628 ethernet interface is used on MT7628 and 275 MT7688 based boards. 276 277config PCH_GBE 278 bool "Intel Platform Controller Hub EG20T GMAC driver" 279 depends on DM_ETH && DM_PCI 280 select PHYLIB 281 help 282 This MAC is present in Intel Platform Controller Hub EG20T. It 283 supports 10/100/1000 Mbps operation. 284 285config RGMII 286 bool "Enable RGMII" 287 help 288 Enable the support of the Reduced Gigabit Media-Independent 289 Interface (RGMII). 290 291config MII 292 bool "Enable MII" 293 help 294 Enable support of the Media-Independent Interface (MII) 295 296config RTL8139 297 bool "Realtek 8139 series Ethernet controller driver" 298 help 299 This driver supports Realtek 8139 series fast ethernet family of 300 PCI chipsets/adapters. 301 302config RTL8169 303 bool "Realtek 8169 series Ethernet controller driver" 304 help 305 This driver supports Realtek 8169 series gigabit ethernet family of 306 PCI/PCIe chipsets/adapters. 307 308config SMC911X 309 bool "SMSC LAN911x and LAN921x controller driver" 310 311if SMC911X 312 313config SMC911X_BASE 314 hex "SMC911X Base Address" 315 help 316 Define this to hold the physical address 317 of the device (I/O space) 318 319choice 320 prompt "SMC911X bus width" 321 default SMC911X_16_BIT 322 323config SMC911X_32_BIT 324 bool "Enable 32-bit interface" 325 326config SMC911X_16_BIT 327 bool "Enable 16-bit interface" 328 help 329 Define this if data bus is 16 bits. If your processor 330 automatically converts one 32 bit word to two 16 bit 331 words you may also try CONFIG_SMC911X_32_BIT. 332 333endchoice 334endif #SMC911X 335 336config SUN7I_GMAC 337 bool "Enable Allwinner GMAC Ethernet support" 338 help 339 Enable the support for Sun7i GMAC Ethernet controller 340 341config SUN7I_GMAC_FORCE_TXERR 342 bool "Force PA17 as gmac function" 343 depends on SUN7I_GMAC 344 help 345 Some ethernet phys needs TXERR control. Since the GMAC 346 doesn't have such signal, setting PA17 as GMAC function 347 makes the pin output low, which enables data transmission. 348 349config SUN4I_EMAC 350 bool "Allwinner Sun4i Ethernet MAC support" 351 depends on DM_ETH 352 select PHYLIB 353 help 354 This driver supports the Allwinner based SUN4I Ethernet MAC. 355 356config SUN8I_EMAC 357 bool "Allwinner Sun8i Ethernet MAC support" 358 depends on DM_ETH 359 select PHYLIB 360 select PHY_GIGE 361 help 362 This driver supports the Allwinner based SUN8I/SUN50I Ethernet MAC. 363 It can be found in H3/A64/A83T based SoCs and compatible with both 364 External and Internal PHYs. 365 366config SH_ETHER 367 bool "Renesas SH Ethernet MAC" 368 select PHYLIB 369 help 370 This driver supports the Ethernet for Renesas SH and ARM SoCs. 371 372source "drivers/net/ti/Kconfig" 373 374config XILINX_AXIEMAC 375 depends on DM_ETH && (MICROBLAZE || ARCH_ZYNQ || ARCH_ZYNQMP) 376 select PHYLIB 377 select MII 378 bool "Xilinx AXI Ethernet" 379 help 380 This MAC is present in Xilinx Microblaze, Zynq and ZynqMP SoCs. 381 382config XILINX_EMACLITE 383 depends on DM_ETH && (MICROBLAZE || ARCH_ZYNQ || ARCH_ZYNQMP || MIPS) 384 select PHYLIB 385 select MII 386 bool "Xilinx Ethernetlite" 387 help 388 This MAC is present in Xilinx Microblaze, Zynq and ZynqMP SoCs. 389 390config ZYNQ_GEM 391 depends on DM_ETH && (ARCH_ZYNQ || ARCH_ZYNQMP || ARCH_VERSAL) 392 select PHYLIB 393 bool "Xilinx Ethernet GEM" 394 help 395 This MAC is present in Xilinx Zynq and ZynqMP SoCs. 396 397config PIC32_ETH 398 bool "Microchip PIC32 Ethernet Support" 399 depends on DM_ETH && MACH_PIC32 400 select PHYLIB 401 help 402 This driver implements 10/100 Mbps Ethernet and MAC layer for 403 Microchip PIC32 microcontrollers. 404 405config GMAC_ROCKCHIP 406 bool "Rockchip Synopsys Designware Ethernet MAC" 407 depends on DM_ETH && ETH_DESIGNWARE 408 help 409 This driver provides Rockchip SoCs network support based on the 410 Synopsys Designware driver. 411 412config RENESAS_RAVB 413 bool "Renesas Ethernet AVB MAC" 414 depends on DM_ETH && RCAR_GEN3 415 select PHYLIB 416 help 417 This driver implements support for the Ethernet AVB block in 418 Renesas M3 and H3 SoCs. 419 420config MPC8XX_FEC 421 bool "Fast Ethernet Controller on MPC8XX" 422 depends on MPC8xx 423 select MII 424 help 425 This driver implements support for the Fast Ethernet Controller 426 on MPC8XX 427 428config SNI_AVE 429 bool "Socionext AVE Ethernet support" 430 depends on DM_ETH && ARCH_UNIPHIER 431 select PHYLIB 432 select SYSCON 433 select REGMAP 434 help 435 This driver implements support for the Socionext AVE Ethernet 436 controller, as found on the Socionext UniPhier family. 437 438source "drivers/net/mscc_eswitch/Kconfig" 439 440config ETHER_ON_FEC1 441 bool "FEC1" 442 depends on MPC8XX_FEC 443 default y 444 445config FEC1_PHY 446 int "FEC1 PHY" 447 depends on ETHER_ON_FEC1 448 default -1 449 help 450 Define to the hardcoded PHY address which corresponds 451 to the given FEC; i. e. 452 #define CONFIG_FEC1_PHY 4 453 means that the PHY with address 4 is connected to FEC1 454 455 When set to -1, means to probe for first available. 456 457config PHY_NORXERR 458 bool "PHY_NORXERR" 459 depends on ETHER_ON_FEC1 460 default n 461 help 462 The PHY does not have a RXERR line (RMII only). 463 (so program the FEC to ignore it). 464 465config ETHER_ON_FEC2 466 bool "FEC2" 467 depends on MPC8XX_FEC && MPC885 468 default y 469 470config FEC2_PHY 471 int "FEC2 PHY" 472 depends on ETHER_ON_FEC2 473 default -1 474 help 475 Define to the hardcoded PHY address which corresponds 476 to the given FEC; i. e. 477 #define CONFIG_FEC1_PHY 4 478 means that the PHY with address 4 is connected to FEC1 479 480 When set to -1, means to probe for first available. 481 482config FEC2_PHY_NORXERR 483 bool "PHY_NORXERR" 484 depends on ETHER_ON_FEC2 485 default n 486 help 487 The PHY does not have a RXERR line (RMII only). 488 (so program the FEC to ignore it). 489 490config SYS_DPAA_QBMAN 491 bool "Device tree fixup for QBMan on freescale SOCs" 492 depends on (ARM || PPC) && !SPL_BUILD 493 default y if ARCH_B4860 || \ 494 ARCH_B4420 || \ 495 ARCH_P1023 || \ 496 ARCH_P2041 || \ 497 ARCH_T1023 || \ 498 ARCH_T1024 || \ 499 ARCH_T1040 || \ 500 ARCH_T1042 || \ 501 ARCH_T2080 || \ 502 ARCH_T2081 || \ 503 ARCH_T4240 || \ 504 ARCH_T4160 || \ 505 ARCH_P4080 || \ 506 ARCH_P3041 || \ 507 ARCH_P5040 || \ 508 ARCH_P5020 || \ 509 ARCH_LS1043A || \ 510 ARCH_LS1046A 511 help 512 QBman fixups to allow deep sleep in DPAA 1 SOCs 513 514config TSEC_ENET 515 select PHYLIB 516 bool "Enable Three-Speed Ethernet Controller" 517 help 518 This driver implements support for the (Enhanced) Three-Speed 519 Ethernet Controller found on Freescale SoCs. 520 521config MEDIATEK_ETH 522 bool "MediaTek Ethernet GMAC Driver" 523 depends on DM_ETH 524 select PHYLIB 525 select DM_GPIO 526 select DM_RESET 527 help 528 This Driver support MediaTek Ethernet GMAC 529 Say Y to enable support for the MediaTek Ethernet GMAC. 530 531endif # NETDEVICES 532