183d290c5STom Rini // SPDX-License-Identifier: GPL-2.0 2f1df9364SStefan Roese /* 3f1df9364SStefan Roese * Copyright (C) Marvell International Ltd. and its affiliates 4f1df9364SStefan Roese */ 5f1df9364SStefan Roese 6f1df9364SStefan Roese #include "ddr3_init.h" 7f1df9364SStefan Roese 8*2b4ffbf6SChris Packham /* Device attributes structures */ 9*2b4ffbf6SChris Packham enum mv_ddr_dev_attribute ddr_dev_attributes[MAX_DEVICE_NUM][MV_ATTR_LAST]; 10*2b4ffbf6SChris Packham int ddr_dev_attr_init_done[MAX_DEVICE_NUM] = { 0 }; 11*2b4ffbf6SChris Packham 12*2b4ffbf6SChris Packham static inline u32 pattern_table_get_killer_word16(u8 dqs, u8 index); 13*2b4ffbf6SChris Packham static inline u32 pattern_table_get_sso_word(u8 sso, u8 index); 14*2b4ffbf6SChris Packham static inline u32 pattern_table_get_vref_word(u8 index); 15*2b4ffbf6SChris Packham static inline u32 pattern_table_get_vref_word16(u8 index); 16*2b4ffbf6SChris Packham static inline u32 pattern_table_get_sso_full_xtalk_word(u8 bit, u8 index); 17*2b4ffbf6SChris Packham static inline u32 pattern_table_get_sso_full_xtalk_word16(u8 bit, u8 index); 18*2b4ffbf6SChris Packham static inline u32 pattern_table_get_sso_xtalk_free_word(u8 bit, u8 index); 19*2b4ffbf6SChris Packham static inline u32 pattern_table_get_sso_xtalk_free_word16(u8 bit, u8 index); 20*2b4ffbf6SChris Packham static inline u32 pattern_table_get_isi_word(u8 index); 21*2b4ffbf6SChris Packham static inline u32 pattern_table_get_isi_word16(u8 index); 22*2b4ffbf6SChris Packham 23f1df9364SStefan Roese /* List of allowed frequency listed in order of enum hws_ddr_freq */ 24*2b4ffbf6SChris Packham u32 freq_val[DDR_FREQ_LAST] = { 25f1df9364SStefan Roese 0, /*DDR_FREQ_LOW_FREQ */ 26f1df9364SStefan Roese 400, /*DDR_FREQ_400, */ 27f1df9364SStefan Roese 533, /*DDR_FREQ_533, */ 28f1df9364SStefan Roese 666, /*DDR_FREQ_667, */ 29f1df9364SStefan Roese 800, /*DDR_FREQ_800, */ 30f1df9364SStefan Roese 933, /*DDR_FREQ_933, */ 31f1df9364SStefan Roese 1066, /*DDR_FREQ_1066, */ 32f1df9364SStefan Roese 311, /*DDR_FREQ_311, */ 33f1df9364SStefan Roese 333, /*DDR_FREQ_333, */ 34f1df9364SStefan Roese 467, /*DDR_FREQ_467, */ 35f1df9364SStefan Roese 850, /*DDR_FREQ_850, */ 36f1df9364SStefan Roese 600, /*DDR_FREQ_600 */ 37f1df9364SStefan Roese 300, /*DDR_FREQ_300 */ 38f1df9364SStefan Roese 900, /*DDR_FREQ_900 */ 39f1df9364SStefan Roese 360, /*DDR_FREQ_360 */ 40f1df9364SStefan Roese 1000 /*DDR_FREQ_1000 */ 41f1df9364SStefan Roese }; 42f1df9364SStefan Roese 43f1df9364SStefan Roese /* Table for CL values per frequency for each speed bin index */ 44f1df9364SStefan Roese struct cl_val_per_freq cas_latency_table[] = { 45f1df9364SStefan Roese /* 46f1df9364SStefan Roese * 400M 667M 933M 311M 467M 600M 360 47f1df9364SStefan Roese * 100M 533M 800M 1066M 333M 850M 900 48f1df9364SStefan Roese * 1000 (the order is 100, 400, 533 etc.) 49f1df9364SStefan Roese */ 50f1df9364SStefan Roese /* DDR3-800D */ 51f1df9364SStefan Roese { {6, 5, 0, 0, 0, 0, 0, 5, 5, 0, 0, 0, 5, 0, 5, 0} }, 52f1df9364SStefan Roese /* DDR3-800E */ 53f1df9364SStefan Roese { {6, 6, 0, 0, 0, 0, 0, 6, 6, 0, 0, 0, 6, 0, 6, 0} }, 54f1df9364SStefan Roese /* DDR3-1066E */ 55f1df9364SStefan Roese { {6, 5, 6, 0, 0, 0, 0, 5, 5, 6, 0, 0, 5, 0, 5, 0} }, 56f1df9364SStefan Roese /* DDR3-1066F */ 57f1df9364SStefan Roese { {6, 6, 7, 0, 0, 0, 0, 6, 6, 7, 0, 0, 6, 0, 6, 0} }, 58f1df9364SStefan Roese /* DDR3-1066G */ 59f1df9364SStefan Roese { {6, 6, 8, 0, 0, 0, 0, 6, 6, 8, 0, 0, 6, 0, 6, 0} }, 60f1df9364SStefan Roese /* DDR3-1333F* */ 61f1df9364SStefan Roese { {6, 5, 6, 7, 0, 0, 0, 5, 5, 6, 0, 7, 5, 0, 5, 0} }, 62f1df9364SStefan Roese /* DDR3-1333G */ 63f1df9364SStefan Roese { {6, 5, 7, 8, 0, 0, 0, 5, 5, 7, 0, 8, 5, 0, 5, 0} }, 64f1df9364SStefan Roese /* DDR3-1333H */ 65f1df9364SStefan Roese { {6, 6, 8, 9, 0, 0, 0, 6, 6, 8, 0, 9, 6, 0, 6, 0} }, 66f1df9364SStefan Roese /* DDR3-1333J* */ 67f1df9364SStefan Roese { {6, 6, 8, 10, 0, 0, 0, 6, 6, 8, 0, 10, 6, 0, 6, 0} 68f1df9364SStefan Roese /* DDR3-1600G* */}, 69f1df9364SStefan Roese { {6, 5, 6, 7, 8, 0, 0, 5, 5, 6, 0, 7, 5, 0, 5, 0} }, 70f1df9364SStefan Roese /* DDR3-1600H */ 71f1df9364SStefan Roese { {6, 5, 6, 8, 9, 0, 0, 5, 5, 6, 0, 8, 5, 0, 5, 0} }, 72f1df9364SStefan Roese /* DDR3-1600J */ 73f1df9364SStefan Roese { {6, 5, 7, 9, 10, 0, 0, 5, 5, 7, 0, 9, 5, 0, 5, 0} }, 74f1df9364SStefan Roese /* DDR3-1600K */ 75f1df9364SStefan Roese { {6, 6, 8, 10, 11, 0, 0, 6, 6, 8, 0, 10, 6, 0, 6, 0 } }, 76f1df9364SStefan Roese /* DDR3-1866J* */ 77f1df9364SStefan Roese { {6, 5, 6, 8, 9, 11, 0, 5, 5, 6, 11, 8, 5, 0, 5, 0} }, 78f1df9364SStefan Roese /* DDR3-1866K */ 79f1df9364SStefan Roese { {6, 5, 7, 8, 10, 11, 0, 5, 5, 7, 11, 8, 5, 11, 5, 11} }, 80f1df9364SStefan Roese /* DDR3-1866L */ 81f1df9364SStefan Roese { {6, 6, 7, 9, 11, 12, 0, 6, 6, 7, 12, 9, 6, 12, 6, 12} }, 82f1df9364SStefan Roese /* DDR3-1866M* */ 83f1df9364SStefan Roese { {6, 6, 8, 10, 11, 13, 0, 6, 6, 8, 13, 10, 6, 13, 6, 13} }, 84f1df9364SStefan Roese /* DDR3-2133K* */ 85f1df9364SStefan Roese { {6, 5, 6, 7, 9, 10, 11, 5, 5, 6, 10, 7, 5, 11, 5, 11} }, 86f1df9364SStefan Roese /* DDR3-2133L */ 87f1df9364SStefan Roese { {6, 5, 6, 8, 9, 11, 12, 5, 5, 6, 11, 8, 5, 12, 5, 12} }, 88f1df9364SStefan Roese /* DDR3-2133M */ 89f1df9364SStefan Roese { {6, 5, 7, 9, 10, 12, 13, 5, 5, 7, 12, 9, 5, 13, 5, 13} }, 90f1df9364SStefan Roese /* DDR3-2133N* */ 91f1df9364SStefan Roese { {6, 6, 7, 9, 11, 13, 14, 6, 6, 7, 13, 9, 6, 14, 6, 14} }, 92f1df9364SStefan Roese /* DDR3-1333H-ext */ 93f1df9364SStefan Roese { {6, 6, 7, 9, 0, 0, 0, 6, 6, 7, 0, 9, 6, 0, 6, 0} }, 94f1df9364SStefan Roese /* DDR3-1600K-ext */ 95f1df9364SStefan Roese { {6, 6, 7, 9, 11, 0, 0, 6, 6, 7, 0, 9, 6, 0, 6, 0} }, 96f1df9364SStefan Roese /* DDR3-1866M-ext */ 97f1df9364SStefan Roese { {6, 6, 7, 9, 11, 13, 0, 6, 6, 7, 13, 9, 6, 13, 6, 13} }, 98f1df9364SStefan Roese }; 99f1df9364SStefan Roese 100f1df9364SStefan Roese /* Table for CWL values per speedbin index */ 101f1df9364SStefan Roese struct cl_val_per_freq cas_write_latency_table[] = { 102f1df9364SStefan Roese /* 103f1df9364SStefan Roese * 400M 667M 933M 311M 467M 600M 360 104f1df9364SStefan Roese * 100M 533M 800M 1066M 333M 850M 900 105f1df9364SStefan Roese * (the order is 100, 400, 533 etc.) 106f1df9364SStefan Roese */ 107f1df9364SStefan Roese /* DDR3-800D */ 108f1df9364SStefan Roese { {5, 5, 0, 0, 0, 0, 0, 5, 5, 0, 0, 0, 5, 0, 5, 0} }, 109f1df9364SStefan Roese /* DDR3-800E */ 110f1df9364SStefan Roese { {5, 5, 0, 0, 0, 0, 0, 5, 5, 0, 0, 0, 5, 0, 5, 0} }, 111f1df9364SStefan Roese /* DDR3-1066E */ 112f1df9364SStefan Roese { {5, 5, 6, 0, 0, 0, 0, 5, 5, 6, 0, 7, 5, 0, 5, 0} }, 113f1df9364SStefan Roese /* DDR3-1066F */ 114f1df9364SStefan Roese { {5, 5, 6, 0, 0, 0, 0, 5, 5, 6, 0, 7, 5, 0, 5, 0} }, 115f1df9364SStefan Roese /* DDR3-1066G */ 116f1df9364SStefan Roese { {5, 5, 6, 0, 0, 0, 0, 5, 5, 6, 0, 7, 5, 0, 5, 0} }, 117f1df9364SStefan Roese /* DDR3-1333F* */ 118f1df9364SStefan Roese { {5, 5, 6, 7, 0, 0, 0, 5, 5, 6, 0, 7, 5, 0, 5, 0} }, 119f1df9364SStefan Roese /* DDR3-1333G */ 120f1df9364SStefan Roese { {5, 5, 6, 7, 0, 0, 0, 5, 5, 6, 0, 7, 5, 0, 5, 0} }, 121f1df9364SStefan Roese /* DDR3-1333H */ 122f1df9364SStefan Roese { {5, 5, 6, 7, 0, 0, 0, 5, 5, 6, 0, 7, 5, 0, 5, 0} }, 123f1df9364SStefan Roese /* DDR3-1333J* */ 124f1df9364SStefan Roese { {5, 5, 6, 7, 0, 0, 0, 5, 5, 6, 0, 7, 5, 0, 5, 0} }, 125f1df9364SStefan Roese /* DDR3-1600G* */ 126f1df9364SStefan Roese { {5, 5, 6, 7, 8, 0, 0, 5, 5, 6, 0, 7, 5, 0, 5, 0} }, 127f1df9364SStefan Roese /* DDR3-1600H */ 128f1df9364SStefan Roese { {5, 5, 6, 7, 8, 0, 0, 5, 5, 6, 0, 7, 5, 0, 5, 0} }, 129f1df9364SStefan Roese /* DDR3-1600J */ 130f1df9364SStefan Roese { {5, 5, 6, 7, 8, 0, 0, 5, 5, 6, 0, 7, 5, 0, 5, 0} }, 131f1df9364SStefan Roese /* DDR3-1600K */ 132f1df9364SStefan Roese { {5, 5, 6, 7, 8, 0, 0, 5, 5, 6, 0, 7, 5, 0, 5, 0} }, 133f1df9364SStefan Roese /* DDR3-1866J* */ 134f1df9364SStefan Roese { {5, 5, 6, 7, 8, 9, 0, 5, 5, 6, 9, 7, 5, 0, 5, 0} }, 135f1df9364SStefan Roese /* DDR3-1866K */ 136f1df9364SStefan Roese { {5, 5, 6, 7, 8, 9, 0, 5, 5, 6, 9, 7, 5, 0, 5, 0} }, 137f1df9364SStefan Roese /* DDR3-1866L */ 138f1df9364SStefan Roese { {5, 5, 6, 7, 8, 9, 0, 5, 5, 6, 9, 7, 5, 9, 5, 9} }, 139f1df9364SStefan Roese /* DDR3-1866M* */ 140f1df9364SStefan Roese { {5, 5, 6, 7, 8, 9, 0, 5, 5, 6, 9, 7, 5, 9, 5, 9} }, 141f1df9364SStefan Roese /* DDR3-2133K* */ 142f1df9364SStefan Roese { {5, 5, 6, 7, 8, 9, 10, 5, 5, 6, 9, 7, 5, 9, 5, 10} }, 143f1df9364SStefan Roese /* DDR3-2133L */ 144f1df9364SStefan Roese { {5, 5, 6, 7, 8, 9, 10, 5, 5, 6, 9, 7, 5, 9, 5, 10} }, 145f1df9364SStefan Roese /* DDR3-2133M */ 146f1df9364SStefan Roese { {5, 5, 6, 7, 8, 9, 10, 5, 5, 6, 9, 7, 5, 9, 5, 10} }, 147f1df9364SStefan Roese /* DDR3-2133N* */ 148f1df9364SStefan Roese { {5, 5, 6, 7, 8, 9, 10, 5, 5, 6, 9, 7, 5, 9, 5, 10} }, 149f1df9364SStefan Roese /* DDR3-1333H-ext */ 150f1df9364SStefan Roese { {5, 5, 6, 7, 0, 0, 0, 5, 5, 6, 0, 7, 5, 0, 5, 0} }, 151f1df9364SStefan Roese /* DDR3-1600K-ext */ 152f1df9364SStefan Roese { {5, 5, 6, 7, 8, 0, 0, 5, 5, 6, 0, 7, 5, 0, 5, 0} }, 153f1df9364SStefan Roese /* DDR3-1866M-ext */ 154f1df9364SStefan Roese { {5, 5, 6, 7, 8, 9, 0, 5, 5, 6, 9, 7, 5, 9, 5, 9} }, 155f1df9364SStefan Roese }; 156f1df9364SStefan Roese 157f1df9364SStefan Roese u8 twr_mask_table[] = { 158f1df9364SStefan Roese 10, 159f1df9364SStefan Roese 10, 160f1df9364SStefan Roese 10, 161f1df9364SStefan Roese 10, 162f1df9364SStefan Roese 10, 163f1df9364SStefan Roese 1, /* 5 */ 164f1df9364SStefan Roese 2, /* 6 */ 165f1df9364SStefan Roese 3, /* 7 */ 166672e5598SChris Packham 4, /* 8 */ 167f1df9364SStefan Roese 10, 168f1df9364SStefan Roese 5, /* 10 */ 169f1df9364SStefan Roese 10, 170f1df9364SStefan Roese 6, /* 12 */ 171f1df9364SStefan Roese 10, 172f1df9364SStefan Roese 7, /* 14 */ 173f1df9364SStefan Roese 10, 174f1df9364SStefan Roese 0 /* 16 */ 175f1df9364SStefan Roese }; 176f1df9364SStefan Roese 177f1df9364SStefan Roese u8 cl_mask_table[] = { 178f1df9364SStefan Roese 0, 179f1df9364SStefan Roese 0, 180f1df9364SStefan Roese 0, 181f1df9364SStefan Roese 0, 182f1df9364SStefan Roese 0, 183f1df9364SStefan Roese 0x2, 184f1df9364SStefan Roese 0x4, 185f1df9364SStefan Roese 0x6, 186f1df9364SStefan Roese 0x8, 187f1df9364SStefan Roese 0xa, 188f1df9364SStefan Roese 0xc, 189f1df9364SStefan Roese 0xe, 190f1df9364SStefan Roese 0x1, 191f1df9364SStefan Roese 0x3, 192f1df9364SStefan Roese 0x5, 193f1df9364SStefan Roese 0x5 194f1df9364SStefan Roese }; 195f1df9364SStefan Roese 196f1df9364SStefan Roese u8 cwl_mask_table[] = { 197f1df9364SStefan Roese 0, 198f1df9364SStefan Roese 0, 199f1df9364SStefan Roese 0, 200f1df9364SStefan Roese 0, 201f1df9364SStefan Roese 0, 202f1df9364SStefan Roese 0, 203f1df9364SStefan Roese 0x1, 204f1df9364SStefan Roese 0x2, 205f1df9364SStefan Roese 0x3, 206f1df9364SStefan Roese 0x4, 207f1df9364SStefan Roese 0x5, 208f1df9364SStefan Roese 0x6, 209f1df9364SStefan Roese 0x7, 210f1df9364SStefan Roese 0x8, 211f1df9364SStefan Roese 0x9, 212f1df9364SStefan Roese 0x9 213f1df9364SStefan Roese }; 214f1df9364SStefan Roese 215f1df9364SStefan Roese /* RFC values (in ns) */ 216f1df9364SStefan Roese u16 rfc_table[] = { 217f1df9364SStefan Roese 90, /* 512M */ 218f1df9364SStefan Roese 110, /* 1G */ 219f1df9364SStefan Roese 160, /* 2G */ 220f1df9364SStefan Roese 260, /* 4G */ 221*2b4ffbf6SChris Packham 350, /* 8G */ 222*2b4ffbf6SChris Packham 0, /* TODO: placeholder for 16-Mbit dev width */ 223*2b4ffbf6SChris Packham 0, /* TODO: placeholder for 32-Mbit dev width */ 224*2b4ffbf6SChris Packham 0, /* TODO: placeholder for 12-Mbit dev width */ 225*2b4ffbf6SChris Packham 0 /* TODO: placeholder for 24-Mbit dev width */ 226f1df9364SStefan Roese }; 227f1df9364SStefan Roese 228f1df9364SStefan Roese u32 speed_bin_table_t_rc[] = { 229f1df9364SStefan Roese 50000, 230f1df9364SStefan Roese 52500, 231f1df9364SStefan Roese 48750, 232f1df9364SStefan Roese 50625, 233f1df9364SStefan Roese 52500, 234f1df9364SStefan Roese 46500, 235f1df9364SStefan Roese 48000, 236f1df9364SStefan Roese 49500, 237f1df9364SStefan Roese 51000, 238f1df9364SStefan Roese 45000, 239f1df9364SStefan Roese 46250, 240f1df9364SStefan Roese 47500, 241f1df9364SStefan Roese 48750, 242f1df9364SStefan Roese 44700, 243f1df9364SStefan Roese 45770, 244f1df9364SStefan Roese 46840, 245f1df9364SStefan Roese 47910, 246f1df9364SStefan Roese 43285, 247f1df9364SStefan Roese 44220, 248f1df9364SStefan Roese 45155, 249*2b4ffbf6SChris Packham 46090 250f1df9364SStefan Roese }; 251f1df9364SStefan Roese 252f1df9364SStefan Roese u32 speed_bin_table_t_rcd_t_rp[] = { 253f1df9364SStefan Roese 12500, 254f1df9364SStefan Roese 15000, 255f1df9364SStefan Roese 11250, 256f1df9364SStefan Roese 13125, 257f1df9364SStefan Roese 15000, 258f1df9364SStefan Roese 10500, 259f1df9364SStefan Roese 12000, 260f1df9364SStefan Roese 13500, 261f1df9364SStefan Roese 15000, 262f1df9364SStefan Roese 10000, 263f1df9364SStefan Roese 11250, 264f1df9364SStefan Roese 12500, 265f1df9364SStefan Roese 13750, 266f1df9364SStefan Roese 10700, 267f1df9364SStefan Roese 11770, 268f1df9364SStefan Roese 12840, 269f1df9364SStefan Roese 13910, 270f1df9364SStefan Roese 10285, 271*2b4ffbf6SChris Packham 11220, 272f1df9364SStefan Roese 12155, 273f1df9364SStefan Roese 13090, 274f1df9364SStefan Roese }; 275f1df9364SStefan Roese 276f1df9364SStefan Roese enum { 277f1df9364SStefan Roese PATTERN_KILLER_PATTERN_TABLE_MAP_ROLE_AGGRESSOR = 0, 278f1df9364SStefan Roese PATTERN_KILLER_PATTERN_TABLE_MAP_ROLE_VICTIM 279f1df9364SStefan Roese }; 280f1df9364SStefan Roese 281f1df9364SStefan Roese static u8 pattern_killer_pattern_table_map[KILLER_PATTERN_LENGTH * 2][2] = { 282f1df9364SStefan Roese /*Aggressor / Victim */ 283f1df9364SStefan Roese {1, 0}, 284f1df9364SStefan Roese {0, 0}, 285f1df9364SStefan Roese {1, 0}, 286f1df9364SStefan Roese {1, 1}, 287f1df9364SStefan Roese {0, 1}, 288f1df9364SStefan Roese {0, 1}, 289f1df9364SStefan Roese {1, 0}, 290f1df9364SStefan Roese {0, 1}, 291f1df9364SStefan Roese {1, 0}, 292f1df9364SStefan Roese {0, 1}, 293f1df9364SStefan Roese {1, 0}, 294f1df9364SStefan Roese {1, 0}, 295f1df9364SStefan Roese {0, 1}, 296f1df9364SStefan Roese {1, 0}, 297f1df9364SStefan Roese {0, 1}, 298f1df9364SStefan Roese {0, 0}, 299f1df9364SStefan Roese {1, 1}, 300f1df9364SStefan Roese {0, 0}, 301f1df9364SStefan Roese {1, 1}, 302f1df9364SStefan Roese {0, 0}, 303f1df9364SStefan Roese {1, 1}, 304f1df9364SStefan Roese {0, 0}, 305f1df9364SStefan Roese {1, 1}, 306f1df9364SStefan Roese {1, 0}, 307f1df9364SStefan Roese {0, 0}, 308f1df9364SStefan Roese {1, 1}, 309f1df9364SStefan Roese {0, 0}, 310f1df9364SStefan Roese {1, 1}, 311f1df9364SStefan Roese {0, 0}, 312f1df9364SStefan Roese {0, 0}, 313f1df9364SStefan Roese {0, 0}, 314f1df9364SStefan Roese {0, 1}, 315f1df9364SStefan Roese {0, 1}, 316f1df9364SStefan Roese {1, 1}, 317f1df9364SStefan Roese {0, 0}, 318f1df9364SStefan Roese {0, 0}, 319f1df9364SStefan Roese {1, 1}, 320f1df9364SStefan Roese {1, 1}, 321f1df9364SStefan Roese {0, 0}, 322f1df9364SStefan Roese {1, 1}, 323f1df9364SStefan Roese {0, 0}, 324f1df9364SStefan Roese {1, 1}, 325f1df9364SStefan Roese {1, 1}, 326f1df9364SStefan Roese {0, 0}, 327f1df9364SStefan Roese {0, 0}, 328f1df9364SStefan Roese {1, 1}, 329f1df9364SStefan Roese {0, 0}, 330f1df9364SStefan Roese {1, 1}, 331f1df9364SStefan Roese {0, 1}, 332f1df9364SStefan Roese {0, 0}, 333f1df9364SStefan Roese {0, 1}, 334f1df9364SStefan Roese {0, 1}, 335f1df9364SStefan Roese {0, 0}, 336f1df9364SStefan Roese {1, 1}, 337f1df9364SStefan Roese {1, 1}, 338f1df9364SStefan Roese {1, 0}, 339f1df9364SStefan Roese {1, 0}, 340f1df9364SStefan Roese {1, 1}, 341f1df9364SStefan Roese {1, 1}, 342f1df9364SStefan Roese {1, 1}, 343f1df9364SStefan Roese {1, 1}, 344f1df9364SStefan Roese {1, 1}, 345f1df9364SStefan Roese {1, 1}, 346f1df9364SStefan Roese {1, 1} 347f1df9364SStefan Roese }; 348f1df9364SStefan Roese 349f1df9364SStefan Roese static u8 pattern_vref_pattern_table_map[] = { 350f1df9364SStefan Roese /* 1 means 0xffffffff, 0 is 0x0 */ 351f1df9364SStefan Roese 0xb8, 352f1df9364SStefan Roese 0x52, 353f1df9364SStefan Roese 0x55, 354f1df9364SStefan Roese 0x8a, 355f1df9364SStefan Roese 0x33, 356f1df9364SStefan Roese 0xa6, 357f1df9364SStefan Roese 0x6d, 358f1df9364SStefan Roese 0xfe 359f1df9364SStefan Roese }; 360f1df9364SStefan Roese 361f1df9364SStefan Roese /* Return speed Bin value for selected index and t* element */ 362f1df9364SStefan Roese u32 speed_bin_table(u8 index, enum speed_bin_table_elements element) 363f1df9364SStefan Roese { 364f1df9364SStefan Roese u32 result = 0; 365f1df9364SStefan Roese 366f1df9364SStefan Roese switch (element) { 367f1df9364SStefan Roese case SPEED_BIN_TRCD: 368f1df9364SStefan Roese case SPEED_BIN_TRP: 369f1df9364SStefan Roese result = speed_bin_table_t_rcd_t_rp[index]; 370f1df9364SStefan Roese break; 371f1df9364SStefan Roese case SPEED_BIN_TRAS: 372*2b4ffbf6SChris Packham if (index < SPEED_BIN_DDR_1066G) 373f1df9364SStefan Roese result = 37500; 374*2b4ffbf6SChris Packham else if (index < SPEED_BIN_DDR_1333J) 375f1df9364SStefan Roese result = 36000; 376*2b4ffbf6SChris Packham else if (index < SPEED_BIN_DDR_1600K) 377f1df9364SStefan Roese result = 35000; 378*2b4ffbf6SChris Packham else if (index < SPEED_BIN_DDR_1866M) 379f1df9364SStefan Roese result = 34000; 380f1df9364SStefan Roese else 381f1df9364SStefan Roese result = 33000; 382f1df9364SStefan Roese break; 383f1df9364SStefan Roese case SPEED_BIN_TRC: 384f1df9364SStefan Roese result = speed_bin_table_t_rc[index]; 385f1df9364SStefan Roese break; 386f1df9364SStefan Roese case SPEED_BIN_TRRD1K: 387*2b4ffbf6SChris Packham if (index < SPEED_BIN_DDR_800E) 388f1df9364SStefan Roese result = 10000; 389*2b4ffbf6SChris Packham else if (index < SPEED_BIN_DDR_1066G) 390*2b4ffbf6SChris Packham result = 7500; 391*2b4ffbf6SChris Packham else if (index < SPEED_BIN_DDR_1600K) 392f1df9364SStefan Roese result = 6000; 393f1df9364SStefan Roese else 394f1df9364SStefan Roese result = 5000; 395f1df9364SStefan Roese break; 396f1df9364SStefan Roese case SPEED_BIN_TRRD2K: 397*2b4ffbf6SChris Packham if (index < SPEED_BIN_DDR_1066G) 398f1df9364SStefan Roese result = 10000; 399*2b4ffbf6SChris Packham else if (index < SPEED_BIN_DDR_1600K) 400*2b4ffbf6SChris Packham result = 7500; 401f1df9364SStefan Roese else 402f1df9364SStefan Roese result = 6000; 403f1df9364SStefan Roese break; 404f1df9364SStefan Roese case SPEED_BIN_TPD: 405*2b4ffbf6SChris Packham if (index < SPEED_BIN_DDR_800E) 406f1df9364SStefan Roese result = 7500; 407*2b4ffbf6SChris Packham else if (index < SPEED_BIN_DDR_1333J) 408f1df9364SStefan Roese result = 5625; 409f1df9364SStefan Roese else 410f1df9364SStefan Roese result = 5000; 411f1df9364SStefan Roese break; 412f1df9364SStefan Roese case SPEED_BIN_TFAW1K: 413*2b4ffbf6SChris Packham if (index < SPEED_BIN_DDR_800E) 414f1df9364SStefan Roese result = 40000; 415*2b4ffbf6SChris Packham else if (index < SPEED_BIN_DDR_1066G) 416f1df9364SStefan Roese result = 37500; 417*2b4ffbf6SChris Packham else if (index < SPEED_BIN_DDR_1600K) 418f1df9364SStefan Roese result = 30000; 419*2b4ffbf6SChris Packham else if (index < SPEED_BIN_DDR_1866M) 420f1df9364SStefan Roese result = 27000; 421f1df9364SStefan Roese else 422f1df9364SStefan Roese result = 25000; 423f1df9364SStefan Roese break; 424f1df9364SStefan Roese case SPEED_BIN_TFAW2K: 425*2b4ffbf6SChris Packham if (index < SPEED_BIN_DDR_1066G) 426f1df9364SStefan Roese result = 50000; 427*2b4ffbf6SChris Packham else if (index < SPEED_BIN_DDR_1333J) 428f1df9364SStefan Roese result = 45000; 429*2b4ffbf6SChris Packham else if (index < SPEED_BIN_DDR_1600K) 430f1df9364SStefan Roese result = 40000; 431f1df9364SStefan Roese else 432f1df9364SStefan Roese result = 35000; 433f1df9364SStefan Roese break; 434f1df9364SStefan Roese case SPEED_BIN_TWTR: 435f1df9364SStefan Roese result = 7500; 436f1df9364SStefan Roese break; 437f1df9364SStefan Roese case SPEED_BIN_TRTP: 438f1df9364SStefan Roese result = 7500; 439f1df9364SStefan Roese break; 440f1df9364SStefan Roese case SPEED_BIN_TWR: 441f1df9364SStefan Roese result = 15000; 442f1df9364SStefan Roese break; 443f1df9364SStefan Roese case SPEED_BIN_TMOD: 444f1df9364SStefan Roese result = 15000; 445f1df9364SStefan Roese break; 446672e5598SChris Packham case SPEED_BIN_TXPDLL: 447672e5598SChris Packham result = 24000; 448672e5598SChris Packham break; 449f1df9364SStefan Roese default: 450f1df9364SStefan Roese break; 451f1df9364SStefan Roese } 452f1df9364SStefan Roese 453f1df9364SStefan Roese return result; 454f1df9364SStefan Roese } 455f1df9364SStefan Roese 456f1df9364SStefan Roese static inline u32 pattern_table_get_killer_word(u8 dqs, u8 index) 457f1df9364SStefan Roese { 458f1df9364SStefan Roese u8 i, byte = 0; 459f1df9364SStefan Roese u8 role; 460f1df9364SStefan Roese 461f1df9364SStefan Roese for (i = 0; i < 8; i++) { 462f1df9364SStefan Roese role = (i == dqs) ? 463f1df9364SStefan Roese (PATTERN_KILLER_PATTERN_TABLE_MAP_ROLE_AGGRESSOR) : 464f1df9364SStefan Roese (PATTERN_KILLER_PATTERN_TABLE_MAP_ROLE_VICTIM); 465f1df9364SStefan Roese byte |= pattern_killer_pattern_table_map[index][role] << i; 466f1df9364SStefan Roese } 467f1df9364SStefan Roese 468f1df9364SStefan Roese return byte | (byte << 8) | (byte << 16) | (byte << 24); 469f1df9364SStefan Roese } 470f1df9364SStefan Roese 471f1df9364SStefan Roese static inline u32 pattern_table_get_killer_word16(u8 dqs, u8 index) 472f1df9364SStefan Roese { 473f1df9364SStefan Roese u8 i, byte0 = 0, byte1 = 0; 474f1df9364SStefan Roese u8 role; 475f1df9364SStefan Roese 476f1df9364SStefan Roese for (i = 0; i < 8; i++) { 477f1df9364SStefan Roese role = (i == dqs) ? 478f1df9364SStefan Roese (PATTERN_KILLER_PATTERN_TABLE_MAP_ROLE_AGGRESSOR) : 479f1df9364SStefan Roese (PATTERN_KILLER_PATTERN_TABLE_MAP_ROLE_VICTIM); 480f1df9364SStefan Roese byte0 |= pattern_killer_pattern_table_map[index * 2][role] << i; 481*2b4ffbf6SChris Packham byte1 |= pattern_killer_pattern_table_map[index * 2 + 1][role] << i; 482f1df9364SStefan Roese } 483f1df9364SStefan Roese 484f1df9364SStefan Roese return byte0 | (byte0 << 8) | (byte1 << 16) | (byte1 << 24); 485f1df9364SStefan Roese } 486f1df9364SStefan Roese 487f1df9364SStefan Roese static inline u32 pattern_table_get_sso_word(u8 sso, u8 index) 488f1df9364SStefan Roese { 489f1df9364SStefan Roese u8 step = sso + 1; 490f1df9364SStefan Roese 491f1df9364SStefan Roese if (0 == ((index / step) & 1)) 492f1df9364SStefan Roese return 0x0; 493f1df9364SStefan Roese else 494f1df9364SStefan Roese return 0xffffffff; 495f1df9364SStefan Roese } 496f1df9364SStefan Roese 497*2b4ffbf6SChris Packham static inline u32 pattern_table_get_sso_full_xtalk_word(u8 bit, u8 index) 498*2b4ffbf6SChris Packham { 499*2b4ffbf6SChris Packham u8 byte = (1 << bit); 500*2b4ffbf6SChris Packham 501*2b4ffbf6SChris Packham if ((index & 1) == 1) 502*2b4ffbf6SChris Packham byte = ~byte; 503*2b4ffbf6SChris Packham 504*2b4ffbf6SChris Packham return byte | (byte << 8) | (byte << 16) | (byte << 24); 505*2b4ffbf6SChris Packham 506*2b4ffbf6SChris Packham } 507*2b4ffbf6SChris Packham 508*2b4ffbf6SChris Packham static inline u32 pattern_table_get_sso_xtalk_free_word(u8 bit, u8 index) 509*2b4ffbf6SChris Packham { 510*2b4ffbf6SChris Packham u8 byte = (1 << bit); 511*2b4ffbf6SChris Packham 512*2b4ffbf6SChris Packham if ((index & 1) == 1) 513*2b4ffbf6SChris Packham byte = 0; 514*2b4ffbf6SChris Packham 515*2b4ffbf6SChris Packham return byte | (byte << 8) | (byte << 16) | (byte << 24); 516*2b4ffbf6SChris Packham } 517*2b4ffbf6SChris Packham 518*2b4ffbf6SChris Packham static inline u32 pattern_table_get_isi_word(u8 index) 519*2b4ffbf6SChris Packham { 520*2b4ffbf6SChris Packham u8 i0 = index % 32; 521*2b4ffbf6SChris Packham u8 i1 = index % 8; 522*2b4ffbf6SChris Packham u32 word; 523*2b4ffbf6SChris Packham 524*2b4ffbf6SChris Packham if (i0 > 15) 525*2b4ffbf6SChris Packham word = ((i1 == 5) | (i1 == 7)) ? 0xffffffff : 0x0; 526*2b4ffbf6SChris Packham else 527*2b4ffbf6SChris Packham word = (i1 == 6) ? 0xffffffff : 0x0; 528*2b4ffbf6SChris Packham 529*2b4ffbf6SChris Packham word = ((i0 % 16) > 7) ? ~word : word; 530*2b4ffbf6SChris Packham 531*2b4ffbf6SChris Packham return word; 532*2b4ffbf6SChris Packham } 533*2b4ffbf6SChris Packham 534*2b4ffbf6SChris Packham static inline u32 pattern_table_get_sso_full_xtalk_word16(u8 bit, u8 index) 535*2b4ffbf6SChris Packham { 536*2b4ffbf6SChris Packham u8 byte = (1 << bit); 537*2b4ffbf6SChris Packham 538*2b4ffbf6SChris Packham if ((index & 1) == 1) 539*2b4ffbf6SChris Packham byte = ~byte; 540*2b4ffbf6SChris Packham 541*2b4ffbf6SChris Packham return byte | (byte << 8) | ((~byte) << 16) | ((~byte) << 24); 542*2b4ffbf6SChris Packham } 543*2b4ffbf6SChris Packham 544*2b4ffbf6SChris Packham static inline u32 pattern_table_get_sso_xtalk_free_word16(u8 bit, u8 index) 545*2b4ffbf6SChris Packham { 546*2b4ffbf6SChris Packham u8 byte = (1 << bit); 547*2b4ffbf6SChris Packham 548*2b4ffbf6SChris Packham if ((index & 1) == 0) 549*2b4ffbf6SChris Packham return (byte << 16) | (byte << 24); 550*2b4ffbf6SChris Packham else 551*2b4ffbf6SChris Packham return byte | (byte << 8); 552*2b4ffbf6SChris Packham } 553*2b4ffbf6SChris Packham 554*2b4ffbf6SChris Packham static inline u32 pattern_table_get_isi_word16(u8 index) 555*2b4ffbf6SChris Packham { 556*2b4ffbf6SChris Packham u8 i0 = index % 16; 557*2b4ffbf6SChris Packham u8 i1 = index % 4; 558*2b4ffbf6SChris Packham u32 word; 559*2b4ffbf6SChris Packham 560*2b4ffbf6SChris Packham if (i0 > 7) 561*2b4ffbf6SChris Packham word = (i1 > 1) ? 0x0000ffff : 0x0; 562*2b4ffbf6SChris Packham else 563*2b4ffbf6SChris Packham word = (i1 == 3) ? 0xffff0000 : 0x0; 564*2b4ffbf6SChris Packham 565*2b4ffbf6SChris Packham word = ((i0 % 8) > 3) ? ~word : word; 566*2b4ffbf6SChris Packham 567*2b4ffbf6SChris Packham return word; 568*2b4ffbf6SChris Packham } 569*2b4ffbf6SChris Packham 570f1df9364SStefan Roese static inline u32 pattern_table_get_vref_word(u8 index) 571f1df9364SStefan Roese { 572f1df9364SStefan Roese if (0 == ((pattern_vref_pattern_table_map[index / 8] >> 573f1df9364SStefan Roese (index % 8)) & 1)) 574f1df9364SStefan Roese return 0x0; 575f1df9364SStefan Roese else 576f1df9364SStefan Roese return 0xffffffff; 577f1df9364SStefan Roese } 578f1df9364SStefan Roese 579f1df9364SStefan Roese static inline u32 pattern_table_get_vref_word16(u8 index) 580f1df9364SStefan Roese { 581f1df9364SStefan Roese if (0 == pattern_killer_pattern_table_map 582f1df9364SStefan Roese [PATTERN_KILLER_PATTERN_TABLE_MAP_ROLE_VICTIM][index * 2] && 583f1df9364SStefan Roese 0 == pattern_killer_pattern_table_map 584f1df9364SStefan Roese [PATTERN_KILLER_PATTERN_TABLE_MAP_ROLE_VICTIM][index * 2 + 1]) 585f1df9364SStefan Roese return 0x00000000; 586f1df9364SStefan Roese else if (1 == pattern_killer_pattern_table_map 587f1df9364SStefan Roese [PATTERN_KILLER_PATTERN_TABLE_MAP_ROLE_VICTIM][index * 2] && 588f1df9364SStefan Roese 0 == pattern_killer_pattern_table_map 589f1df9364SStefan Roese [PATTERN_KILLER_PATTERN_TABLE_MAP_ROLE_VICTIM][index * 2 + 1]) 590f1df9364SStefan Roese return 0xffff0000; 591f1df9364SStefan Roese else if (0 == pattern_killer_pattern_table_map 592f1df9364SStefan Roese [PATTERN_KILLER_PATTERN_TABLE_MAP_ROLE_VICTIM][index * 2] && 593f1df9364SStefan Roese 1 == pattern_killer_pattern_table_map 594f1df9364SStefan Roese [PATTERN_KILLER_PATTERN_TABLE_MAP_ROLE_VICTIM][index * 2 + 1]) 595f1df9364SStefan Roese return 0x0000ffff; 596f1df9364SStefan Roese else 597f1df9364SStefan Roese return 0xffffffff; 598f1df9364SStefan Roese } 599f1df9364SStefan Roese 600f1df9364SStefan Roese static inline u32 pattern_table_get_static_pbs_word(u8 index) 601f1df9364SStefan Roese { 602f1df9364SStefan Roese u16 temp; 603f1df9364SStefan Roese 604f1df9364SStefan Roese temp = ((0x00ff << (index / 3)) & 0xff00) >> 8; 605f1df9364SStefan Roese 606f1df9364SStefan Roese return temp | (temp << 8) | (temp << 16) | (temp << 24); 607f1df9364SStefan Roese } 608f1df9364SStefan Roese 609*2b4ffbf6SChris Packham u32 pattern_table_get_word(u32 dev_num, enum hws_pattern type, u8 index) 610f1df9364SStefan Roese { 611f1df9364SStefan Roese u32 pattern; 612*2b4ffbf6SChris Packham struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); 613f1df9364SStefan Roese 614f1df9364SStefan Roese if (DDR3_IS_16BIT_DRAM_MODE(tm->bus_act_mask) == 0) { 615*2b4ffbf6SChris Packham /* 32/64-bit patterns */ 616f1df9364SStefan Roese switch (type) { 617f1df9364SStefan Roese case PATTERN_PBS1: 618f1df9364SStefan Roese case PATTERN_PBS2: 619f1df9364SStefan Roese if (index == 0 || index == 2 || index == 5 || 620f1df9364SStefan Roese index == 7) 621f1df9364SStefan Roese pattern = PATTERN_55; 622f1df9364SStefan Roese else 623f1df9364SStefan Roese pattern = PATTERN_AA; 624f1df9364SStefan Roese break; 625f1df9364SStefan Roese case PATTERN_PBS3: 626f1df9364SStefan Roese if (0 == (index & 1)) 627f1df9364SStefan Roese pattern = PATTERN_55; 628f1df9364SStefan Roese else 629f1df9364SStefan Roese pattern = PATTERN_AA; 630f1df9364SStefan Roese break; 631f1df9364SStefan Roese case PATTERN_RL: 632f1df9364SStefan Roese if (index < 6) 633f1df9364SStefan Roese pattern = PATTERN_00; 634f1df9364SStefan Roese else 635f1df9364SStefan Roese pattern = PATTERN_80; 636f1df9364SStefan Roese break; 637f1df9364SStefan Roese case PATTERN_STATIC_PBS: 638f1df9364SStefan Roese pattern = pattern_table_get_static_pbs_word(index); 639f1df9364SStefan Roese break; 640f1df9364SStefan Roese case PATTERN_KILLER_DQ0: 641f1df9364SStefan Roese case PATTERN_KILLER_DQ1: 642f1df9364SStefan Roese case PATTERN_KILLER_DQ2: 643f1df9364SStefan Roese case PATTERN_KILLER_DQ3: 644f1df9364SStefan Roese case PATTERN_KILLER_DQ4: 645f1df9364SStefan Roese case PATTERN_KILLER_DQ5: 646f1df9364SStefan Roese case PATTERN_KILLER_DQ6: 647f1df9364SStefan Roese case PATTERN_KILLER_DQ7: 648f1df9364SStefan Roese pattern = pattern_table_get_killer_word( 649f1df9364SStefan Roese (u8)(type - PATTERN_KILLER_DQ0), index); 650f1df9364SStefan Roese break; 651f1df9364SStefan Roese case PATTERN_RL2: 652f1df9364SStefan Roese if (index < 6) 653f1df9364SStefan Roese pattern = PATTERN_00; 654f1df9364SStefan Roese else 655f1df9364SStefan Roese pattern = PATTERN_01; 656f1df9364SStefan Roese break; 657f1df9364SStefan Roese case PATTERN_TEST: 658f1df9364SStefan Roese if (index > 1 && index < 6) 659f1df9364SStefan Roese pattern = PATTERN_00; 660*2b4ffbf6SChris Packham else 661*2b4ffbf6SChris Packham pattern = PATTERN_FF; 662f1df9364SStefan Roese break; 663f1df9364SStefan Roese case PATTERN_FULL_SSO0: 664f1df9364SStefan Roese case PATTERN_FULL_SSO1: 665f1df9364SStefan Roese case PATTERN_FULL_SSO2: 666f1df9364SStefan Roese case PATTERN_FULL_SSO3: 667f1df9364SStefan Roese pattern = pattern_table_get_sso_word( 668f1df9364SStefan Roese (u8)(type - PATTERN_FULL_SSO0), index); 669f1df9364SStefan Roese break; 670f1df9364SStefan Roese case PATTERN_VREF: 671f1df9364SStefan Roese pattern = pattern_table_get_vref_word(index); 672f1df9364SStefan Roese break; 673*2b4ffbf6SChris Packham case PATTERN_SSO_FULL_XTALK_DQ0: 674*2b4ffbf6SChris Packham case PATTERN_SSO_FULL_XTALK_DQ1: 675*2b4ffbf6SChris Packham case PATTERN_SSO_FULL_XTALK_DQ2: 676*2b4ffbf6SChris Packham case PATTERN_SSO_FULL_XTALK_DQ3: 677*2b4ffbf6SChris Packham case PATTERN_SSO_FULL_XTALK_DQ4: 678*2b4ffbf6SChris Packham case PATTERN_SSO_FULL_XTALK_DQ5: 679*2b4ffbf6SChris Packham case PATTERN_SSO_FULL_XTALK_DQ6: 680*2b4ffbf6SChris Packham case PATTERN_SSO_FULL_XTALK_DQ7: 681*2b4ffbf6SChris Packham pattern = pattern_table_get_sso_full_xtalk_word( 682*2b4ffbf6SChris Packham (u8)(type - PATTERN_SSO_FULL_XTALK_DQ0), index); 683*2b4ffbf6SChris Packham break; 684*2b4ffbf6SChris Packham case PATTERN_SSO_XTALK_FREE_DQ0: 685*2b4ffbf6SChris Packham case PATTERN_SSO_XTALK_FREE_DQ1: 686*2b4ffbf6SChris Packham case PATTERN_SSO_XTALK_FREE_DQ2: 687*2b4ffbf6SChris Packham case PATTERN_SSO_XTALK_FREE_DQ3: 688*2b4ffbf6SChris Packham case PATTERN_SSO_XTALK_FREE_DQ4: 689*2b4ffbf6SChris Packham case PATTERN_SSO_XTALK_FREE_DQ5: 690*2b4ffbf6SChris Packham case PATTERN_SSO_XTALK_FREE_DQ6: 691*2b4ffbf6SChris Packham case PATTERN_SSO_XTALK_FREE_DQ7: 692*2b4ffbf6SChris Packham pattern = pattern_table_get_sso_xtalk_free_word( 693*2b4ffbf6SChris Packham (u8)(type - PATTERN_SSO_XTALK_FREE_DQ0), index); 694*2b4ffbf6SChris Packham break; 695*2b4ffbf6SChris Packham case PATTERN_ISI_XTALK_FREE: 696*2b4ffbf6SChris Packham pattern = pattern_table_get_isi_word(index); 697*2b4ffbf6SChris Packham break; 698f1df9364SStefan Roese default: 699*2b4ffbf6SChris Packham DEBUG_TRAINING_IP(DEBUG_LEVEL_ERROR, ("Error: %s: pattern type [%d] not supported\n", 700*2b4ffbf6SChris Packham __func__, (int)type)); 701f1df9364SStefan Roese pattern = 0; 702f1df9364SStefan Roese break; 703f1df9364SStefan Roese } 704f1df9364SStefan Roese } else { 705f1df9364SStefan Roese /* 16bit patterns */ 706f1df9364SStefan Roese switch (type) { 707f1df9364SStefan Roese case PATTERN_PBS1: 708f1df9364SStefan Roese case PATTERN_PBS2: 709f1df9364SStefan Roese case PATTERN_PBS3: 710f1df9364SStefan Roese pattern = PATTERN_55AA; 711f1df9364SStefan Roese break; 712f1df9364SStefan Roese case PATTERN_RL: 713f1df9364SStefan Roese if (index < 3) 714f1df9364SStefan Roese pattern = PATTERN_00; 715f1df9364SStefan Roese else 716f1df9364SStefan Roese pattern = PATTERN_80; 717f1df9364SStefan Roese break; 718f1df9364SStefan Roese case PATTERN_STATIC_PBS: 719f1df9364SStefan Roese pattern = PATTERN_00FF; 720f1df9364SStefan Roese break; 721f1df9364SStefan Roese case PATTERN_KILLER_DQ0: 722f1df9364SStefan Roese case PATTERN_KILLER_DQ1: 723f1df9364SStefan Roese case PATTERN_KILLER_DQ2: 724f1df9364SStefan Roese case PATTERN_KILLER_DQ3: 725f1df9364SStefan Roese case PATTERN_KILLER_DQ4: 726f1df9364SStefan Roese case PATTERN_KILLER_DQ5: 727f1df9364SStefan Roese case PATTERN_KILLER_DQ6: 728f1df9364SStefan Roese case PATTERN_KILLER_DQ7: 729f1df9364SStefan Roese pattern = pattern_table_get_killer_word16( 730f1df9364SStefan Roese (u8)(type - PATTERN_KILLER_DQ0), index); 731f1df9364SStefan Roese break; 732f1df9364SStefan Roese case PATTERN_RL2: 733f1df9364SStefan Roese if (index < 3) 734f1df9364SStefan Roese pattern = PATTERN_00; 735f1df9364SStefan Roese else 736f1df9364SStefan Roese pattern = PATTERN_01; 737f1df9364SStefan Roese break; 738f1df9364SStefan Roese case PATTERN_TEST: 739*2b4ffbf6SChris Packham if ((index == 0) || (index == 3)) 740*2b4ffbf6SChris Packham pattern = 0x00000000; 741*2b4ffbf6SChris Packham else 742*2b4ffbf6SChris Packham pattern = 0xFFFFFFFF; 743f1df9364SStefan Roese break; 744f1df9364SStefan Roese case PATTERN_FULL_SSO0: 745f1df9364SStefan Roese pattern = 0x0000ffff; 746f1df9364SStefan Roese break; 747f1df9364SStefan Roese case PATTERN_FULL_SSO1: 748f1df9364SStefan Roese case PATTERN_FULL_SSO2: 749f1df9364SStefan Roese case PATTERN_FULL_SSO3: 750f1df9364SStefan Roese pattern = pattern_table_get_sso_word( 751f1df9364SStefan Roese (u8)(type - PATTERN_FULL_SSO1), index); 752f1df9364SStefan Roese break; 753f1df9364SStefan Roese case PATTERN_VREF: 754f1df9364SStefan Roese pattern = pattern_table_get_vref_word16(index); 755f1df9364SStefan Roese break; 756*2b4ffbf6SChris Packham case PATTERN_SSO_FULL_XTALK_DQ0: 757*2b4ffbf6SChris Packham case PATTERN_SSO_FULL_XTALK_DQ1: 758*2b4ffbf6SChris Packham case PATTERN_SSO_FULL_XTALK_DQ2: 759*2b4ffbf6SChris Packham case PATTERN_SSO_FULL_XTALK_DQ3: 760*2b4ffbf6SChris Packham case PATTERN_SSO_FULL_XTALK_DQ4: 761*2b4ffbf6SChris Packham case PATTERN_SSO_FULL_XTALK_DQ5: 762*2b4ffbf6SChris Packham case PATTERN_SSO_FULL_XTALK_DQ6: 763*2b4ffbf6SChris Packham case PATTERN_SSO_FULL_XTALK_DQ7: 764*2b4ffbf6SChris Packham pattern = pattern_table_get_sso_full_xtalk_word16( 765*2b4ffbf6SChris Packham (u8)(type - PATTERN_SSO_FULL_XTALK_DQ0), index); 766*2b4ffbf6SChris Packham break; 767*2b4ffbf6SChris Packham case PATTERN_SSO_XTALK_FREE_DQ0: 768*2b4ffbf6SChris Packham case PATTERN_SSO_XTALK_FREE_DQ1: 769*2b4ffbf6SChris Packham case PATTERN_SSO_XTALK_FREE_DQ2: 770*2b4ffbf6SChris Packham case PATTERN_SSO_XTALK_FREE_DQ3: 771*2b4ffbf6SChris Packham case PATTERN_SSO_XTALK_FREE_DQ4: 772*2b4ffbf6SChris Packham case PATTERN_SSO_XTALK_FREE_DQ5: 773*2b4ffbf6SChris Packham case PATTERN_SSO_XTALK_FREE_DQ6: 774*2b4ffbf6SChris Packham case PATTERN_SSO_XTALK_FREE_DQ7: 775*2b4ffbf6SChris Packham pattern = pattern_table_get_sso_xtalk_free_word16( 776*2b4ffbf6SChris Packham (u8)(type - PATTERN_SSO_XTALK_FREE_DQ0), index); 777*2b4ffbf6SChris Packham break; 778*2b4ffbf6SChris Packham case PATTERN_ISI_XTALK_FREE: 779*2b4ffbf6SChris Packham pattern = pattern_table_get_isi_word16(index); 780*2b4ffbf6SChris Packham break; 781f1df9364SStefan Roese default: 782*2b4ffbf6SChris Packham DEBUG_TRAINING_IP(DEBUG_LEVEL_ERROR, ("Error: %s: pattern type [%d] not supported\n", 783*2b4ffbf6SChris Packham __func__, (int)type)); 784f1df9364SStefan Roese pattern = 0; 785f1df9364SStefan Roese break; 786f1df9364SStefan Roese } 787f1df9364SStefan Roese } 788f1df9364SStefan Roese 789f1df9364SStefan Roese return pattern; 790f1df9364SStefan Roese } 791*2b4ffbf6SChris Packham 792*2b4ffbf6SChris Packham /* Device attribute functions */ 793*2b4ffbf6SChris Packham void ddr3_tip_dev_attr_init(u32 dev_num) 794*2b4ffbf6SChris Packham { 795*2b4ffbf6SChris Packham u32 attr_id; 796*2b4ffbf6SChris Packham 797*2b4ffbf6SChris Packham for (attr_id = 0; attr_id < MV_ATTR_LAST; attr_id++) 798*2b4ffbf6SChris Packham ddr_dev_attributes[dev_num][attr_id] = 0xFF; 799*2b4ffbf6SChris Packham 800*2b4ffbf6SChris Packham ddr_dev_attr_init_done[dev_num] = 1; 801*2b4ffbf6SChris Packham } 802*2b4ffbf6SChris Packham 803*2b4ffbf6SChris Packham u32 ddr3_tip_dev_attr_get(u32 dev_num, enum mv_ddr_dev_attribute attr_id) 804*2b4ffbf6SChris Packham { 805*2b4ffbf6SChris Packham if (ddr_dev_attr_init_done[dev_num] == 0) 806*2b4ffbf6SChris Packham ddr3_tip_dev_attr_init(dev_num); 807*2b4ffbf6SChris Packham 808*2b4ffbf6SChris Packham return ddr_dev_attributes[dev_num][attr_id]; 809*2b4ffbf6SChris Packham } 810*2b4ffbf6SChris Packham 811*2b4ffbf6SChris Packham void ddr3_tip_dev_attr_set(u32 dev_num, enum mv_ddr_dev_attribute attr_id, u32 value) 812*2b4ffbf6SChris Packham { 813*2b4ffbf6SChris Packham if (ddr_dev_attr_init_done[dev_num] == 0) 814*2b4ffbf6SChris Packham ddr3_tip_dev_attr_init(dev_num); 815*2b4ffbf6SChris Packham 816*2b4ffbf6SChris Packham ddr_dev_attributes[dev_num][attr_id] = value; 817*2b4ffbf6SChris Packham } 818