1*c40b6df8SAnup Patel# SPDX-License-Identifier: GPL-2.0 2*c40b6df8SAnup Patel 3*c40b6df8SAnup Patelconfig CLK_ANALOGBITS_WRPLL_CLN28HPC 4*c40b6df8SAnup Patel bool 5*c40b6df8SAnup Patel 6*c40b6df8SAnup Patelconfig CLK_SIFIVE 7*c40b6df8SAnup Patel bool "SiFive SoC driver support" 8*c40b6df8SAnup Patel depends on CLK 9*c40b6df8SAnup Patel help 10*c40b6df8SAnup Patel SoC drivers for SiFive Linux-capable SoCs. 11*c40b6df8SAnup Patel 12*c40b6df8SAnup Patelconfig CLK_SIFIVE_FU540_PRCI 13*c40b6df8SAnup Patel bool "PRCI driver for SiFive FU540 SoCs" 14*c40b6df8SAnup Patel depends on CLK_SIFIVE 15*c40b6df8SAnup Patel select CLK_ANALOGBITS_WRPLL_CLN28HPC 16*c40b6df8SAnup Patel help 17*c40b6df8SAnup Patel Supports the Power Reset Clock interface (PRCI) IP block found in 18*c40b6df8SAnup Patel FU540 SoCs. If this kernel is meant to run on a SiFive FU540 SoC, 19*c40b6df8SAnup Patel enable this driver. 20