History log of /openbmc/u-boot/drivers/clk/sifive/Kconfig (Results 1 – 5 of 5)
Revision Date Author Comments
# c507d306 04-Mar-2019 Tom Rini <trini@konsulko.com>

Merge tag 'u-boot-atmel-2019.04-a' of git://git.denx.de/u-boot-atmel

First set of u-boot-atmel fixes for 2019.04 cycle


# cfba74d0 28-Feb-2019 Tom Rini <trini@konsulko.com>

Merge branch 'master' of git://git.denx.de/u-boot-socfpga

- SoCFPGA cache/gpio fixes


# 35b05146 28-Feb-2019 Tom Rini <trini@konsulko.com>

Merge branch 'master' of git://git.denx.de/u-boot-sh

- Gen2/Gen3 fixes for warnings and sdhi


# da206916 28-Feb-2019 Tom Rini <trini@konsulko.com>

Merge branch 'master' of git://git.denx.de/u-boot-sunxi

- Various Bananapi fixes


# c40b6df8 25-Feb-2019 Anup Patel <Anup.Patel@wdc.com>

clk: Add SiFive FU540 PRCI clock driver

Add driver code for the SiFive FU540 PRCI IP block. This IP block
handles reset and clock control for the SiFive FU540 device and
implements

clk: Add SiFive FU540 PRCI clock driver

Add driver code for the SiFive FU540 PRCI IP block. This IP block
handles reset and clock control for the SiFive FU540 device and
implements SoC-level clock tree controls and dividers.

Based on code written by Wesley Terpstra <wesley@sifive.com>
found in commit 999529edf517ed75b56659d456d221b2ee56bb60 of:
https://github.com/riscv/riscv-linux

Boot and PLL rate change were tested on a SiFive HiFive Unleashed
board.

Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Alexander Graf <agraf@suse.de>

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