1menu "Clock" 2 3config CLK 4 bool "Enable clock driver support" 5 depends on DM 6 help 7 This allows drivers to be provided for clock generators, including 8 oscillators and PLLs. Devices can use a common clock API to request 9 a particular clock rate and check on available clocks. Clocks can 10 feed into other clocks in a tree structure, with multiplexers to 11 choose the source for each clock. 12 13config SPL_CLK 14 bool "Enable clock support in SPL" 15 depends on CLK && SPL && SPL_DM 16 help 17 The clock subsystem adds a small amount of overhead to the image. 18 If this is acceptable and you have a need to use clock drivers in 19 SPL, enable this option. It might provide a cleaner interface to 20 setting up clocks within SPL, and allows the same drivers to be 21 used as U-Boot proper. 22 23config TPL_CLK 24 bool "Enable clock support in TPL" 25 depends on CLK && TPL_DM 26 help 27 The clock subsystem adds a small amount of overhead to the image. 28 If this is acceptable and you have a need to use clock drivers in 29 SPL, enable this option. It might provide a cleaner interface to 30 setting up clocks within TPL, and allows the same drivers to be 31 used as U-Boot proper. 32 33config CLK_BCM6345 34 bool "Clock controller driver for BCM6345" 35 depends on CLK && ARCH_BMIPS 36 default y 37 help 38 This clock driver adds support for enabling and disabling peripheral 39 clocks on BCM6345 SoCs. HW has no rate changing capabilities. 40 41config CLK_BOSTON 42 def_bool y if TARGET_BOSTON 43 depends on CLK 44 select REGMAP 45 select SYSCON 46 help 47 Enable this to support the clocks 48 49config CLK_STM32F 50 bool "Enable clock driver support for STM32F family" 51 depends on CLK && (STM32F7 || STM32F4) 52 default y 53 help 54 This clock driver adds support for RCC clock management 55 for STM32F4 and STM32F7 SoCs. 56 57config CLK_HSDK 58 bool "Enable cgu clock driver for HSDK" 59 depends on CLK 60 help 61 Enable this to support the cgu clocks on Synopsys ARC HSDK 62 63config CLK_ZYNQ 64 bool "Enable clock driver support for Zynq" 65 depends on CLK && ARCH_ZYNQ 66 default y 67 help 68 This clock driver adds support for clock realted settings for 69 Zynq platform. 70 71config CLK_ZYNQMP 72 bool "Enable clock driver support for ZynqMP" 73 depends on ARCH_ZYNQMP 74 help 75 This clock driver adds support for clock realted settings for 76 ZynqMP platform. 77 78config CLK_STM32MP1 79 bool "Enable RCC clock driver for STM32MP1" 80 depends on ARCH_STM32MP && CLK 81 default y 82 help 83 Enable the STM32 clock (RCC) driver. Enable support for 84 manipulating STM32MP1's on-SoC clocks. 85 86source "drivers/clk/at91/Kconfig" 87source "drivers/clk/exynos/Kconfig" 88source "drivers/clk/mvebu/Kconfig" 89source "drivers/clk/owl/Kconfig" 90source "drivers/clk/renesas/Kconfig" 91source "drivers/clk/tegra/Kconfig" 92source "drivers/clk/uniphier/Kconfig" 93 94config ICS8N3QV01 95 bool "Enable ICS8N3QV01 VCXO driver" 96 depends on CLK 97 help 98 Support for the ICS8N3QV01 Quad-Frequency VCXO (Voltage-Controlled 99 Crystal Oscillator). The output frequency can be programmed via an 100 I2C interface. 101 102endmenu 103