1*c87c30e3SJacob ChenRockchip LVDS interface 2*c87c30e3SJacob Chen------------------ 3*c87c30e3SJacob Chen 4*c87c30e3SJacob ChenRequired properties: 5*c87c30e3SJacob Chen- compatible: "rockchip,rk3288-lvds"; 6*c87c30e3SJacob Chen 7*c87c30e3SJacob Chen- reg: physical base address of the controller and length 8*c87c30e3SJacob Chen of memory mapped region. 9*c87c30e3SJacob Chen- clocks: must include clock specifiers corresponding to entries in the 10*c87c30e3SJacob Chen clock-names property. 11*c87c30e3SJacob Chen- clock-names: must contain "pclk_lvds" 12*c87c30e3SJacob Chen 13*c87c30e3SJacob Chen- rockchip,grf: phandle to the general register files syscon 14*c87c30e3SJacob Chen 15*c87c30e3SJacob Chen- rockchip,data-mapping: should be <LVDS_FORMAT_VESA> or <LVDS_FORMAT_JEIDA>, 16*c87c30e3SJacob Chen This describes how the color bits are laid out in the 17*c87c30e3SJacob Chen serialized LVDS signal. 18*c87c30e3SJacob Chen- rockchip,data-width : should be <18> or <24>; 19*c87c30e3SJacob Chen- rockchip,output: should be <LVDS_OUTPUT_RGB>, <LVDS_OUTPUT_SINGLE> or 20*c87c30e3SJacob Chen <LVDS_OUTPUT_DUAL>, This describes the output face. 21*c87c30e3SJacob Chen 22*c87c30e3SJacob Chen- display-timings : described by 23*c87c30e3SJacob Chen doc/devicetree/device-tree-bindings/video/display-timing.txt. 24*c87c30e3SJacob Chen 25*c87c30e3SJacob ChenExample: 26*c87c30e3SJacob Chen lvds: lvds@ff96c000 { 27*c87c30e3SJacob Chen compatible = "rockchip,rk3288-lvds"; 28*c87c30e3SJacob Chen reg = <0xff96c000 0x4000>; 29*c87c30e3SJacob Chen clocks = <&cru PCLK_LVDS_PHY>; 30*c87c30e3SJacob Chen clock-names = "pclk_lvds"; 31*c87c30e3SJacob Chen pinctrl-names = "default"; 32*c87c30e3SJacob Chen pinctrl-0 = <&lcdc0_ctl>; 33*c87c30e3SJacob Chen rockchip,grf = <&grf>; 34*c87c30e3SJacob Chen status = "disabled"; 35*c87c30e3SJacob Chen ports { 36*c87c30e3SJacob Chen #address-cells = <1>; 37*c87c30e3SJacob Chen #size-cells = <0>; 38*c87c30e3SJacob Chen 39*c87c30e3SJacob Chen lvds_in: port@0 { 40*c87c30e3SJacob Chen reg = <0>; 41*c87c30e3SJacob Chen 42*c87c30e3SJacob Chen #address-cells = <1>; 43*c87c30e3SJacob Chen #size-cells = <0>; 44*c87c30e3SJacob Chen 45*c87c30e3SJacob Chen lvds_in_vopb: endpoint@0 { 46*c87c30e3SJacob Chen reg = <0>; 47*c87c30e3SJacob Chen remote-endpoint = <&vopb_out_lvds>; 48*c87c30e3SJacob Chen }; 49*c87c30e3SJacob Chen lvds_in_vopl: endpoint@1 { 50*c87c30e3SJacob Chen reg = <1>; 51*c87c30e3SJacob Chen remote-endpoint = <&vopl_out_lvds>; 52*c87c30e3SJacob Chen }; 53*c87c30e3SJacob Chen }; 54*c87c30e3SJacob Chen }; 55*c87c30e3SJacob Chen }; 56*c87c30e3SJacob Chen 57*c87c30e3SJacob Chen &lvds { 58*c87c30e3SJacob Chen rockchip,data-mapping = <LVDS_FORMAT_VESA>; 59*c87c30e3SJacob Chen rockchip,data-width = <24>; 60*c87c30e3SJacob Chen rockchip,output = <LVDS_OUTPUT_DUAL>; 61*c87c30e3SJacob Chen rockchip,panel = <&panel>; 62*c87c30e3SJacob Chen status = "okay"; 63*c87c30e3SJacob Chen 64*c87c30e3SJacob Chen display-timings { 65*c87c30e3SJacob Chen timing@0 { 66*c87c30e3SJacob Chen clock-frequency = <40000000>; 67*c87c30e3SJacob Chen hactive = <1920>; 68*c87c30e3SJacob Chen vactive = <1080>; 69*c87c30e3SJacob Chen hsync-len = <44>; 70*c87c30e3SJacob Chen hfront-porch = <88>; 71*c87c30e3SJacob Chen hback-porch = <148>; 72*c87c30e3SJacob Chen vfront-porch = <4>; 73*c87c30e3SJacob Chen vback-porch = <36>; 74*c87c30e3SJacob Chen vsync-len = <5>; 75*c87c30e3SJacob Chen }; 76*c87c30e3SJacob Chen }; 77*c87c30e3SJacob Chen }; 78