1 /* 2 * This program is distributed in the hope that it will be useful, 3 * but WITHOUT ANY WARRANTY; without even the implied warranty of 4 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 5 * GNU General Public License for more details. 6 * 7 * You should have received a copy of the GNU General Public License 8 * along with this program; if not, write to the Free Software 9 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 10 */ 11 #include <stdlib.h> 12 #include <common.h> 13 #include <console.h> 14 #include <bootretry.h> 15 #include <cli.h> 16 #include <command.h> 17 #include <console.h> 18 #include <malloc.h> 19 #include <inttypes.h> 20 #include <mapmem.h> 21 #include <asm/io.h> 22 #include <linux/compiler.h> 23 #include <u-boot/sha256.h> 24 25 DECLARE_GLOBAL_DATA_PTR; 26 27 #define OTP_PASSWD 0x349fe38a 28 #define RETRY 3 29 #define OTP_REGION_STRAP BIT(0) 30 #define OTP_REGION_CONF BIT(1) 31 #define OTP_REGION_DATA BIT(2) 32 33 #define OTP_USAGE -1 34 #define OTP_FAILURE -2 35 #define OTP_SUCCESS 0 36 37 #define OTP_PROG_SKIP 1 38 39 #define OTP_KEY_TYPE_RSA 1 40 #define OTP_KEY_TYPE_AES 2 41 #define OTP_KEY_TYPE_VAULT 3 42 #define OTP_KEY_TYPE_HMAC 4 43 44 45 #define OTP_REG_RESERVED -1 46 #define OTP_REG_VALUE -2 47 #define OTP_REG_VALID_BIT -3 48 49 #define PBSTR "||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||" 50 #define PBWIDTH 60 51 52 #define OTP_BASE 0x1e6f2000 53 #define OTP_PROTECT_KEY OTP_BASE 54 #define OTP_COMMAND OTP_BASE + 0x4 55 #define OTP_TIMING OTP_BASE + 0x8 56 #define OTP_ADDR OTP_BASE + 0x10 57 #define OTP_STATUS OTP_BASE + 0x14 58 #define OTP_COMPARE_1 OTP_BASE + 0x20 59 #define OTP_COMPARE_2 OTP_BASE + 0x24 60 #define OTP_COMPARE_3 OTP_BASE + 0x28 61 #define OTP_COMPARE_4 OTP_BASE + 0x2c 62 63 #define OTP_MAGIC "SOCOTP" 64 #define CHECKSUM_LEN 32 65 #define OTP_INC_DATA (1 << 31) 66 #define OTP_INC_CONFIG (1 << 30) 67 #define OTP_INC_STRAP (1 << 29) 68 #define OTP_ECC_EN (1 << 28) 69 #define OTP_REGION_SIZE(info) ((info >> 16) & 0xffff) 70 #define OTP_REGION_OFFSET(info) (info & 0xffff) 71 #define OTP_IMAGE_SIZE(info) (info & 0xffff) 72 73 #define OTP_AST2600A0 0 74 #define OTP_AST2600A1 1 75 76 struct otp_header { 77 u8 otp_magic[8]; 78 u8 otp_version[8]; 79 u32 image_info; 80 u32 data_info; 81 u32 config_info; 82 u32 strap_info; 83 u32 checksum_offset; 84 } __attribute__((packed)); 85 86 struct otpstrap_status { 87 int value; 88 int option_array[7]; 89 int remain_times; 90 int writeable_option; 91 int reg_protected; 92 int protected; 93 }; 94 95 struct otpconf_parse { 96 int dw_offset; 97 int bit; 98 int length; 99 int value; 100 int ignore; 101 char status[80]; 102 }; 103 104 struct otpstrap_info { 105 int8_t bit_offset; 106 int8_t length; 107 int8_t value; 108 char *information; 109 }; 110 111 struct otpconf_info { 112 int8_t dw_offset; 113 int8_t bit_offset; 114 int8_t length; 115 int8_t value; 116 char *information; 117 }; 118 119 struct otpkey_type { 120 int value; 121 int key_type; 122 int need_id; 123 char information[110]; 124 }; 125 126 struct otp_info_cb { 127 int version; 128 const struct otpstrap_info *strap_info; 129 int strap_info_len; 130 const struct otpconf_info *conf_info; 131 int conf_info_len; 132 const struct otpkey_type *key_info; 133 int key_info_len; 134 135 }; 136 137 struct otp_image_layout { 138 int data_length; 139 int conf_length; 140 int strap_length; 141 uint8_t *data; 142 uint8_t *data_ignore; 143 uint8_t *conf; 144 uint8_t *conf_ignore; 145 uint8_t *strap; 146 uint8_t *strap_reg_pro; 147 uint8_t *strap_pro; 148 uint8_t *strap_ignore; 149 }; 150 151 static struct otp_info_cb info_cb; 152 153 static const struct otpstrap_info a0_strap_info[] = { 154 { 0, 1, 0, "Disable secure boot" }, 155 { 0, 1, 1, "Enable secure boot" }, 156 { 1, 1, 0, "Disable boot from eMMC" }, 157 { 1, 1, 1, "Enable boot from eMMC" }, 158 { 2, 1, 0, "Disable Boot from debug SPI" }, 159 { 2, 1, 1, "Enable Boot from debug SPI" }, 160 { 3, 1, 0, "Enable ARM CM3" }, 161 { 3, 1, 1, "Disable ARM CM3" }, 162 { 4, 1, 0, "No VGA BIOS ROM, VGA BIOS is merged in the system BIOS" }, 163 { 4, 1, 1, "Enable dedicated VGA BIOS ROM" }, 164 { 5, 1, 0, "MAC 1 : RMII/NCSI" }, 165 { 5, 1, 1, "MAC 1 : RGMII" }, 166 { 6, 1, 0, "MAC 2 : RMII/NCSI" }, 167 { 6, 1, 1, "MAC 2 : RGMII" }, 168 { 7, 3, 0, "CPU Frequency : 1GHz" }, 169 { 7, 3, 1, "CPU Frequency : 800MHz" }, 170 { 7, 3, 2, "CPU Frequency : 1.2GHz" }, 171 { 7, 3, 3, "CPU Frequency : 1.4GHz" }, 172 { 10, 2, 0, "HCLK ratio AXI:AHB = 2:1" }, 173 { 10, 2, 1, "HCLK ratio AXI:AHB = 2:1" }, 174 { 10, 2, 2, "HCLK ratio AXI:AHB = 3:1" }, 175 { 10, 2, 3, "HCLK ratio AXI:AHB = 4:1" }, 176 { 12, 2, 0, "VGA memory size : 8MB" }, 177 { 12, 2, 1, "VGA memory size : 16MB" }, 178 { 12, 2, 2, "VGA memory size : 32MB" }, 179 { 12, 2, 3, "VGA memory size : 64MB" }, 180 { 14, 3, OTP_REG_RESERVED, "" }, 181 { 17, 1, 0, "VGA class code : Class Code for video device" }, 182 { 17, 1, 1, "VGA class code : Class Code for VGA device" }, 183 { 18, 1, 0, "Enable debug interfaces 0" }, 184 { 18, 1, 1, "Disable debug interfaces 0" }, 185 { 19, 1, 0, "Boot from emmc mode : High eMMC speed" }, 186 { 19, 1, 1, "Boot from emmc mode : Normal eMMC speed" }, 187 { 20, 1, 0, "Enable Pcie EHCI device" }, 188 { 20, 1, 1, "Disable Pcie EHCI device" }, 189 { 21, 1, 0, "Enable VGA XDMA function" }, 190 { 21, 1, 1, "Disable VGA XDMA function" }, 191 { 22, 1, 0, "Normal BMC mode" }, 192 { 22, 1, 1, "Disable dedicated BMC functions for non-BMC application" }, 193 { 23, 1, 0, "SSPRST# pin is for secondary processor dedicated reset pin" }, 194 { 23, 1, 1, "SSPRST# pin is for PCIE root complex dedicated reset pin" }, 195 { 24, 1, 0, "DRAM types : DDR4" }, 196 { 24, 1, 1, "DRAM types : DDR3" }, 197 { 25, 5, OTP_REG_RESERVED, "" }, 198 { 30, 2, OTP_REG_RESERVED, "" }, 199 { 32, 1, 0, "MAC 3 : RMII/NCSI" }, 200 { 32, 1, 1, "MAC 3 : RGMII" }, 201 { 33, 1, 0, "MAC 4 : RMII/NCSI" }, 202 { 33, 1, 1, "MAC 4 : RGMII" }, 203 { 34, 1, 0, "SuperIO configuration address : 0x2E" }, 204 { 34, 1, 1, "SuperIO configuration address : 0x4E" }, 205 { 35, 1, 0, "Enable LPC to decode SuperIO" }, 206 { 35, 1, 1, "Disable LPC to decode SuperIO" }, 207 { 36, 1, 0, "Enable debug interfaces 1" }, 208 { 36, 1, 1, "Disable debug interfaces 1" }, 209 { 37, 1, 0, "Disable ACPI function" }, 210 { 37, 1, 1, "Enable ACPI function" }, 211 { 38, 1, 0, "Enable eSPI mode" }, 212 { 38, 1, 1, "Enable LPC mode" }, 213 { 39, 1, 0, "Enable SAFS mode" }, 214 { 39, 1, 1, "Enable SAFS mode" }, 215 { 40, 2, OTP_REG_RESERVED, "" }, 216 { 42, 1, 0, "Disable boot SPI 3B/4B address mode auto detection" }, 217 { 42, 1, 1, "Enable boot SPI 3B/4B address mode auto detection" }, 218 { 43, 1, 0, "Disable boot SPI ABR" }, 219 { 43, 1, 1, "Enable boot SPI ABR" }, 220 { 44, 1, 0, "Boot SPI ABR mode : dual SPI flash" }, 221 { 44, 1, 1, "Boot SPI ABR mode : single SPI flash" }, 222 { 45, 3, 0, "Boot SPI flash size : no define size" }, 223 { 45, 3, 1, "Boot SPI flash size : 2MB" }, 224 { 45, 3, 2, "Boot SPI flash size : 4MB" }, 225 { 45, 3, 3, "Boot SPI flash size : 8MB" }, 226 { 45, 3, 4, "Boot SPI flash size : 16MB" }, 227 { 45, 3, 5, "Boot SPI flash size : 32MB" }, 228 { 45, 3, 6, "Boot SPI flash size : 64MB" }, 229 { 45, 3, 7, "Boot SPI flash size : 128MB" }, 230 { 48, 1, 0, "Disable host SPI ABR" }, 231 { 48, 1, 1, "Enable host SPI ABR" }, 232 { 49, 1, 0, "Disable host SPI ABR mode select pin" }, 233 { 49, 1, 1, "Enable host SPI ABR mode select pin" }, 234 { 50, 1, 0, "Host SPI ABR mode : dual SPI flash" }, 235 { 50, 1, 1, "Host SPI ABR mode : single SPI flash" }, 236 { 51, 3, 0, "Host SPI flash size : no define size" }, 237 { 51, 3, 1, "Host SPI flash size : 2MB" }, 238 { 51, 3, 2, "Host SPI flash size : 4MB" }, 239 { 51, 3, 3, "Host SPI flash size : 8MB" }, 240 { 51, 3, 4, "Host SPI flash size : 16MB" }, 241 { 51, 3, 5, "Host SPI flash size : 32MB" }, 242 { 51, 3, 6, "Host SPI flash size : 64MB" }, 243 { 51, 3, 7, "Host SPI flash size : 128MB" }, 244 { 54, 1, 0, "Disable boot SPI auxiliary control pins" }, 245 { 54, 1, 1, "Enable boot SPI auxiliary control pins" }, 246 { 55, 2, 0, "Boot SPI CRTM size : disable CRTM" }, 247 { 55, 2, 1, "Boot SPI CRTM size : 256KB" }, 248 { 55, 2, 2, "Boot SPI CRTM size : 512KB" }, 249 { 55, 2, 3, "Boot SPI CRTM size : 1MB" }, 250 { 57, 2, 0, "Host SPI CRTM size : disable CRTM" }, 251 { 57, 2, 1, "Host SPI CRTM size : 256KB" }, 252 { 57, 2, 2, "Host SPI CRTM size : 512KB" }, 253 { 57, 2, 3, "Host SPI CRTM size : 1MB" }, 254 { 59, 1, 0, "Disable host SPI auxiliary control pins" }, 255 { 59, 1, 1, "Enable host SPI auxiliary control pins" }, 256 { 60, 1, 0, "Disable GPIO pass through" }, 257 { 60, 1, 1, "Enable GPIO pass through" }, 258 { 61, 1, 0, "Enable low security secure boot key" }, 259 { 61, 1, 1, "Disable low security secure boot key" }, 260 { 62, 1, 0, "Disable dedicate GPIO strap pins" }, 261 { 62, 1, 1, "Enable dedicate GPIO strap pins" }, 262 { 63, 1, OTP_REG_RESERVED, "" } 263 }; 264 265 static const struct otpstrap_info a1_strap_info[] = { 266 { 0, 1, 0, "Disable secure boot" }, 267 { 0, 1, 1, "Enable secure boot" }, 268 { 1, 1, 0, "Disable boot from eMMC" }, 269 { 1, 1, 1, "Enable boot from eMMC" }, 270 { 2, 1, 0, "Disable Boot from debug SPI" }, 271 { 2, 1, 1, "Enable Boot from debug SPI" }, 272 { 3, 1, 0, "Enable ARM CM3" }, 273 { 3, 1, 1, "Disable ARM CM3" }, 274 { 4, 1, 0, "No VGA BIOS ROM, VGA BIOS is merged in the system BIOS" }, 275 { 4, 1, 1, "Enable dedicated VGA BIOS ROM" }, 276 { 5, 1, 0, "MAC 1 : RMII/NCSI" }, 277 { 5, 1, 1, "MAC 1 : RGMII" }, 278 { 6, 1, 0, "MAC 2 : RMII/NCSI" }, 279 { 6, 1, 1, "MAC 2 : RGMII" }, 280 { 7, 3, 0, "CPU Frequency : 1.2GHz" }, 281 { 7, 3, 1, "CPU Frequency : 1.6MHz" }, 282 { 7, 3, 2, "CPU Frequency : 1.2GHz" }, 283 { 7, 3, 3, "CPU Frequency : 1.6GHz" }, 284 { 7, 3, 4, "CPU Frequency : 800MHz" }, 285 { 7, 3, 5, "CPU Frequency : 800MHz" }, 286 { 7, 3, 6, "CPU Frequency : 800MHz" }, 287 { 7, 3, 7, "CPU Frequency : 800MHz" }, 288 { 10, 2, 0, "HCLK ratio AXI:AHB = 2:1" }, 289 { 10, 2, 1, "HCLK ratio AXI:AHB = 2:1" }, 290 { 10, 2, 2, "HCLK ratio AXI:AHB = 3:1" }, 291 { 10, 2, 3, "HCLK ratio AXI:AHB = 4:1" }, 292 { 12, 2, 0, "VGA memory size : 8MB" }, 293 { 12, 2, 1, "VGA memory size : 16MB" }, 294 { 12, 2, 2, "VGA memory size : 32MB" }, 295 { 12, 2, 3, "VGA memory size : 64MB" }, 296 { 14, 3, OTP_REG_RESERVED, "" }, 297 { 17, 1, 0, "VGA class code : Class Code for video device" }, 298 { 17, 1, 1, "VGA class code : Class Code for VGA device" }, 299 { 18, 1, 0, "Enable debug interfaces 0" }, 300 { 18, 1, 1, "Disable debug interfaces 0" }, 301 { 19, 1, 0, "Boot from emmc mode : High eMMC speed" }, 302 { 19, 1, 1, "Boot from emmc mode : Normal eMMC speed" }, 303 { 20, 1, 0, "Disable Pcie EHCI device" }, 304 { 20, 1, 1, "Enable Pcie EHCI device" }, 305 { 21, 1, 0, "Enable VGA XDMA function" }, 306 { 21, 1, 1, "Disable VGA XDMA function" }, 307 { 22, 1, 0, "Normal BMC mode" }, 308 { 22, 1, 1, "Disable dedicated BMC functions for non-BMC application" }, 309 { 23, 1, 0, "SSPRST# pin is for secondary processor dedicated reset pin" }, 310 { 23, 1, 1, "SSPRST# pin is for PCIE root complex dedicated reset pin" }, 311 { 24, 1, 0, "Enable watchdog to reset full chip" }, 312 { 24, 1, 1, "Disable watchdog to reset full chip" }, 313 { 25, 5, OTP_REG_RESERVED, "" }, 314 { 30, 2, OTP_REG_RESERVED, "" }, 315 { 32, 1, 0, "MAC 3 : RMII/NCSI" }, 316 { 32, 1, 1, "MAC 3 : RGMII" }, 317 { 33, 1, 0, "MAC 4 : RMII/NCSI" }, 318 { 33, 1, 1, "MAC 4 : RGMII" }, 319 { 34, 1, 0, "SuperIO configuration address : 0x2E" }, 320 { 34, 1, 1, "SuperIO configuration address : 0x4E" }, 321 { 35, 1, 0, "Enable LPC to decode SuperIO" }, 322 { 35, 1, 1, "Disable LPC to decode SuperIO" }, 323 { 36, 1, 0, "Enable debug interfaces 1" }, 324 { 36, 1, 1, "Disable debug interfaces 1" }, 325 { 37, 1, 0, "Disable ACPI function" }, 326 { 37, 1, 1, "Enable ACPI function" }, 327 { 38, 1, 0, "Enable eSPI mode" }, 328 { 38, 1, 1, "Enable LPC mode" }, 329 { 39, 1, 0, "Enable SAFS mode" }, 330 { 39, 1, 1, "Enable SAFS mode" }, 331 { 40, 2, OTP_REG_RESERVED, "" }, 332 { 42, 1, 0, "Disable boot SPI 3B/4B address mode auto detection" }, 333 { 42, 1, 1, "Enable boot SPI 3B/4B address mode auto detection" }, 334 { 43, 1, 0, "Disable boot SPI ABR" }, 335 { 43, 1, 1, "Enable boot SPI ABR" }, 336 { 44, 1, 0, "Boot SPI ABR mode : dual SPI flash" }, 337 { 44, 1, 1, "Boot SPI ABR mode : single SPI flash" }, 338 { 45, 3, 0, "Boot SPI flash size : no define size" }, 339 { 45, 3, 1, "Boot SPI flash size : 2MB" }, 340 { 45, 3, 2, "Boot SPI flash size : 4MB" }, 341 { 45, 3, 3, "Boot SPI flash size : 8MB" }, 342 { 45, 3, 4, "Boot SPI flash size : 16MB" }, 343 { 45, 3, 5, "Boot SPI flash size : 32MB" }, 344 { 45, 3, 6, "Boot SPI flash size : 64MB" }, 345 { 45, 3, 7, "Boot SPI flash size : 128MB" }, 346 { 48, 1, 0, "Disable host SPI ABR" }, 347 { 48, 1, 1, "Enable host SPI ABR" }, 348 { 49, 1, 0, "Disable host SPI ABR mode select pin" }, 349 { 49, 1, 1, "Enable host SPI ABR mode select pin" }, 350 { 50, 1, 0, "Host SPI ABR mode : dual SPI flash" }, 351 { 50, 1, 1, "Host SPI ABR mode : single SPI flash" }, 352 { 51, 3, 0, "Host SPI flash size : no define size" }, 353 { 51, 3, 1, "Host SPI flash size : 2MB" }, 354 { 51, 3, 2, "Host SPI flash size : 4MB" }, 355 { 51, 3, 3, "Host SPI flash size : 8MB" }, 356 { 51, 3, 4, "Host SPI flash size : 16MB" }, 357 { 51, 3, 5, "Host SPI flash size : 32MB" }, 358 { 51, 3, 6, "Host SPI flash size : 64MB" }, 359 { 51, 3, 7, "Host SPI flash size : 128MB" }, 360 { 54, 1, 0, "Disable boot SPI auxiliary control pins" }, 361 { 54, 1, 1, "Enable boot SPI auxiliary control pins" }, 362 { 55, 2, 0, "Boot SPI CRTM size : disable CRTM" }, 363 { 55, 2, 1, "Boot SPI CRTM size : 256KB" }, 364 { 55, 2, 2, "Boot SPI CRTM size : 512KB" }, 365 { 55, 2, 3, "Boot SPI CRTM size : 1MB" }, 366 { 57, 2, 0, "Host SPI CRTM size : disable CRTM" }, 367 { 57, 2, 1, "Host SPI CRTM size : 256KB" }, 368 { 57, 2, 2, "Host SPI CRTM size : 512KB" }, 369 { 57, 2, 3, "Host SPI CRTM size : 1MB" }, 370 { 59, 1, 0, "Disable host SPI auxiliary control pins" }, 371 { 59, 1, 1, "Enable host SPI auxiliary control pins" }, 372 { 60, 1, 0, "Disable GPIO pass through" }, 373 { 60, 1, 1, "Enable GPIO pass through" }, 374 { 61, 1, 0, "Enable low security secure boot key" }, 375 { 61, 1, 1, "Disable low security secure boot key" }, 376 { 62, 1, 0, "Disable dedicate GPIO strap pins" }, 377 { 62, 1, 1, "Enable dedicate GPIO strap pins" }, 378 { 63, 1, OTP_REG_RESERVED, "" } 379 }; 380 381 static const struct otpconf_info a0_conf_info[] = { 382 { 0, 0, 1, 0, "Enable Secure Region programming" }, 383 { 0, 0, 1, 1, "Disable Secure Region programming" }, 384 { 0, 1, 1, 0, "Disable Secure Boot" }, 385 { 0, 1, 1, 1, "Enable Secure Boot" }, 386 { 0, 2, 1, 0, "Initialization programming not done" }, 387 { 0, 2, 1, 1, "Initialization programming done" }, 388 { 0, 3, 1, 0, "User region ECC disable" }, 389 { 0, 3, 1, 1, "User region ECC enable" }, 390 { 0, 4, 1, 0, "Secure Region ECC disable" }, 391 { 0, 4, 1, 1, "Secure Region ECC enable" }, 392 { 0, 5, 1, 0, "Enable low security key" }, 393 { 0, 5, 1, 1, "Disable low security key" }, 394 { 0, 6, 1, 0, "Do not ignore Secure Boot hardware strap" }, 395 { 0, 6, 1, 1, "Ignore Secure Boot hardware strap" }, 396 { 0, 7, 1, 0, "Secure Boot Mode: 1" }, 397 { 0, 7, 1, 1, "Secure Boot Mode: 2" }, 398 { 0, 8, 2, 0, "Single cell mode (recommended)" }, 399 { 0, 8, 2, 1, "Differential mode" }, 400 { 0, 8, 2, 2, "Differential-redundant mode" }, 401 { 0, 10, 2, 0, "RSA mode : RSA1024" }, 402 { 0, 10, 2, 1, "RSA mode : RSA2048" }, 403 { 0, 10, 2, 2, "RSA mode : RSA3072" }, 404 { 0, 10, 2, 3, "RSA mode : RSA4096" }, 405 { 0, 12, 2, 0, "SHA mode : SHA224" }, 406 { 0, 12, 2, 1, "SHA mode : SHA256" }, 407 { 0, 12, 2, 2, "SHA mode : SHA384" }, 408 { 0, 12, 2, 3, "SHA mode : SHA512" }, 409 { 0, 14, 2, OTP_REG_RESERVED, "" }, 410 { 0, 16, 6, OTP_REG_VALUE, "Secure Region size (DW): 0x%x" }, 411 { 0, 22, 1, 0, "Secure Region : Writable" }, 412 { 0, 22, 1, 1, "Secure Region : Write Protect" }, 413 { 0, 23, 1, 0, "User Region : Writable" }, 414 { 0, 23, 1, 1, "User Region : Write Protect" }, 415 { 0, 24, 1, 0, "Configure Region : Writable" }, 416 { 0, 24, 1, 1, "Configure Region : Write Protect" }, 417 { 0, 25, 1, 0, "OTP strap Region : Writable" }, 418 { 0, 25, 1, 1, "OTP strap Region : Write Protect" }, 419 { 0, 26, 1, 0, "Disable Copy Boot Image to Internal SRAM" }, 420 { 0, 26, 1, 1, "Copy Boot Image to Internal SRAM" }, 421 { 0, 27, 1, 0, "Disable image encryption" }, 422 { 0, 27, 1, 1, "Enable image encryption" }, 423 { 0, 28, 1, OTP_REG_RESERVED, "" }, 424 { 0, 29, 1, 0, "OTP key retire Region : Writable" }, 425 { 0, 29, 1, 1, "OTP key retire Region : Write Protect" }, 426 { 0, 30, 1, 0, "Data region redundancy repair disable" }, 427 { 0, 30, 1, 1, "Data region redundancy repair enable" }, 428 { 0, 31, 1, 0, "OTP memory lock disable" }, 429 { 0, 31, 1, 1, "OTP memory lock enable" }, 430 { 2, 0, 16, OTP_REG_VALUE, "Vender ID : 0x%x" }, 431 { 2, 16, 16, OTP_REG_VALUE, "Key Revision : 0x%x" }, 432 { 3, 0, 16, OTP_REG_VALUE, "Secure boot header offset : 0x%x" }, 433 { 4, 0, 8, OTP_REG_VALID_BIT, "Keys valid : %s" }, 434 { 4, 16, 8, OTP_REG_VALID_BIT, "Keys retire : %s" }, 435 { 5, 0, 32, OTP_REG_VALUE, "User define data, random number low : 0x%x" }, 436 { 6, 0, 32, OTP_REG_VALUE, "User define data, random number high : 0x%x" }, 437 { 7, 0, 1, 0, "Force enable PCI bus to AHB bus bridge" }, 438 { 7, 0, 1, 1, "Force disable PCI bus to AHB bus bridge" }, 439 { 7, 1, 1, 0, "Force enable UART5 debug port function" }, 440 { 7, 1, 1, 1, "Force disable UART5 debug port function" }, 441 { 7, 2, 1, 0, "Force enable XDMA function" }, 442 { 7, 2, 1, 1, "Force disable XDMA function" }, 443 { 7, 3, 1, 0, "Force enable APB to PCIE device bridge" }, 444 { 7, 3, 1, 1, "Force disable APB to PCIE device bridge" }, 445 { 7, 4, 1, 0, "Force enable APB to PCIE bridge config access" }, 446 { 7, 4, 1, 1, "Force disable APB to PCIE bridge config access" }, 447 { 7, 5, 1, 0, "Force enable PCIE bus trace buffer" }, 448 { 7, 5, 1, 1, "Force disable PCIE bus trace buffer" }, 449 { 7, 6, 1, 0, "Force enable the capability for PCIE device port as a Root Complex" }, 450 { 7, 6, 1, 1, "Force disable the capability for PCIE device port as a Root Complex" }, 451 { 7, 16, 1, 0, "Force enable ESPI bus to AHB bus bridge" }, 452 { 7, 16, 1, 1, "Force disable ESPI bus to AHB bus bridge" }, 453 { 7, 17, 1, 0, "Force enable LPC bus to AHB bus bridge1" }, 454 { 7, 17, 1, 1, "Force disable LPC bus to AHB bus bridge1" }, 455 { 7, 18, 1, 0, "Force enable LPC bus to AHB bus bridge2" }, 456 { 7, 18, 1, 1, "Force disable LPC bus to AHB bus bridge2" }, 457 { 7, 19, 1, 0, "Force enable UART1 debug port function" }, 458 { 7, 19, 1, 1, "Force disable UART1 debug port function" }, 459 { 7, 31, 1, 0, "Disable chip security setting" }, 460 { 7, 31, 1, 1, "Enable chip security setting" }, 461 { 8, 0, 32, OTP_REG_VALUE, "Redundancy Repair : 0x%x" }, 462 { 10, 0, 32, OTP_REG_VALUE, "Manifest ID low : 0x%x" }, 463 { 11, 0, 32, OTP_REG_VALUE, "Manifest ID high : 0x%x" } 464 }; 465 466 static const struct otpconf_info a1_conf_info[] = { 467 { 0, 0, 1, OTP_REG_RESERVED, "" }, 468 { 0, 1, 1, 0, "Disable Secure Boot" }, 469 { 0, 1, 1, 1, "Enable Secure Boot" }, 470 { 0, 2, 1, 0, "Initialization programming not done" }, 471 { 0, 2, 1, 1, "Initialization programming done" }, 472 { 0, 3, 1, 0, "User region ECC disable" }, 473 { 0, 3, 1, 1, "User region ECC enable" }, 474 { 0, 4, 1, 0, "Secure Region ECC disable" }, 475 { 0, 4, 1, 1, "Secure Region ECC enable" }, 476 { 0, 5, 1, 0, "Enable low security key" }, 477 { 0, 5, 1, 1, "Disable low security key" }, 478 { 0, 6, 1, 0, "Do not ignore Secure Boot hardware strap" }, 479 { 0, 6, 1, 1, "Ignore Secure Boot hardware strap" }, 480 { 0, 7, 1, 0, "Secure Boot Mode: GCM" }, 481 { 0, 7, 1, 1, "Secure Boot Mode: 2" }, 482 { 0, 8, 2, 0, "Single cell mode (recommended)" }, 483 { 0, 8, 2, 1, "Differential mode" }, 484 { 0, 8, 2, 2, "Differential-redundant mode" }, 485 { 0, 10, 2, 0, "RSA mode : RSA1024" }, 486 { 0, 10, 2, 1, "RSA mode : RSA2048" }, 487 { 0, 10, 2, 2, "RSA mode : RSA3072" }, 488 { 0, 10, 2, 3, "RSA mode : RSA4096" }, 489 { 0, 12, 2, 0, "SHA mode : SHA224" }, 490 { 0, 12, 2, 1, "SHA mode : SHA256" }, 491 { 0, 12, 2, 2, "SHA mode : SHA384" }, 492 { 0, 12, 2, 3, "SHA mode : SHA512" }, 493 { 0, 14, 1, 0, "Disable Patch code" }, 494 { 0, 14, 1, 1, "Enable Patch code" }, 495 { 0, 15, 1, OTP_REG_RESERVED, "" }, 496 { 0, 16, 6, OTP_REG_VALUE, "Secure Region size (DW): 0x%x" }, 497 { 0, 22, 1, 0, "Secure Region : Writable" }, 498 { 0, 22, 1, 1, "Secure Region : Write Protect" }, 499 { 0, 23, 1, 0, "User Region : Writable" }, 500 { 0, 23, 1, 1, "User Region : Write Protect" }, 501 { 0, 24, 1, 0, "Configure Region : Writable" }, 502 { 0, 24, 1, 1, "Configure Region : Write Protect" }, 503 { 0, 25, 1, 0, "OTP strap Region : Writable" }, 504 { 0, 25, 1, 1, "OTP strap Region : Write Protect" }, 505 { 0, 26, 1, 0, "Disable Copy Boot Image to Internal SRAM" }, 506 { 0, 26, 1, 1, "Copy Boot Image to Internal SRAM" }, 507 { 0, 27, 1, 0, "Disable image encryption" }, 508 { 0, 27, 1, 1, "Enable image encryption" }, 509 { 0, 28, 1, OTP_REG_RESERVED, "" }, 510 { 0, 29, 1, 0, "OTP key retire Region : Writable" }, 511 { 0, 29, 1, 1, "OTP key retire Region : Write Protect" }, 512 { 0, 30, 1, 0, "Data region redundancy repair disable" }, 513 { 0, 30, 1, 1, "Data region redundancy repair enable" }, 514 { 0, 31, 1, 0, "OTP memory lock disable" }, 515 { 0, 31, 1, 1, "OTP memory lock enable" }, 516 { 2, 0, 16, OTP_REG_VALUE, "Vender ID : 0x%x" }, 517 { 2, 16, 16, OTP_REG_VALUE, "Key Revision : 0x%x" }, 518 { 3, 0, 16, OTP_REG_VALUE, "Secure boot header offset : 0x%x" }, 519 { 4, 0, 8, OTP_REG_VALID_BIT, "Keys valid : %s" }, 520 { 4, 16, 8, OTP_REG_VALID_BIT, "Keys retire : %s" }, 521 { 5, 0, 32, OTP_REG_VALUE, "User define data, random number low : 0x%x" }, 522 { 6, 0, 32, OTP_REG_VALUE, "User define data, random number high : 0x%x" }, 523 { 7, 0, 1, 0, "Force enable PCI bus to AHB bus bridge" }, 524 { 7, 0, 1, 1, "Force disable PCI bus to AHB bus bridge" }, 525 { 7, 1, 1, 0, "Force enable UART5 debug port function" }, 526 { 7, 1, 1, 1, "Force disable UART5 debug port function" }, 527 { 7, 2, 1, 0, "Force enable XDMA function" }, 528 { 7, 2, 1, 1, "Force disable XDMA function" }, 529 { 7, 3, 1, 0, "Force enable APB to PCIE device bridge" }, 530 { 7, 3, 1, 1, "Force disable APB to PCIE device bridge" }, 531 { 7, 4, 1, 0, "Force enable APB to PCIE bridge config access" }, 532 { 7, 4, 1, 1, "Force disable APB to PCIE bridge config access" }, 533 { 7, 5, 1, 0, "Force enable PCIE bus trace buffer" }, 534 { 7, 5, 1, 1, "Force disable PCIE bus trace buffer" }, 535 { 7, 6, 1, 0, "Force enable the capability for PCIE device port as a Root Complex" }, 536 { 7, 6, 1, 1, "Force disable the capability for PCIE device port as a Root Complex" }, 537 { 7, 16, 1, 0, "Force enable ESPI bus to AHB bus bridge" }, 538 { 7, 16, 1, 1, "Force disable ESPI bus to AHB bus bridge" }, 539 { 7, 17, 1, 0, "Force enable LPC bus to AHB bus bridge1" }, 540 { 7, 17, 1, 1, "Force disable LPC bus to AHB bus bridge1" }, 541 { 7, 18, 1, 0, "Force enable LPC bus to AHB bus bridge2" }, 542 { 7, 18, 1, 1, "Force disable LPC bus to AHB bus bridge2" }, 543 { 7, 19, 1, 0, "Force enable UART1 debug port function" }, 544 { 7, 19, 1, 1, "Force disable UART1 debug port function" }, 545 { 7, 31, 1, 0, "Disable chip security setting" }, 546 { 7, 31, 1, 1, "Enable chip security setting" }, 547 { 8, 0, 32, OTP_REG_VALUE, "Redundancy Repair : 0x%x" }, 548 { 10, 0, 32, OTP_REG_VALUE, "Manifest ID low : 0x%x" }, 549 { 11, 0, 32, OTP_REG_VALUE, "Manifest ID high : 0x%x" }, 550 { 14, 0, 11, OTP_REG_VALUE, "Patch code location (DW): 0x%x" }, 551 { 14, 11, 6, OTP_REG_VALUE, "Patch code size (DW): 0x%x" } 552 }; 553 554 static const struct otpkey_type a0_key_type[] = { 555 {0, OTP_KEY_TYPE_AES, 0, "AES-256 as OEM platform key for image encryption/decryption"}, 556 {1, OTP_KEY_TYPE_VAULT, 0, "AES-256 as secret vault key"}, 557 {4, OTP_KEY_TYPE_HMAC, 1, "HMAC as encrypted OEM HMAC keys in Mode 1"}, 558 {8, OTP_KEY_TYPE_RSA, 1, "RSA-public as OEM DSS public keys in Mode 2"}, 559 {9, OTP_KEY_TYPE_RSA, 0, "RSA-public as SOC public key"}, 560 {10, OTP_KEY_TYPE_RSA, 0, "RSA-public as AES key decryption key"}, 561 {13, OTP_KEY_TYPE_RSA, 0, "RSA-private as SOC private key"}, 562 {14, OTP_KEY_TYPE_RSA, 0, "RSA-private as AES key decryption key"}, 563 }; 564 565 static const struct otpkey_type a1_key_type[] = { 566 {1, OTP_KEY_TYPE_VAULT, 0, "AES-256 as secret vault key"}, 567 {2, OTP_KEY_TYPE_AES, 1, "AES-256 as OEM platform key for image encryption/decryption in Mode 2 or AES-256 as OEM DSS keys for Mode GCM"}, 568 {8, OTP_KEY_TYPE_RSA, 1, "RSA-public as OEM DSS public keys in Mode 2"}, 569 {10, OTP_KEY_TYPE_RSA, 0, "RSA-public as AES key decryption key"}, 570 {14, OTP_KEY_TYPE_RSA, 0, "RSA-private as AES key decryption key"}, 571 }; 572 573 static uint32_t chip_version(void) 574 { 575 uint32_t rev_id; 576 577 rev_id = (readl(0x1e6e2004) >> 16) & 0xff ; 578 579 return rev_id; 580 } 581 582 static void wait_complete(void) 583 { 584 int reg; 585 586 do { 587 reg = readl(OTP_STATUS); 588 } while ((reg & 0x6) != 0x6); 589 } 590 591 static void otp_read_data(uint32_t offset, uint32_t *data) 592 { 593 writel(offset, OTP_ADDR); //Read address 594 writel(0x23b1e361, OTP_COMMAND); //trigger read 595 wait_complete(); 596 data[0] = readl(OTP_COMPARE_1); 597 data[1] = readl(OTP_COMPARE_2); 598 } 599 600 static void otp_read_config(uint32_t offset, uint32_t *data) 601 { 602 int config_offset; 603 604 config_offset = 0x800; 605 config_offset |= (offset / 8) * 0x200; 606 config_offset |= (offset % 8) * 0x2; 607 608 writel(config_offset, OTP_ADDR); //Read address 609 writel(0x23b1e361, OTP_COMMAND); //trigger read 610 wait_complete(); 611 data[0] = readl(OTP_COMPARE_1); 612 } 613 614 static int otp_print_config(uint32_t offset, int dw_count) 615 { 616 int i; 617 uint32_t ret[1]; 618 619 if (offset + dw_count > 32) 620 return OTP_USAGE; 621 for (i = offset; i < offset + dw_count; i ++) { 622 otp_read_config(i, ret); 623 printf("OTPCFG%X: %08X\n", i, ret[0]); 624 } 625 printf("\n"); 626 return OTP_SUCCESS; 627 } 628 629 static int otp_print_data(uint32_t offset, int dw_count) 630 { 631 int i; 632 uint32_t ret[2]; 633 634 if (offset + dw_count > 2048 || offset % 4 != 0) 635 return OTP_USAGE; 636 for (i = offset; i < offset + dw_count; i += 2) { 637 otp_read_data(i, ret); 638 if (i % 4 == 0) 639 printf("%03X: %08X %08X ", i * 4, ret[0], ret[1]); 640 else 641 printf("%08X %08X\n", ret[0], ret[1]); 642 643 } 644 printf("\n"); 645 return OTP_SUCCESS; 646 } 647 648 static int otp_compare(uint32_t otp_addr, uint32_t addr) 649 { 650 uint32_t ret; 651 uint32_t *buf; 652 653 buf = map_physmem(addr, 16, MAP_WRBACK); 654 printf("%08X\n", buf[0]); 655 printf("%08X\n", buf[1]); 656 printf("%08X\n", buf[2]); 657 printf("%08X\n", buf[3]); 658 writel(otp_addr, OTP_ADDR); //Compare address 659 writel(buf[0], OTP_COMPARE_1); //Compare data 1 660 writel(buf[1], OTP_COMPARE_2); //Compare data 2 661 writel(buf[2], OTP_COMPARE_3); //Compare data 3 662 writel(buf[3], OTP_COMPARE_4); //Compare data 4 663 writel(0x23b1e363, OTP_COMMAND); //Compare command 664 wait_complete(); 665 ret = readl(OTP_STATUS); //Compare command 666 if (ret & 0x1) 667 return 0; 668 else 669 return -1; 670 } 671 672 static void otp_write(uint32_t otp_addr, uint32_t data) 673 { 674 writel(otp_addr, OTP_ADDR); //write address 675 writel(data, OTP_COMPARE_1); //write data 676 writel(0x23b1e362, OTP_COMMAND); //write command 677 wait_complete(); 678 } 679 680 static int verify_bit(uint32_t otp_addr, int bit_offset, int value) 681 { 682 uint32_t ret[2]; 683 684 if (otp_addr % 2 == 0) 685 writel(otp_addr, OTP_ADDR); //Read address 686 else 687 writel(otp_addr - 1, OTP_ADDR); //Read address 688 689 writel(0x23b1e361, OTP_COMMAND); //trigger read 690 wait_complete(); 691 ret[0] = readl(OTP_COMPARE_1); 692 ret[1] = readl(OTP_COMPARE_2); 693 694 if (otp_addr % 2 == 0) { 695 if (((ret[0] >> bit_offset) & 1) == value) 696 return 0; 697 else 698 return -1; 699 } else { 700 if (((ret[1] >> bit_offset) & 1) == value) 701 return 0; 702 else 703 return -1; 704 } 705 706 } 707 708 static uint32_t verify_dw(uint32_t otp_addr, uint32_t *value, uint32_t *ignore, uint32_t *compare, int size) 709 { 710 uint32_t ret[2]; 711 712 otp_addr &= ~(1 << 15); 713 714 if (otp_addr % 2 == 0) 715 writel(otp_addr, OTP_ADDR); //Read address 716 else 717 writel(otp_addr - 1, OTP_ADDR); //Read address 718 writel(0x23b1e361, OTP_COMMAND); //trigger read 719 wait_complete(); 720 ret[0] = readl(OTP_COMPARE_1); 721 ret[1] = readl(OTP_COMPARE_2); 722 if (size == 1) { 723 if (otp_addr % 2 == 0) { 724 // printf("check %x : %x = %x\n", otp_addr, ret[0], value[0]); 725 if ((value[0] & ~ignore[0]) == (ret[0] & ~ignore[0])) { 726 compare[0] = 0; 727 return 0; 728 } else { 729 compare[0] = value[0] ^ ret[0]; 730 return -1; 731 } 732 733 } else { 734 // printf("check %x : %x = %x\n", otp_addr, ret[1], value[0]); 735 if ((value[0] & ~ignore[0]) == (ret[1] & ~ignore[0])) { 736 compare[0] = ~0; 737 return 0; 738 } else { 739 compare[0] = ~(value[0] ^ ret[1]); 740 return -1; 741 } 742 } 743 } else if (size == 2) { 744 // otp_addr should be even 745 if ((value[0] & ~ignore[0]) == (ret[0] & ~ignore[0]) && (value[1] & ~ignore[1]) == (ret[1] & ~ignore[1])) { 746 // printf("check[0] %x : %x = %x\n", otp_addr, ret[0], value[0]); 747 // printf("check[1] %x : %x = %x\n", otp_addr, ret[1], value[1]); 748 compare[0] = 0; 749 compare[1] = ~0; 750 return 0; 751 } else { 752 // printf("check[0] %x : %x = %x\n", otp_addr, ret[0], value[0]); 753 // printf("check[1] %x : %x = %x\n", otp_addr, ret[1], value[1]); 754 compare[0] = value[0] ^ ret[0]; 755 compare[1] = ~(value[1] ^ ret[1]); 756 return -1; 757 } 758 } else { 759 return -1; 760 } 761 } 762 763 static void otp_soak(int soak) 764 { 765 switch (soak) { 766 case 0: //default 767 otp_write(0x3000, 0x0); // Write MRA 768 otp_write(0x5000, 0x0); // Write MRB 769 otp_write(0x1000, 0x0); // Write MR 770 break; 771 case 1: //normal program 772 otp_write(0x3000, 0x4021); // Write MRA 773 otp_write(0x5000, 0x302f); // Write MRB 774 otp_write(0x1000, 0x4020); // Write MR 775 writel(0x04190760, OTP_TIMING); 776 break; 777 case 2: //soak program 778 otp_write(0x3000, 0x4021); // Write MRA 779 otp_write(0x5000, 0x1027); // Write MRB 780 otp_write(0x1000, 0x4820); // Write MR 781 writel(0x041930d4, OTP_TIMING); 782 break; 783 } 784 785 wait_complete(); 786 } 787 788 static void otp_prog(uint32_t otp_addr, uint32_t prog_bit) 789 { 790 writel(otp_addr, OTP_ADDR); //write address 791 writel(prog_bit, OTP_COMPARE_1); //write data 792 writel(0x23b1e364, OTP_COMMAND); //write command 793 wait_complete(); 794 } 795 796 static void _otp_prog_bit(uint32_t value, uint32_t prog_address, uint32_t bit_offset) 797 { 798 int prog_bit; 799 800 if (prog_address % 2 == 0) { 801 if (value) 802 prog_bit = ~(0x1 << bit_offset); 803 else 804 return; 805 } else { 806 prog_address |= 1 << 15; 807 if (!value) 808 prog_bit = 0x1 << bit_offset; 809 else 810 return; 811 } 812 otp_prog(prog_address, prog_bit); 813 } 814 815 static int otp_prog_bit(uint32_t value, uint32_t prog_address, uint32_t bit_offset) 816 { 817 int pass; 818 int i; 819 820 otp_soak(1); 821 _otp_prog_bit(value, prog_address, bit_offset); 822 pass = 0; 823 824 for (i = 0; i < RETRY; i++) { 825 if (verify_bit(prog_address, bit_offset, value) != 0) { 826 otp_soak(2); 827 _otp_prog_bit(value, prog_address, bit_offset); 828 if (verify_bit(prog_address, bit_offset, value) != 0) { 829 otp_soak(1); 830 } else { 831 pass = 1; 832 break; 833 } 834 } else { 835 pass = 1; 836 break; 837 } 838 } 839 840 return pass; 841 } 842 843 static void otp_prog_dw(uint32_t value, uint32_t ignore, uint32_t prog_address) 844 { 845 int j, bit_value, prog_bit; 846 847 for (j = 0; j < 32; j++) { 848 if ((ignore >> j) & 0x1) 849 continue; 850 bit_value = (value >> j) & 0x1; 851 if (prog_address % 2 == 0) { 852 if (bit_value) 853 prog_bit = ~(0x1 << j); 854 else 855 continue; 856 } else { 857 prog_address |= 1 << 15; 858 if (bit_value) 859 continue; 860 else 861 prog_bit = 0x1 << j; 862 } 863 otp_prog(prog_address, prog_bit); 864 } 865 } 866 867 static int otp_prog_verify_2dw(uint32_t *data, uint32_t *buf, uint32_t *ignore_mask, uint32_t prog_address) 868 { 869 int pass; 870 int i; 871 uint32_t data0_masked; 872 uint32_t data1_masked; 873 uint32_t buf0_masked; 874 uint32_t buf1_masked; 875 uint32_t compare[2]; 876 877 data0_masked = data[0] & ~ignore_mask[0]; 878 buf0_masked = buf[0] & ~ignore_mask[0]; 879 data1_masked = data[1] & ~ignore_mask[1]; 880 buf1_masked = buf[1] & ~ignore_mask[1]; 881 if ((data0_masked == buf0_masked) && (data1_masked == buf1_masked)) 882 return 0; 883 884 otp_soak(1); 885 if (data0_masked != buf0_masked) 886 otp_prog_dw(buf[0], ignore_mask[0], prog_address); 887 if (data1_masked != buf1_masked) 888 otp_prog_dw(buf[1], ignore_mask[1], prog_address + 1); 889 890 pass = 0; 891 for (i = 0; i < RETRY; i++) { 892 if (verify_dw(prog_address, buf, ignore_mask, compare, 2) != 0) { 893 otp_soak(2); 894 if (compare[0] != 0) { 895 otp_prog_dw(compare[0], ignore_mask[0], prog_address); 896 } 897 if (compare[1] != ~0) { 898 otp_prog_dw(compare[1], ignore_mask[0], prog_address + 1); 899 } 900 if (verify_dw(prog_address, buf, ignore_mask, compare, 2) != 0) { 901 otp_soak(1); 902 } else { 903 pass = 1; 904 break; 905 } 906 } else { 907 pass = 1; 908 break; 909 } 910 } 911 912 if (!pass) { 913 otp_soak(0); 914 return OTP_FAILURE; 915 } 916 return OTP_SUCCESS; 917 } 918 919 static void otp_strap_status(struct otpstrap_status *otpstrap) 920 { 921 uint32_t OTPSTRAP_RAW[2]; 922 int strap_end; 923 int i, j; 924 925 if (info_cb.version == OTP_AST2600A0) { 926 for (j = 0; j < 64; j++) { 927 otpstrap[j].value = 0; 928 otpstrap[j].remain_times = 7; 929 otpstrap[j].writeable_option = -1; 930 otpstrap[j].protected = 0; 931 } 932 strap_end = 30; 933 } else { 934 for (j = 0; j < 64; j++) { 935 otpstrap[j].value = 0; 936 otpstrap[j].remain_times = 6; 937 otpstrap[j].writeable_option = -1; 938 otpstrap[j].reg_protected = 0; 939 otpstrap[j].protected = 0; 940 } 941 strap_end = 28; 942 } 943 944 for (i = 16; i < strap_end; i += 2) { 945 int option = (i - 16) / 2; 946 otp_read_config(i, &OTPSTRAP_RAW[0]); 947 otp_read_config(i + 1, &OTPSTRAP_RAW[1]); 948 for (j = 0; j < 32; j++) { 949 char bit_value = ((OTPSTRAP_RAW[0] >> j) & 0x1); 950 if ((bit_value == 0) && (otpstrap[j].writeable_option == -1)) { 951 otpstrap[j].writeable_option = option; 952 } 953 if (bit_value == 1) 954 otpstrap[j].remain_times --; 955 otpstrap[j].value ^= bit_value; 956 otpstrap[j].option_array[option] = bit_value; 957 } 958 for (j = 32; j < 64; j++) { 959 char bit_value = ((OTPSTRAP_RAW[1] >> (j - 32)) & 0x1); 960 if ((bit_value == 0) && (otpstrap[j].writeable_option == -1)) { 961 otpstrap[j].writeable_option = option; 962 } 963 if (bit_value == 1) 964 otpstrap[j].remain_times --; 965 otpstrap[j].value ^= bit_value; 966 otpstrap[j].option_array[option] = bit_value; 967 } 968 } 969 970 if (info_cb.version != OTP_AST2600A0) { 971 otp_read_config(28, &OTPSTRAP_RAW[0]); 972 otp_read_config(29, &OTPSTRAP_RAW[1]); 973 for (j = 0; j < 32; j++) { 974 if (((OTPSTRAP_RAW[0] >> j) & 0x1) == 1) 975 otpstrap[j].reg_protected = 1; 976 } 977 for (j = 32; j < 64; j++) { 978 if (((OTPSTRAP_RAW[1] >> (j - 32)) & 0x1) == 1) 979 otpstrap[j].reg_protected = 1; 980 } 981 982 } 983 984 otp_read_config(30, &OTPSTRAP_RAW[0]); 985 otp_read_config(31, &OTPSTRAP_RAW[1]); 986 for (j = 0; j < 32; j++) { 987 if (((OTPSTRAP_RAW[0] >> j) & 0x1) == 1) 988 otpstrap[j].protected = 1; 989 } 990 for (j = 32; j < 64; j++) { 991 if (((OTPSTRAP_RAW[1] >> (j - 32)) & 0x1) == 1) 992 otpstrap[j].protected = 1; 993 } 994 } 995 996 static int otp_print_conf_image(struct otp_image_layout *image_layout) 997 { 998 const struct otpconf_info *conf_info = info_cb.conf_info; 999 uint32_t *OTPCFG = (uint32_t *)image_layout->conf; 1000 uint32_t *OTPCFG_IGNORE = (uint32_t *)image_layout->conf_ignore; 1001 uint32_t mask; 1002 uint32_t dw_offset; 1003 uint32_t bit_offset; 1004 uint32_t otp_value; 1005 uint32_t otp_ignore; 1006 int fail = 0; 1007 char valid_bit[20]; 1008 int i; 1009 int j; 1010 1011 printf("DW BIT Value Description\n"); 1012 printf("__________________________________________________________________________\n"); 1013 for (i = 0; i < info_cb.conf_info_len; i++) { 1014 dw_offset = conf_info[i].dw_offset; 1015 bit_offset = conf_info[i].bit_offset; 1016 mask = BIT(conf_info[i].length) - 1; 1017 otp_value = (OTPCFG[dw_offset] >> bit_offset) & mask; 1018 otp_ignore = (OTPCFG_IGNORE[dw_offset] >> bit_offset) & mask; 1019 1020 if (otp_ignore == mask) { 1021 continue; 1022 } else if (otp_ignore != 0) { 1023 fail = 1; 1024 } 1025 1026 if ((otp_value != conf_info[i].value) && 1027 conf_info[i].value != OTP_REG_RESERVED && 1028 conf_info[i].value != OTP_REG_VALUE && 1029 conf_info[i].value != OTP_REG_VALID_BIT) 1030 continue; 1031 printf("0x%-4X", dw_offset); 1032 1033 if (conf_info[i].length == 1) { 1034 printf("0x%-9X", conf_info[i].bit_offset); 1035 } else { 1036 printf("0x%-2X:0x%-4X", 1037 conf_info[i].bit_offset + conf_info[i].length - 1, 1038 conf_info[i].bit_offset); 1039 } 1040 printf("0x%-10x", otp_value); 1041 1042 if (fail) { 1043 printf("Ignore mask error\n"); 1044 } else { 1045 if (conf_info[i].value == OTP_REG_RESERVED) { 1046 printf("Reserved\n"); 1047 } else if (conf_info[i].value == OTP_REG_VALUE) { 1048 printf(conf_info[i].information, otp_value); 1049 printf("\n"); 1050 } else if (conf_info[i].value == OTP_REG_VALID_BIT) { 1051 if (otp_value != 0) { 1052 for (j = 0; j < 7; j++) { 1053 if (otp_value == (1 << j)) { 1054 valid_bit[j * 2] = '1'; 1055 } else { 1056 valid_bit[j * 2] = '0'; 1057 } 1058 valid_bit[j * 2 + 1] = ' '; 1059 } 1060 valid_bit[15] = 0; 1061 } else { 1062 strcpy(valid_bit, "0 0 0 0 0 0 0 0\0"); 1063 } 1064 printf(conf_info[i].information, valid_bit); 1065 printf("\n"); 1066 } else { 1067 printf("%s\n", conf_info[i].information); 1068 } 1069 } 1070 } 1071 1072 if (fail) 1073 return OTP_FAILURE; 1074 1075 return OTP_SUCCESS; 1076 } 1077 1078 static int otp_print_conf_info(int input_offset) 1079 { 1080 const struct otpconf_info *conf_info = info_cb.conf_info; 1081 uint32_t OTPCFG[16]; 1082 uint32_t mask; 1083 uint32_t dw_offset; 1084 uint32_t bit_offset; 1085 uint32_t otp_value; 1086 char valid_bit[20]; 1087 int i; 1088 int j; 1089 1090 for (i = 0; i < 16; i++) 1091 otp_read_config(i, &OTPCFG[i]); 1092 1093 1094 printf("DW BIT Value Description\n"); 1095 printf("__________________________________________________________________________\n"); 1096 for (i = 0; i < info_cb.conf_info_len; i++) { 1097 if (input_offset != -1 && input_offset != conf_info[i].dw_offset) 1098 continue; 1099 dw_offset = conf_info[i].dw_offset; 1100 bit_offset = conf_info[i].bit_offset; 1101 mask = BIT(conf_info[i].length) - 1; 1102 otp_value = (OTPCFG[dw_offset] >> bit_offset) & mask; 1103 1104 if ((otp_value != conf_info[i].value) && 1105 conf_info[i].value != OTP_REG_RESERVED && 1106 conf_info[i].value != OTP_REG_VALUE && 1107 conf_info[i].value != OTP_REG_VALID_BIT) 1108 continue; 1109 printf("0x%-4X", dw_offset); 1110 1111 if (conf_info[i].length == 1) { 1112 printf("0x%-9X", conf_info[i].bit_offset); 1113 } else { 1114 printf("0x%-2X:0x%-4X", 1115 conf_info[i].bit_offset + conf_info[i].length - 1, 1116 conf_info[i].bit_offset); 1117 } 1118 printf("0x%-10x", otp_value); 1119 1120 if (conf_info[i].value == OTP_REG_RESERVED) { 1121 printf("Reserved\n"); 1122 } else if (conf_info[i].value == OTP_REG_VALUE) { 1123 printf(conf_info[i].information, otp_value); 1124 printf("\n"); 1125 } else if (conf_info[i].value == OTP_REG_VALID_BIT) { 1126 if (otp_value != 0) { 1127 for (j = 0; j < 7; j++) { 1128 if (otp_value == (1 << j)) { 1129 valid_bit[j * 2] = '1'; 1130 } else { 1131 valid_bit[j * 2] = '0'; 1132 } 1133 valid_bit[j * 2 + 1] = ' '; 1134 } 1135 valid_bit[15] = 0; 1136 } else { 1137 strcpy(valid_bit, "0 0 0 0 0 0 0 0\0"); 1138 } 1139 printf(conf_info[i].information, valid_bit); 1140 printf("\n"); 1141 } else { 1142 printf("%s\n", conf_info[i].information); 1143 } 1144 } 1145 return OTP_SUCCESS; 1146 } 1147 1148 static int otp_print_strap_image(struct otp_image_layout *image_layout) 1149 { 1150 const struct otpstrap_info *strap_info = info_cb.strap_info; 1151 uint32_t *OTPSTRAP; 1152 uint32_t *OTPSTRAP_REG_PRO; 1153 uint32_t *OTPSTRAP_PRO; 1154 uint32_t *OTPSTRAP_IGNORE; 1155 int i; 1156 int fail = 0; 1157 uint32_t bit_offset; 1158 uint32_t dw_offset; 1159 uint32_t mask; 1160 uint32_t otp_value; 1161 uint32_t otp_reg_protect; 1162 uint32_t otp_protect; 1163 uint32_t otp_ignore; 1164 1165 OTPSTRAP = (uint32_t *)image_layout->strap; 1166 OTPSTRAP_PRO = (uint32_t *)image_layout->strap_pro; 1167 OTPSTRAP_IGNORE = (uint32_t *)image_layout->strap_ignore; 1168 if (info_cb.version == OTP_AST2600A0) { 1169 OTPSTRAP_REG_PRO = NULL; 1170 printf("BIT(hex) Value Protect Description\n"); 1171 } else { 1172 OTPSTRAP_REG_PRO = (uint32_t *)image_layout->strap_reg_pro; 1173 printf("BIT(hex) Value Reg_Protect Protect Description\n"); 1174 } 1175 printf("__________________________________________________________________________________________\n"); 1176 1177 for (i = 0; i < info_cb.strap_info_len; i++) { 1178 if (strap_info[i].bit_offset > 31) { 1179 dw_offset = 1; 1180 bit_offset = strap_info[i].bit_offset - 32; 1181 } else { 1182 dw_offset = 0; 1183 bit_offset = strap_info[i].bit_offset; 1184 } 1185 1186 mask = BIT(strap_info[i].length) - 1; 1187 otp_value = (OTPSTRAP[dw_offset] >> bit_offset) & mask; 1188 otp_protect = (OTPSTRAP_PRO[dw_offset] >> bit_offset) & mask; 1189 otp_ignore = (OTPSTRAP_IGNORE[dw_offset] >> bit_offset) & mask; 1190 1191 if (info_cb.version != OTP_AST2600A0) 1192 otp_reg_protect = (OTPSTRAP_REG_PRO[dw_offset] >> bit_offset) & mask; 1193 else 1194 otp_reg_protect = 0; 1195 1196 if (otp_ignore == mask) { 1197 continue; 1198 } else if (otp_ignore != 0) { 1199 fail = 1; 1200 } 1201 1202 if ((otp_value != strap_info[i].value) && 1203 strap_info[i].value != OTP_REG_RESERVED) 1204 continue; 1205 1206 if (strap_info[i].length == 1) { 1207 printf("0x%-9X", strap_info[i].bit_offset); 1208 } else { 1209 printf("0x%-2X:0x%-4X", 1210 strap_info[i].bit_offset + strap_info[i].length - 1, 1211 strap_info[i].bit_offset); 1212 } 1213 printf("0x%-10x", otp_value); 1214 if (info_cb.version != OTP_AST2600A0) 1215 printf("0x%-10x", otp_reg_protect); 1216 printf("0x%-10x", otp_protect); 1217 1218 if (fail) { 1219 printf("Ignore mask error\n"); 1220 } else { 1221 if (strap_info[i].value != OTP_REG_RESERVED) 1222 printf("%s\n", strap_info[i].information); 1223 else 1224 printf("Reserved\n"); 1225 } 1226 } 1227 1228 if (fail) 1229 return OTP_FAILURE; 1230 1231 return OTP_SUCCESS; 1232 } 1233 1234 static int otp_print_strap_info(int view) 1235 { 1236 const struct otpstrap_info *strap_info = info_cb.strap_info; 1237 struct otpstrap_status strap_status[64]; 1238 int i, j; 1239 int fail = 0; 1240 uint32_t bit_offset; 1241 uint32_t length; 1242 uint32_t otp_value; 1243 uint32_t otp_protect; 1244 1245 otp_strap_status(strap_status); 1246 1247 if (view) { 1248 if (info_cb.version == OTP_AST2600A0) 1249 printf("BIT(hex) Value Remains Protect Description\n"); 1250 else 1251 printf("BIT(hex) Value Remains Reg_Protect Protect Description\n"); 1252 printf("___________________________________________________________________________________________________\n"); 1253 } else { 1254 printf("BIT(hex) Value Description\n"); 1255 printf("________________________________________________________________________________\n"); 1256 } 1257 for (i = 0; i < info_cb.strap_info_len; i++) { 1258 otp_value = 0; 1259 bit_offset = strap_info[i].bit_offset; 1260 length = strap_info[i].length; 1261 for (j = 0; j < length; j++) { 1262 otp_value |= strap_status[bit_offset + j].value << j; 1263 otp_protect |= strap_status[bit_offset + j].protected << j; 1264 } 1265 if ((otp_value != strap_info[i].value) && 1266 strap_info[i].value != OTP_REG_RESERVED) 1267 continue; 1268 if (view) { 1269 for (j = 0; j < length; j++) { 1270 printf("0x%-7X", strap_info[i].bit_offset + j); 1271 printf("0x%-5X", strap_status[bit_offset + j].value); 1272 printf("%-9d", strap_status[bit_offset + j].remain_times); 1273 if (info_cb.version != OTP_AST2600A0) 1274 printf("0x%-10X", strap_status[bit_offset + j].reg_protected); 1275 printf("0x%-7X", strap_status[bit_offset + j].protected); 1276 if (strap_info[i].value == OTP_REG_RESERVED) { 1277 printf(" Reserved\n"); 1278 continue; 1279 } 1280 if (length == 1) { 1281 printf(" %s\n", strap_info[i].information); 1282 continue; 1283 } 1284 1285 if (j == 0) 1286 printf("/%s\n", strap_info[i].information); 1287 else if (j == length - 1) 1288 printf("\\ \"\n"); 1289 else 1290 printf("| \"\n"); 1291 } 1292 } else { 1293 if (length == 1) { 1294 printf("0x%-9X", strap_info[i].bit_offset); 1295 } else { 1296 printf("0x%-2X:0x%-4X", 1297 bit_offset + length - 1, bit_offset); 1298 } 1299 1300 printf("0x%-10X", otp_value); 1301 1302 if (strap_info[i].value != OTP_REG_RESERVED) 1303 printf("%s\n", strap_info[i].information); 1304 else 1305 printf("Reserved\n"); 1306 } 1307 } 1308 1309 if (fail) 1310 return OTP_FAILURE; 1311 1312 return OTP_SUCCESS; 1313 } 1314 1315 static void buf_print(uint8_t *buf, int len) 1316 { 1317 int i; 1318 printf(" 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F\n"); 1319 for (i = 0; i < len; i++) { 1320 if (i % 16 == 0) { 1321 printf("%04X: ", i); 1322 } 1323 printf("%02X ", buf[i]); 1324 if ((i + 1) % 16 == 0) { 1325 printf("\n"); 1326 } 1327 } 1328 } 1329 1330 static int otp_print_data_info(struct otp_image_layout *image_layout) 1331 { 1332 int key_id, key_offset, last, key_type, key_length, exp_length; 1333 const struct otpkey_type *key_info_array = info_cb.key_info; 1334 struct otpkey_type key_info; 1335 uint32_t *buf; 1336 uint8_t *byte_buf; 1337 char empty = 1; 1338 int i = 0, len = 0; 1339 int j; 1340 1341 byte_buf = image_layout->data; 1342 buf = (uint32_t *)byte_buf; 1343 1344 for (i = 0; i < 16; i++) { 1345 if (buf[i] != 0) { 1346 empty = 0; 1347 } 1348 } 1349 if (empty) 1350 return 0; 1351 1352 i = 0; 1353 while (1) { 1354 key_id = buf[i] & 0x7; 1355 key_offset = buf[i] & 0x1ff8; 1356 last = (buf[i] >> 13) & 1; 1357 key_type = (buf[i] >> 14) & 0xf; 1358 key_length = (buf[i] >> 18) & 0x3; 1359 exp_length = (buf[i] >> 20) & 0xfff; 1360 1361 for (j = 0; j < info_cb.key_info_len; j++) { 1362 if (key_type == key_info_array[j].value) { 1363 key_info = key_info_array[j]; 1364 break; 1365 } 1366 } 1367 1368 printf("\nKey[%d]:\n", i); 1369 printf("Key Type: "); 1370 printf("%s\n", key_info.information); 1371 1372 if (key_info.key_type == OTP_KEY_TYPE_HMAC) { 1373 printf("HMAC SHA Type: "); 1374 switch (key_length) { 1375 case 0: 1376 printf("HMAC(SHA224)\n"); 1377 break; 1378 case 1: 1379 printf("HMAC(SHA256)\n"); 1380 break; 1381 case 2: 1382 printf("HMAC(SHA384)\n"); 1383 break; 1384 case 3: 1385 printf("HMAC(SHA512)\n"); 1386 break; 1387 } 1388 } else if (key_info.key_type == OTP_KEY_TYPE_RSA) { 1389 printf("RSA SHA Type: "); 1390 switch (key_length) { 1391 case 0: 1392 printf("RSA1024\n"); 1393 len = 0x100; 1394 break; 1395 case 1: 1396 printf("RSA2048\n"); 1397 len = 0x200; 1398 break; 1399 case 2: 1400 printf("RSA3072\n"); 1401 len = 0x300; 1402 break; 1403 case 3: 1404 printf("RSA4096\n"); 1405 len = 0x400; 1406 break; 1407 } 1408 printf("RSA exponent bit length: %d\n", exp_length); 1409 } 1410 if (key_info.need_id) 1411 printf("Key Number ID: %d\n", key_id); 1412 printf("Key Value:\n"); 1413 if (key_info.key_type == OTP_KEY_TYPE_HMAC) { 1414 buf_print(&byte_buf[key_offset], 0x40); 1415 } else if (key_info.key_type == OTP_KEY_TYPE_AES) { 1416 printf("AES Key:\n"); 1417 buf_print(&byte_buf[key_offset], 0x20); 1418 if (info_cb.version == 0) { 1419 printf("AES IV:\n"); 1420 buf_print(&byte_buf[key_offset + 0x20], 0x10); 1421 } 1422 1423 } else if (key_info.key_type == OTP_KEY_TYPE_VAULT) { 1424 if (info_cb.version == 0) { 1425 printf("AES Key:\n"); 1426 buf_print(&byte_buf[key_offset], 0x20); 1427 printf("AES IV:\n"); 1428 buf_print(&byte_buf[key_offset + 0x20], 0x10); 1429 } else if (info_cb.version == 1) { 1430 printf("AES Key 1:\n"); 1431 buf_print(&byte_buf[key_offset], 0x20); 1432 printf("AES Key 2:\n"); 1433 buf_print(&byte_buf[key_offset + 0x20], 0x20); 1434 } 1435 1436 } else if (key_info.key_type == OTP_KEY_TYPE_RSA) { 1437 printf("RSA mod:\n"); 1438 buf_print(&byte_buf[key_offset], len / 2); 1439 printf("RSA exp:\n"); 1440 buf_print(&byte_buf[key_offset + (len / 2)], len / 2); 1441 } 1442 if (last) 1443 break; 1444 i++; 1445 } 1446 return 0; 1447 } 1448 1449 static int otp_prog_conf(struct otp_image_layout *image_layout) 1450 { 1451 int i, k; 1452 int pass = 0; 1453 uint32_t prog_address; 1454 uint32_t data[16]; 1455 uint32_t compare[2]; 1456 uint32_t *conf = (uint32_t *)image_layout->conf; 1457 uint32_t *conf_ignore = (uint32_t *)image_layout->conf_ignore; 1458 uint32_t data_masked; 1459 uint32_t buf_masked; 1460 1461 printf("Read OTP Config Region:\n"); 1462 1463 for (i = 0; i < 16 ; i ++) { 1464 prog_address = 0x800; 1465 prog_address |= (i / 8) * 0x200; 1466 prog_address |= (i % 8) * 0x2; 1467 otp_read_data(prog_address, &data[i]); 1468 } 1469 1470 printf("Check writable...\n"); 1471 for (i = 0; i < 16; i++) { 1472 data_masked = data[i] & ~conf_ignore[i]; 1473 buf_masked = conf[i] & ~conf_ignore[i]; 1474 if (data_masked == buf_masked) 1475 continue; 1476 if ((data_masked | buf_masked) == buf_masked) { 1477 continue; 1478 } else { 1479 printf("Input image can't program into OTP, please check.\n"); 1480 printf("OTPCFG[%X] = %x\n", i, data[i]); 1481 printf("Input [%X] = %x\n", i, conf[i]); 1482 printf("Mask [%X] = %x\n", i, ~conf_ignore[i]); 1483 return OTP_FAILURE; 1484 } 1485 } 1486 1487 printf("Start Programing...\n"); 1488 otp_soak(0); 1489 for (i = 0; i < 16; i++) { 1490 data_masked = data[i] & ~conf_ignore[i]; 1491 buf_masked = conf[i] & ~conf_ignore[i]; 1492 prog_address = 0x800; 1493 prog_address |= (i / 8) * 0x200; 1494 prog_address |= (i % 8) * 0x2; 1495 if (data_masked == buf_masked) { 1496 pass = 1; 1497 continue; 1498 } 1499 1500 1501 otp_soak(1); 1502 otp_prog_dw(conf[i], conf_ignore[i], prog_address); 1503 1504 pass = 0; 1505 for (k = 0; k < RETRY; k++) { 1506 if (verify_dw(prog_address, &conf[i], &conf_ignore[i], compare, 1) != 0) { 1507 otp_soak(2); 1508 otp_prog_dw(compare[0], prog_address, 1); 1509 if (verify_dw(prog_address, &conf[i], &conf_ignore[i], compare, 1) != 0) { 1510 otp_soak(1); 1511 } else { 1512 pass = 1; 1513 break; 1514 } 1515 } else { 1516 pass = 1; 1517 break; 1518 } 1519 } 1520 if (pass == 0) { 1521 printf("address: %08x, data: %08x, buffer: %08x, mask: %08x\n", 1522 i, data[i], conf[i], conf_ignore[i]); 1523 break; 1524 } 1525 } 1526 1527 otp_soak(0); 1528 if (!pass) 1529 return OTP_FAILURE; 1530 1531 return OTP_SUCCESS; 1532 1533 } 1534 1535 static int otp_strap_bit_confirm(struct otpstrap_status *otpstrap, int offset, int ibit, int bit, int pbit, int rpbit) 1536 { 1537 if (ibit == 1) { 1538 return OTP_SUCCESS; 1539 } else { 1540 printf("OTPSTRAP[%X]:\n", offset); 1541 } 1542 if (bit == otpstrap->value) { 1543 printf(" The value is same as before, skip it.\n"); 1544 return OTP_PROG_SKIP; 1545 } 1546 if (otpstrap->protected == 1) { 1547 printf(" This bit is protected and is not writable\n"); 1548 return OTP_FAILURE; 1549 } 1550 if (otpstrap->remain_times == 0) { 1551 printf(" This bit is no remaining times to write.\n"); 1552 return OTP_FAILURE; 1553 } 1554 if (pbit == 1) { 1555 printf(" This bit will be protected and become non-writable.\n"); 1556 } 1557 if (rpbit == 1 && info_cb.version != OTP_AST2600A0) { 1558 printf(" The relative register will be protected.\n"); 1559 } 1560 printf(" Write 1 to OTPSTRAP[%X] OPTION[%X], that value becomes from %d to %d.\n", offset, otpstrap->writeable_option + 1, otpstrap->value, otpstrap->value ^ 1); 1561 return OTP_SUCCESS; 1562 } 1563 1564 static int otp_strap_image_confirm(struct otp_image_layout *image_layout) 1565 { 1566 int i; 1567 uint32_t *strap; 1568 uint32_t *strap_ignore; 1569 uint32_t *strap_reg_protect; 1570 uint32_t *strap_pro; 1571 int bit, pbit, ibit, rpbit; 1572 int fail = 0; 1573 int skip = -1; 1574 int ret; 1575 struct otpstrap_status otpstrap[64]; 1576 1577 strap = (uint32_t *)image_layout->strap; 1578 strap_pro = (uint32_t *)image_layout->strap_pro; 1579 strap_ignore = (uint32_t *)image_layout->strap_ignore; 1580 strap_reg_protect = (uint32_t *)image_layout->strap_reg_pro; 1581 1582 otp_strap_status(otpstrap); 1583 for (i = 0; i < 64; i++) { 1584 if (i < 32) { 1585 bit = (strap[0] >> i) & 0x1; 1586 ibit = (strap_ignore[0] >> i) & 0x1; 1587 pbit = (strap_pro[0] >> i) & 0x1; 1588 } else { 1589 bit = (strap[1] >> (i - 32)) & 0x1; 1590 ibit = (strap_ignore[1] >> (i - 32)) & 0x1; 1591 pbit = (strap_pro[1] >> (i - 32)) & 0x1; 1592 } 1593 1594 if (info_cb.version != OTP_AST2600A0) { 1595 if (i < 32) { 1596 rpbit = (strap_reg_protect[0] >> i) & 0x1; 1597 } else { 1598 rpbit = (strap_reg_protect[1] >> (i - 32)) & 0x1; 1599 } 1600 } else { 1601 rpbit = 0; 1602 } 1603 ret = otp_strap_bit_confirm(&otpstrap[i], i, ibit, bit, pbit, rpbit); 1604 if (ret == OTP_PROG_SKIP) { 1605 if (skip == -1) 1606 skip = 1; 1607 continue; 1608 } else { 1609 skip = 1; 1610 } 1611 1612 if (ret == OTP_FAILURE) 1613 fail = 1; 1614 } 1615 if (fail == 1) 1616 return OTP_FAILURE; 1617 else if (skip == 1) 1618 return OTP_PROG_SKIP; 1619 1620 return OTP_SUCCESS; 1621 } 1622 1623 static int otp_print_strap(int start, int count) 1624 { 1625 int i, j; 1626 int remains; 1627 struct otpstrap_status otpstrap[64]; 1628 1629 if (start < 0 || start > 64) 1630 return OTP_USAGE; 1631 1632 if ((start + count) < 0 || (start + count) > 64) 1633 return OTP_USAGE; 1634 1635 otp_strap_status(otpstrap); 1636 1637 if (info_cb.version == OTP_AST2600A0) { 1638 remains = 7; 1639 printf("BIT(hex) Value Option Status\n"); 1640 } else { 1641 remains = 6; 1642 printf("BIT(hex) Value Option Reg_Protect Status\n"); 1643 } 1644 printf("______________________________________________________________________________\n"); 1645 1646 for (i = start; i < start + count; i++) { 1647 printf("0x%-8X", i); 1648 printf("%-7d", otpstrap[i].value); 1649 for (j = 0; j < remains; j++) 1650 printf("%d ", otpstrap[i].option_array[j]); 1651 printf(" "); 1652 if (info_cb.version != OTP_AST2600A0) { 1653 printf("%d ", otpstrap[i].reg_protected); 1654 } 1655 if (otpstrap[i].protected == 1) { 1656 printf("protected and not writable"); 1657 } else { 1658 printf("not protected "); 1659 if (otpstrap[i].remain_times == 0) { 1660 printf("and no remaining times to write."); 1661 } else { 1662 printf("and still can write %d times", otpstrap[i].remain_times); 1663 } 1664 } 1665 printf("\n"); 1666 } 1667 1668 return OTP_SUCCESS; 1669 } 1670 1671 static int otp_prog_strap_bit(int bit_offset, int value) 1672 { 1673 struct otpstrap_status otpstrap[64]; 1674 uint32_t prog_address; 1675 int offset; 1676 int ret; 1677 1678 1679 otp_strap_status(otpstrap); 1680 1681 ret = otp_strap_bit_confirm(&otpstrap[bit_offset], bit_offset, 0, value, 0, 0); 1682 1683 if (ret != OTP_SUCCESS) { 1684 return ret; 1685 } 1686 1687 prog_address = 0x800; 1688 if (bit_offset < 32) { 1689 offset = bit_offset; 1690 prog_address |= ((otpstrap[bit_offset].writeable_option * 2 + 16) / 8) * 0x200; 1691 prog_address |= ((otpstrap[bit_offset].writeable_option * 2 + 16) % 8) * 0x2; 1692 1693 } else { 1694 offset = (bit_offset - 32); 1695 prog_address |= ((otpstrap[bit_offset].writeable_option * 2 + 17) / 8) * 0x200; 1696 prog_address |= ((otpstrap[bit_offset].writeable_option * 2 + 17) % 8) * 0x2; 1697 } 1698 1699 1700 return otp_prog_bit(1, prog_address, offset); 1701 } 1702 1703 static int otp_prog_strap(struct otp_image_layout *image_layout) 1704 { 1705 uint32_t *strap; 1706 uint32_t *strap_ignore; 1707 uint32_t *strap_pro; 1708 uint32_t *strap_reg_protect; 1709 uint32_t prog_address; 1710 int i; 1711 int bit, pbit, ibit, offset, rpbit; 1712 int fail = 0; 1713 int ret; 1714 struct otpstrap_status otpstrap[64]; 1715 1716 strap = (uint32_t *)image_layout->strap; 1717 strap_pro = (uint32_t *)image_layout->strap_pro; 1718 strap_ignore = (uint32_t *)image_layout->strap_ignore; 1719 strap_reg_protect = (uint32_t *)image_layout->strap_reg_pro; 1720 1721 printf("Read OTP Strap Region:\n"); 1722 otp_strap_status(otpstrap); 1723 1724 printf("Check writable...\n"); 1725 if (otp_strap_image_confirm(image_layout) == OTP_FAILURE) { 1726 printf("Input image can't program into OTP, please check.\n"); 1727 return OTP_FAILURE; 1728 } 1729 1730 for (i = 0; i < 64; i++) { 1731 prog_address = 0x800; 1732 if (i < 32) { 1733 offset = i; 1734 bit = (strap[0] >> offset) & 0x1; 1735 ibit = (strap_ignore[0] >> offset) & 0x1; 1736 pbit = (strap_pro[0] >> offset) & 0x1; 1737 prog_address |= ((otpstrap[i].writeable_option * 2 + 16) / 8) * 0x200; 1738 prog_address |= ((otpstrap[i].writeable_option * 2 + 16) % 8) * 0x2; 1739 1740 } else { 1741 offset = (i - 32); 1742 bit = (strap[1] >> offset) & 0x1; 1743 ibit = (strap_ignore[1] >> offset) & 0x1; 1744 pbit = (strap_pro[1] >> offset) & 0x1; 1745 prog_address |= ((otpstrap[i].writeable_option * 2 + 17) / 8) * 0x200; 1746 prog_address |= ((otpstrap[i].writeable_option * 2 + 17) % 8) * 0x2; 1747 } 1748 if (info_cb.version != OTP_AST2600A0) { 1749 if (i < 32) { 1750 rpbit = (strap_reg_protect[0] >> i) & 0x1; 1751 } else { 1752 rpbit = (strap_reg_protect[1] >> (i - 32)) & 0x1; 1753 } 1754 } else { 1755 rpbit = 0; 1756 } 1757 1758 if (ibit == 1) { 1759 continue; 1760 } 1761 if (bit == otpstrap[i].value) { 1762 continue; 1763 } 1764 if (otpstrap[i].protected == 1) { 1765 fail = 1; 1766 continue; 1767 } 1768 if (otpstrap[i].remain_times == 0) { 1769 fail = 1; 1770 continue; 1771 } 1772 1773 ret = otp_prog_bit(1, prog_address, offset); 1774 if (!ret) 1775 return OTP_FAILURE; 1776 1777 if (rpbit == 1 && info_cb.version != OTP_AST2600A0) { 1778 prog_address = 0x800; 1779 if (i < 32) 1780 prog_address |= 0x608; 1781 else 1782 prog_address |= 0x60a; 1783 1784 ret = otp_prog_bit(1, prog_address, offset); 1785 if (!ret) 1786 return OTP_FAILURE; 1787 } 1788 1789 if (pbit != 0) { 1790 prog_address = 0x800; 1791 if (i < 32) 1792 prog_address |= 0x60c; 1793 else 1794 prog_address |= 0x60e; 1795 1796 ret = otp_prog_bit(1, prog_address, offset); 1797 if (!ret) 1798 return OTP_FAILURE; 1799 } 1800 1801 } 1802 otp_soak(0); 1803 if (fail == 1) 1804 return OTP_FAILURE; 1805 else 1806 return OTP_SUCCESS; 1807 1808 } 1809 1810 static int otp_prog_data(struct otp_image_layout *image_layout) 1811 { 1812 int i; 1813 int ret; 1814 int data_dw; 1815 uint32_t data[2048]; 1816 uint32_t *buf; 1817 uint32_t *buf_ignore; 1818 1819 uint32_t data_masked; 1820 uint32_t buf_masked; 1821 1822 buf = (uint32_t *)image_layout->data; 1823 buf_ignore = (uint32_t *)image_layout->data_ignore; 1824 1825 data_dw = image_layout->data_length / 4; 1826 1827 printf("Read OTP Data:\n"); 1828 1829 for (i = 0; i < data_dw - 2 ; i += 2) { 1830 otp_read_data(i, &data[i]); 1831 } 1832 1833 printf("Check writable...\n"); 1834 // ignore last two dw, the last two dw is used for slt otp write check. 1835 for (i = 0; i < data_dw - 2; i++) { 1836 data_masked = data[i] & ~buf_ignore[i]; 1837 buf_masked = buf[i] & ~buf_ignore[i]; 1838 if (data_masked == buf_masked) 1839 continue; 1840 if (i % 2 == 0) { 1841 if ((data_masked | buf_masked) == buf_masked) { 1842 continue; 1843 } else { 1844 printf("Input image can't program into OTP, please check.\n"); 1845 printf("OTP_ADDR[%x] = %x\n", i, data[i]); 1846 printf("Input [%x] = %x\n", i, buf[i]); 1847 printf("Mask [%x] = %x\n", i, ~buf_ignore[i]); 1848 return OTP_FAILURE; 1849 } 1850 } else { 1851 if ((data_masked & buf_masked) == buf_masked) { 1852 continue; 1853 } else { 1854 printf("Input image can't program into OTP, please check.\n"); 1855 printf("OTP_ADDR[%x] = %x\n", i, data[i]); 1856 printf("Input [%x] = %x\n", i, buf[i]); 1857 printf("Mask [%x] = %x\n", i, ~buf_ignore[i]); 1858 return OTP_FAILURE; 1859 } 1860 } 1861 } 1862 1863 printf("Start Programing...\n"); 1864 1865 // programing ecc region first 1866 for (i = 1792; i < 2046; i += 2) { 1867 ret = otp_prog_verify_2dw(&data[i], &buf[i], &buf_ignore[i], i); 1868 if (ret != OTP_SUCCESS) { 1869 printf("address: %08x, data: %08x %08x, buffer: %08x %08x, mask: %08x %08x\n", 1870 i, data[i], data[i + 1], buf[i], buf[i + 1], buf_ignore[i], buf_ignore[i + 1]); 1871 return ret; 1872 } 1873 } 1874 1875 for (i = 0; i < 1792; i += 2) { 1876 ret = otp_prog_verify_2dw(&data[i], &buf[i], &buf_ignore[i], i); 1877 if (ret != OTP_SUCCESS) { 1878 printf("address: %08x, data: %08x %08x, buffer: %08x %08x, mask: %08x %08x\n", 1879 i, data[i], data[i + 1], buf[i], buf[i + 1], buf_ignore[i], buf_ignore[i + 1]); 1880 return ret; 1881 } 1882 } 1883 otp_soak(0); 1884 return OTP_SUCCESS; 1885 1886 } 1887 1888 static int otp_image_verify(uint8_t *src_buf, uint32_t length, uint8_t *digest_buf) 1889 { 1890 sha256_context ctx; 1891 u8 digest_ret[CHECKSUM_LEN]; 1892 1893 sha256_starts(&ctx); 1894 sha256_update(&ctx, src_buf, length); 1895 sha256_finish(&ctx, digest_ret); 1896 1897 if (!memcmp(digest_buf, digest_ret, CHECKSUM_LEN)) 1898 return 0; 1899 else 1900 return -1; 1901 1902 } 1903 1904 static int do_otp_prog(int addr, int nconfirm) 1905 { 1906 int ret; 1907 int image_version = 0; 1908 struct otp_header *otp_header; 1909 struct otp_image_layout image_layout; 1910 int image_size; 1911 uint8_t *buf; 1912 uint8_t *checksum; 1913 1914 otp_header = map_physmem(addr, sizeof(struct otp_header), MAP_WRBACK); 1915 if (!otp_header) { 1916 puts("Failed to map physical memory\n"); 1917 return OTP_FAILURE; 1918 } 1919 1920 image_size = OTP_IMAGE_SIZE(otp_header->image_info); 1921 unmap_physmem(otp_header, MAP_WRBACK); 1922 1923 buf = map_physmem(addr, image_size + CHECKSUM_LEN, MAP_WRBACK); 1924 1925 if (!buf) { 1926 puts("Failed to map physical memory\n"); 1927 return OTP_FAILURE; 1928 } 1929 otp_header = (struct otp_header *) buf; 1930 checksum = buf + otp_header->checksum_offset; 1931 1932 if (strcmp(OTP_MAGIC, (char *)otp_header->otp_magic) != 0) { 1933 puts("Image is invalid\n"); 1934 return OTP_FAILURE; 1935 } 1936 1937 1938 image_layout.data_length = (int)(OTP_REGION_SIZE(otp_header->data_info) / 2); 1939 image_layout.data = buf + OTP_REGION_OFFSET(otp_header->data_info); 1940 image_layout.data_ignore = image_layout.data + image_layout.data_length; 1941 1942 image_layout.conf_length = (int)(OTP_REGION_SIZE(otp_header->config_info) / 2); 1943 image_layout.conf = buf + OTP_REGION_OFFSET(otp_header->config_info); 1944 image_layout.conf_ignore = image_layout.conf + image_layout.conf_length; 1945 1946 image_layout.strap = buf + OTP_REGION_OFFSET(otp_header->strap_info); 1947 1948 if (!strcmp("A0", (char *)otp_header->otp_version)) { 1949 image_version = OTP_AST2600A0; 1950 image_layout.strap_length = (int)(OTP_REGION_SIZE(otp_header->strap_info) / 3); 1951 image_layout.strap_pro = image_layout.strap + image_layout.strap_length; 1952 image_layout.strap_ignore = image_layout.strap + 2 * image_layout.strap_length; 1953 } else if (!strcmp("A1", (char *)otp_header->otp_version)) { 1954 image_version = OTP_AST2600A1; 1955 image_layout.strap_length = (int)(OTP_REGION_SIZE(otp_header->strap_info) / 4); 1956 image_layout.strap_reg_pro = image_layout.strap + image_layout.strap_length; 1957 image_layout.strap_pro = image_layout.strap + 2 * image_layout.strap_length; 1958 image_layout.strap_ignore = image_layout.strap + 3 * image_layout.strap_length; 1959 } else { 1960 puts("Version is not supported\n"); 1961 return OTP_FAILURE; 1962 } 1963 1964 if (image_version != info_cb.version) { 1965 puts("Version is not match\n"); 1966 return OTP_FAILURE; 1967 } 1968 1969 if (otp_image_verify(buf, image_size, checksum)) { 1970 puts("checksum is invalid\n"); 1971 return OTP_FAILURE; 1972 } 1973 1974 if (!nconfirm) { 1975 if (otp_header->image_info & OTP_INC_DATA) { 1976 printf("\nOTP data region :\n"); 1977 if (otp_print_data_info(&image_layout) < 0) { 1978 printf("OTP data error, please check.\n"); 1979 return OTP_FAILURE; 1980 } 1981 } 1982 if (otp_header->image_info & OTP_INC_STRAP) { 1983 printf("\nOTP strap region :\n"); 1984 if (otp_print_strap_image(&image_layout) < 0) { 1985 printf("OTP strap error, please check.\n"); 1986 return OTP_FAILURE; 1987 } 1988 } 1989 if (otp_header->image_info & OTP_INC_CONFIG) { 1990 printf("\nOTP configuration region :\n"); 1991 if (otp_print_conf_image(&image_layout) < 0) { 1992 printf("OTP config error, please check.\n"); 1993 return OTP_FAILURE; 1994 } 1995 } 1996 1997 printf("type \"YES\" (no quotes) to continue:\n"); 1998 if (!confirm_yesno()) { 1999 printf(" Aborting\n"); 2000 return OTP_FAILURE; 2001 } 2002 } 2003 2004 if (otp_header->image_info & OTP_INC_DATA) { 2005 printf("programing data region ...\n"); 2006 ret = otp_prog_data(&image_layout); 2007 if (ret != 0) { 2008 printf("Error\n"); 2009 return ret; 2010 } else { 2011 printf("Done\n"); 2012 } 2013 } 2014 if (otp_header->image_info & OTP_INC_STRAP) { 2015 printf("programing strap region ...\n"); 2016 ret = otp_prog_strap(&image_layout); 2017 if (ret != 0) { 2018 printf("Error\n"); 2019 return ret; 2020 } else { 2021 printf("Done\n"); 2022 } 2023 } 2024 if (otp_header->image_info & OTP_INC_CONFIG) { 2025 printf("programing configuration region ...\n"); 2026 ret = otp_prog_conf(&image_layout); 2027 if (ret != 0) { 2028 printf("Error\n"); 2029 return ret; 2030 } 2031 printf("Done\n"); 2032 } 2033 2034 return OTP_SUCCESS; 2035 } 2036 2037 static int do_otp_prog_bit(int mode, int otp_dw_offset, int bit_offset, int value, int nconfirm) 2038 { 2039 uint32_t read[2]; 2040 uint32_t prog_address = 0; 2041 struct otpstrap_status otpstrap[64]; 2042 int otp_bit; 2043 int ret = 0; 2044 2045 switch (mode) { 2046 case OTP_REGION_CONF: 2047 otp_read_config(otp_dw_offset, read); 2048 prog_address = 0x800; 2049 prog_address |= (otp_dw_offset / 8) * 0x200; 2050 prog_address |= (otp_dw_offset % 8) * 0x2; 2051 otp_bit = (read[0] >> bit_offset) & 0x1; 2052 if (otp_bit == value) { 2053 printf("OTPCFG%X[%X] = %d\n", otp_dw_offset, bit_offset, value); 2054 printf("No need to program\n"); 2055 return OTP_SUCCESS; 2056 } 2057 if (otp_bit == 1 && value == 0) { 2058 printf("OTPCFG%X[%X] = 1\n", otp_dw_offset, bit_offset); 2059 printf("OTP is programed, which can't be clean\n"); 2060 return OTP_FAILURE; 2061 } 2062 printf("Program OTPCFG%X[%X] to 1\n", otp_dw_offset, bit_offset); 2063 break; 2064 case OTP_REGION_DATA: 2065 prog_address = otp_dw_offset; 2066 2067 if (otp_dw_offset % 2 == 0) { 2068 otp_read_data(otp_dw_offset, read); 2069 otp_bit = (read[0] >> bit_offset) & 0x1; 2070 2071 if (otp_bit == 1 && value == 0) { 2072 printf("OTPDATA%X[%X] = 1\n", otp_dw_offset, bit_offset); 2073 printf("OTP is programed, which can't be cleaned\n"); 2074 return OTP_FAILURE; 2075 } 2076 } else { 2077 otp_read_data(otp_dw_offset - 1, read); 2078 otp_bit = (read[1] >> bit_offset) & 0x1; 2079 2080 if (otp_bit == 0 && value == 1) { 2081 printf("OTPDATA%X[%X] = 1\n", otp_dw_offset, bit_offset); 2082 printf("OTP is programed, which can't be writen\n"); 2083 return OTP_FAILURE; 2084 } 2085 } 2086 if (otp_bit == value) { 2087 printf("OTPDATA%X[%X] = %d\n", otp_dw_offset, bit_offset, value); 2088 printf("No need to program\n"); 2089 return OTP_SUCCESS; 2090 } 2091 2092 printf("Program OTPDATA%X[%X] to 1\n", otp_dw_offset, bit_offset); 2093 break; 2094 case OTP_REGION_STRAP: 2095 otp_strap_status(otpstrap); 2096 otp_print_strap(bit_offset, 1); 2097 ret = otp_strap_bit_confirm(&otpstrap[bit_offset], bit_offset, 0, value, 0, 0); 2098 if (ret == OTP_FAILURE) 2099 return OTP_FAILURE; 2100 else if (ret == OTP_PROG_SKIP) 2101 return OTP_SUCCESS; 2102 2103 break; 2104 } 2105 2106 if (!nconfirm) { 2107 printf("type \"YES\" (no quotes) to continue:\n"); 2108 if (!confirm_yesno()) { 2109 printf(" Aborting\n"); 2110 return OTP_FAILURE; 2111 } 2112 } 2113 2114 switch (mode) { 2115 case OTP_REGION_STRAP: 2116 ret = otp_prog_strap_bit(bit_offset, value); 2117 break; 2118 case OTP_REGION_CONF: 2119 case OTP_REGION_DATA: 2120 ret = otp_prog_bit(value, prog_address, bit_offset); 2121 break; 2122 } 2123 otp_soak(0); 2124 if (ret) { 2125 printf("SUCCESS\n"); 2126 return OTP_SUCCESS; 2127 } else { 2128 printf("OTP cannot be programed\n"); 2129 printf("FAILED\n"); 2130 return OTP_FAILURE; 2131 } 2132 2133 return OTP_USAGE; 2134 } 2135 2136 static int do_otpread(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) 2137 { 2138 uint32_t offset, count; 2139 int ret; 2140 2141 if (argc == 4) { 2142 offset = simple_strtoul(argv[2], NULL, 16); 2143 count = simple_strtoul(argv[3], NULL, 16); 2144 } else if (argc == 3) { 2145 offset = simple_strtoul(argv[2], NULL, 16); 2146 count = 1; 2147 } else { 2148 return CMD_RET_USAGE; 2149 } 2150 2151 2152 if (!strcmp(argv[1], "conf")) { 2153 writel(OTP_PASSWD, OTP_PROTECT_KEY); //password 2154 ret = otp_print_config(offset, count); 2155 } else if (!strcmp(argv[1], "data")) { 2156 writel(OTP_PASSWD, OTP_PROTECT_KEY); //password 2157 ret = otp_print_data(offset, count); 2158 } else if (!strcmp(argv[1], "strap")) { 2159 writel(OTP_PASSWD, OTP_PROTECT_KEY); //password 2160 ret = otp_print_strap(offset, count); 2161 } else { 2162 return CMD_RET_USAGE; 2163 } 2164 2165 if (ret == OTP_SUCCESS) 2166 return CMD_RET_SUCCESS; 2167 else 2168 return CMD_RET_USAGE; 2169 2170 } 2171 2172 static int do_otpprog(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) 2173 { 2174 phys_addr_t addr; 2175 int ret; 2176 2177 if (argc == 3) { 2178 if (strcmp(argv[1], "o")) 2179 return CMD_RET_USAGE; 2180 addr = simple_strtoul(argv[2], NULL, 16); 2181 writel(OTP_PASSWD, OTP_PROTECT_KEY); //password 2182 ret = do_otp_prog(addr, 1); 2183 } else if (argc == 2) { 2184 addr = simple_strtoul(argv[1], NULL, 16); 2185 writel(OTP_PASSWD, OTP_PROTECT_KEY); //password 2186 ret = do_otp_prog(addr, 0); 2187 } else { 2188 return CMD_RET_USAGE; 2189 } 2190 2191 if (ret == OTP_SUCCESS) 2192 return CMD_RET_SUCCESS; 2193 else if (ret == OTP_FAILURE) 2194 return CMD_RET_FAILURE; 2195 else 2196 return CMD_RET_USAGE; 2197 } 2198 2199 static int do_otppb(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) 2200 { 2201 int mode = 0; 2202 int nconfirm = 0; 2203 int otp_addr = 0; 2204 int bit_offset; 2205 int value; 2206 int ret; 2207 2208 if (argc != 4 && argc != 5 && argc != 6) 2209 return CMD_RET_USAGE; 2210 2211 /* Drop the pb cmd */ 2212 argc--; 2213 argv++; 2214 2215 if (!strcmp(argv[0], "conf")) 2216 mode = OTP_REGION_CONF; 2217 else if (!strcmp(argv[0], "strap")) 2218 mode = OTP_REGION_STRAP; 2219 else if (!strcmp(argv[0], "data")) 2220 mode = OTP_REGION_DATA; 2221 else 2222 return CMD_RET_USAGE; 2223 2224 /* Drop the region cmd */ 2225 argc--; 2226 argv++; 2227 2228 if (!strcmp(argv[0], "o")) { 2229 nconfirm = 1; 2230 /* Drop the force option */ 2231 argc--; 2232 argv++; 2233 } 2234 2235 if (mode == OTP_REGION_STRAP) { 2236 bit_offset = simple_strtoul(argv[0], NULL, 16); 2237 value = simple_strtoul(argv[1], NULL, 16); 2238 if (bit_offset >= 64 || (value != 0 && value != 1)) 2239 return CMD_RET_USAGE; 2240 } else { 2241 otp_addr = simple_strtoul(argv[0], NULL, 16); 2242 bit_offset = simple_strtoul(argv[1], NULL, 16); 2243 value = simple_strtoul(argv[2], NULL, 16); 2244 if (bit_offset >= 32 || (value != 0 && value != 1)) 2245 return CMD_RET_USAGE; 2246 if (mode == OTP_REGION_DATA) { 2247 if (otp_addr >= 0x800) 2248 return CMD_RET_USAGE; 2249 } else { 2250 if (otp_addr >= 0x20) 2251 return CMD_RET_USAGE; 2252 } 2253 } 2254 if (value != 0 && value != 1) 2255 return CMD_RET_USAGE; 2256 2257 writel(OTP_PASSWD, OTP_PROTECT_KEY); //password 2258 ret = do_otp_prog_bit(mode, otp_addr, bit_offset, value, nconfirm); 2259 2260 if (ret == OTP_SUCCESS) 2261 return CMD_RET_SUCCESS; 2262 else if (ret == OTP_FAILURE) 2263 return CMD_RET_FAILURE; 2264 else 2265 return CMD_RET_USAGE; 2266 } 2267 2268 static int do_otpcmp(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) 2269 { 2270 phys_addr_t addr; 2271 int otp_addr = 0; 2272 2273 if (argc != 3) 2274 return CMD_RET_USAGE; 2275 2276 writel(OTP_PASSWD, OTP_PROTECT_KEY); //password 2277 addr = simple_strtoul(argv[1], NULL, 16); 2278 otp_addr = simple_strtoul(argv[2], NULL, 16); 2279 if (otp_compare(otp_addr, addr) == 0) { 2280 printf("Compare pass\n"); 2281 return CMD_RET_SUCCESS; 2282 } else { 2283 printf("Compare fail\n"); 2284 return CMD_RET_FAILURE; 2285 } 2286 } 2287 2288 static int do_otpinfo(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) 2289 { 2290 int view = 0; 2291 int input; 2292 2293 if (argc != 2 && argc != 3) 2294 return CMD_RET_USAGE; 2295 2296 if (!strcmp(argv[1], "conf")) { 2297 2298 writel(OTP_PASSWD, OTP_PROTECT_KEY); //password 2299 if (argc == 3) { 2300 input = simple_strtoul(argv[2], NULL, 16); 2301 otp_print_conf_info(input); 2302 } else { 2303 otp_print_conf_info(-1); 2304 } 2305 } else if (!strcmp(argv[1], "strap")) { 2306 if (!strcmp(argv[2], "v")) { 2307 view = 1; 2308 /* Drop the view option */ 2309 argc--; 2310 argv++; 2311 } 2312 writel(OTP_PASSWD, OTP_PROTECT_KEY); //password 2313 otp_print_strap_info(view); 2314 } else { 2315 return CMD_RET_USAGE; 2316 } 2317 2318 return CMD_RET_SUCCESS; 2319 } 2320 2321 static int do_otpprotect(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) 2322 { 2323 int input; 2324 int bit_offset; 2325 int prog_address; 2326 int ret; 2327 if (argc != 3 && argc != 2) 2328 return CMD_RET_USAGE; 2329 2330 if (!strcmp(argv[0], "o")) { 2331 input = simple_strtoul(argv[2], NULL, 16); 2332 } else { 2333 input = simple_strtoul(argv[1], NULL, 16); 2334 printf("OTPSTRAP[%d] will be protected\n", input); 2335 printf("type \"YES\" (no quotes) to continue:\n"); 2336 if (!confirm_yesno()) { 2337 printf(" Aborting\n"); 2338 return CMD_RET_FAILURE; 2339 } 2340 } 2341 2342 prog_address = 0x800; 2343 if (input < 32) { 2344 bit_offset = input; 2345 prog_address |= 0x60c; 2346 } else if (input < 64) { 2347 bit_offset = input - 32; 2348 prog_address |= 0x60e; 2349 } else { 2350 return CMD_RET_USAGE; 2351 } 2352 2353 if (verify_bit(prog_address, bit_offset, 1) == 0) { 2354 printf("OTPSTRAP[%d] already protected\n", input); 2355 } 2356 2357 ret = otp_prog_bit(1, prog_address, bit_offset); 2358 otp_soak(0); 2359 2360 if (ret) { 2361 printf("OTPSTRAP[%d] is protected\n", input); 2362 return CMD_RET_SUCCESS; 2363 } 2364 2365 printf("Protect OTPSTRAP[%d] fail\n", input); 2366 return CMD_RET_FAILURE; 2367 2368 } 2369 2370 static cmd_tbl_t cmd_otp[] = { 2371 U_BOOT_CMD_MKENT(read, 4, 0, do_otpread, "", ""), 2372 U_BOOT_CMD_MKENT(info, 3, 0, do_otpinfo, "", ""), 2373 U_BOOT_CMD_MKENT(prog, 3, 0, do_otpprog, "", ""), 2374 U_BOOT_CMD_MKENT(pb, 6, 0, do_otppb, "", ""), 2375 U_BOOT_CMD_MKENT(protect, 3, 0, do_otpprotect, "", ""), 2376 U_BOOT_CMD_MKENT(cmp, 3, 0, do_otpcmp, "", ""), 2377 }; 2378 2379 static int do_ast_otp(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) 2380 { 2381 cmd_tbl_t *cp; 2382 2383 cp = find_cmd_tbl(argv[1], cmd_otp, ARRAY_SIZE(cmd_otp)); 2384 2385 /* Drop the otp command */ 2386 argc--; 2387 argv++; 2388 2389 if (cp == NULL || argc > cp->maxargs) 2390 return CMD_RET_USAGE; 2391 if (flag == CMD_FLAG_REPEAT && !cmd_is_repeatable(cp)) 2392 return CMD_RET_SUCCESS; 2393 2394 if (chip_version() == OTP_AST2600A0) { 2395 info_cb.version = OTP_AST2600A0; 2396 info_cb.conf_info = a0_conf_info; 2397 info_cb.conf_info_len = ARRAY_SIZE(a0_conf_info); 2398 info_cb.strap_info = a0_strap_info; 2399 info_cb.strap_info_len = ARRAY_SIZE(a0_strap_info); 2400 info_cb.key_info = a0_key_type; 2401 info_cb.key_info_len = ARRAY_SIZE(a0_key_type); 2402 } else if (chip_version() == OTP_AST2600A1) { 2403 info_cb.version = OTP_AST2600A1; 2404 info_cb.conf_info = a1_conf_info; 2405 info_cb.conf_info_len = ARRAY_SIZE(a1_conf_info); 2406 info_cb.strap_info = a1_strap_info; 2407 info_cb.strap_info_len = ARRAY_SIZE(a1_strap_info); 2408 info_cb.key_info = a1_key_type; 2409 info_cb.key_info_len = ARRAY_SIZE(a1_key_type); 2410 } 2411 2412 return cp->cmd(cmdtp, flag, argc, argv); 2413 } 2414 2415 U_BOOT_CMD( 2416 otp, 7, 0, do_ast_otp, 2417 "ASPEED One-Time-Programmable sub-system", 2418 "read conf|data <otp_dw_offset> <dw_count>\n" 2419 "otp read strap <strap_bit_offset> <bit_count>\n" 2420 "otp info strap [v]\n" 2421 "otp info conf [otp_dw_offset]\n" 2422 "otp prog [o] <addr>\n" 2423 "otp pb conf|data [o] <otp_dw_offset> <bit_offset> <value>\n" 2424 "otp pb strap [o] <bit_offset> <value>\n" 2425 "otp protect [o] <bit_offset>\n" 2426 "otp cmp <addr> <otp_dw_offset>\n" 2427 ); 2428