1 /* 2 * This program is distributed in the hope that it will be useful, 3 * but WITHOUT ANY WARRANTY; without even the implied warranty of 4 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 5 * GNU General Public License for more details. 6 * 7 * You should have received a copy of the GNU General Public License 8 * along with this program; if not, write to the Free Software 9 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 10 */ 11 #include <stdlib.h> 12 #include <common.h> 13 #include <console.h> 14 #include <bootretry.h> 15 #include <cli.h> 16 #include <command.h> 17 #include <console.h> 18 #include <malloc.h> 19 #include <inttypes.h> 20 #include <mapmem.h> 21 #include <asm/io.h> 22 #include <linux/compiler.h> 23 24 DECLARE_GLOBAL_DATA_PTR; 25 26 #define OTP_PASSWD 0x349fe38a 27 #define RETRY 3 28 #define OTP_REGION_STRAP BIT(0) 29 #define OTP_REGION_CONF BIT(1) 30 #define OTP_REGION_DATA BIT(2) 31 32 #define OTP_USAGE -1 33 #define OTP_FAILURE -2 34 #define OTP_SUCCESS 0 35 36 #define OTP_PROG_SKIP 1 37 38 #define OTP_KEY_TYPE_RSA 1 39 #define OTP_KEY_TYPE_AES 2 40 #define OTP_KEY_TYPE_VAULT 3 41 #define OTP_KEY_TYPE_HMAC 4 42 43 44 #define OTP_REG_RESERVED -1 45 #define OTP_REG_VALUE -2 46 #define OTP_REG_VALID_BIT -3 47 48 #define PBSTR "||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||" 49 #define PBWIDTH 60 50 51 #define OTP_BASE 0x1e6f2000 52 #define OTP_PROTECT_KEY OTP_BASE 53 #define OTP_COMMAND OTP_BASE + 0x4 54 #define OTP_TIMING OTP_BASE + 0x8 55 #define OTP_ADDR OTP_BASE + 0x10 56 #define OTP_STATUS OTP_BASE + 0x14 57 #define OTP_COMPARE_1 OTP_BASE + 0x20 58 #define OTP_COMPARE_2 OTP_BASE + 0x24 59 #define OTP_COMPARE_3 OTP_BASE + 0x28 60 #define OTP_COMPARE_4 OTP_BASE + 0x2c 61 62 struct otpstrap_status { 63 int value; 64 int option_array[7]; 65 int remain_times; 66 int writeable_option; 67 int protected; 68 }; 69 70 struct otpconf_parse { 71 int dw_offset; 72 int bit; 73 int length; 74 int value; 75 int keep; 76 char status[80]; 77 }; 78 79 struct otpstrap_info { 80 int8_t bit_offset; 81 int8_t length; 82 int8_t value; 83 char *information; 84 }; 85 86 struct otpconf_info { 87 int8_t dw_offset; 88 int8_t bit_offset; 89 int8_t length; 90 int8_t value; 91 char *information; 92 }; 93 94 struct otpkey_type { 95 int value; 96 int key_type; 97 int need_id; 98 char information[110]; 99 }; 100 101 struct otp_info_cb { 102 int version; 103 const struct otpstrap_info *strap_info; 104 int strap_info_len; 105 const struct otpconf_info *conf_info; 106 int conf_info_len; 107 const struct otpkey_type *key_info; 108 int key_info_len; 109 }; 110 111 static struct otp_info_cb info_cb; 112 113 static const struct otpstrap_info a0_strap_info[] = { 114 { 0, 1, 0, "Disable secure boot" }, 115 { 0, 1, 1, "Enable secure boot" }, 116 { 1, 1, 0, "Disable boot from eMMC" }, 117 { 1, 1, 1, "Enable boot from eMMC" }, 118 { 2, 1, 0, "Disable Boot from debug SPI" }, 119 { 2, 1, 1, "Enable Boot from debug SPI" }, 120 { 3, 1, 0, "Enable ARM CM3" }, 121 { 3, 1, 1, "Disable ARM CM3" }, 122 { 4, 1, 0, "No VGA BIOS ROM, VGA BIOS is merged in the system BIOS" }, 123 { 4, 1, 1, "Enable dedicated VGA BIOS ROM" }, 124 { 5, 1, 0, "MAC 1 : RMII/NCSI" }, 125 { 5, 1, 1, "MAC 1 : RGMII" }, 126 { 6, 1, 0, "MAC 2 : RMII/NCSI" }, 127 { 6, 1, 1, "MAC 2 : RGMII" }, 128 { 7, 3, 0, "CPU Frequency : 1GHz" }, 129 { 7, 3, 1, "CPU Frequency : 800MHz" }, 130 { 7, 3, 2, "CPU Frequency : 1.2GHz" }, 131 { 7, 3, 3, "CPU Frequency : 1.4GHz" }, 132 { 10, 2, 0, "HCLK ratio AXI:AHB = 2:1" }, 133 { 10, 2, 1, "HCLK ratio AXI:AHB = 2:1" }, 134 { 10, 2, 2, "HCLK ratio AXI:AHB = 3:1" }, 135 { 10, 2, 3, "HCLK ratio AXI:AHB = 4:1" }, 136 { 12, 2, 0, "VGA memory size : 8MB" }, 137 { 12, 2, 1, "VGA memory size : 16MB" }, 138 { 12, 2, 2, "VGA memory size : 32MB" }, 139 { 12, 2, 3, "VGA memory size : 64MB" }, 140 { 14, 3, OTP_REG_RESERVED, "" }, 141 { 17, 1, 0, "VGA class code : Class Code for video device" }, 142 { 17, 1, 1, "VGA class code : Class Code for VGA device" }, 143 { 18, 1, 0, "Enable debug interfaces 0" }, 144 { 18, 1, 1, "Disable debug interfaces 0" }, 145 { 19, 1, 0, "Boot from emmc mode : High eMMC speed" }, 146 { 19, 1, 1, "Boot from emmc mode : Normal eMMC speed" }, 147 { 20, 1, 0, "Enable Pcie EHCI device" }, 148 { 20, 1, 1, "Disable Pcie EHCI device" }, 149 { 21, 1, 0, "Enable VGA XDMA function" }, 150 { 21, 1, 1, "Disable VGA XDMA function" }, 151 { 22, 1, 0, "Normal BMC mode" }, 152 { 22, 1, 1, "Disable dedicated BMC functions for non-BMC application" }, 153 { 23, 1, 0, "SSPRST# pin is for secondary processor dedicated reset pin" }, 154 { 23, 1, 1, "SSPRST# pin is for PCIE root complex dedicated reset pin" }, 155 { 24, 1, 0, "DRAM types : DDR4" }, 156 { 24, 1, 1, "DRAM types : DDR3" }, 157 { 25, 5, OTP_REG_RESERVED, "" }, 158 { 30, 2, OTP_REG_RESERVED, "" }, 159 { 32, 1, 0, "MAC 3 : RMII/NCSI" }, 160 { 32, 1, 1, "MAC 3 : RGMII" }, 161 { 33, 1, 0, "MAC 4 : RMII/NCSI" }, 162 { 33, 1, 1, "MAC 4 : RGMII" }, 163 { 34, 1, 0, "SuperIO configuration address : 0x2E" }, 164 { 34, 1, 1, "SuperIO configuration address : 0x4E" }, 165 { 35, 1, 0, "Enable LPC to decode SuperIO" }, 166 { 35, 1, 1, "Disable LPC to decode SuperIO" }, 167 { 36, 1, 0, "Enable debug interfaces 1" }, 168 { 36, 1, 1, "Disable debug interfaces 1" }, 169 { 37, 1, 0, "Disable ACPI function" }, 170 { 37, 1, 1, "Enable ACPI function" }, 171 { 38, 1, 0, "Enable eSPI mode" }, 172 { 38, 1, 1, "Enable LPC mode" }, 173 { 39, 1, 0, "Enable SAFS mode" }, 174 { 39, 1, 1, "Enable SAFS mode" }, 175 { 40, 2, OTP_REG_RESERVED, "" }, 176 { 42, 1, 0, "Disable boot SPI 3B/4B address mode auto detection" }, 177 { 42, 1, 1, "Enable boot SPI 3B/4B address mode auto detection" }, 178 { 43, 1, 0, "Disable boot SPI ABR" }, 179 { 43, 1, 1, "Enable boot SPI ABR" }, 180 { 44, 1, 0, "Boot SPI ABR mode : dual SPI flash" }, 181 { 44, 1, 1, "Boot SPI ABR mode : single SPI flash" }, 182 { 45, 3, 0, "Boot SPI flash size : no define size" }, 183 { 45, 3, 1, "Boot SPI flash size : 2MB" }, 184 { 45, 3, 2, "Boot SPI flash size : 4MB" }, 185 { 45, 3, 3, "Boot SPI flash size : 8MB" }, 186 { 45, 3, 4, "Boot SPI flash size : 16MB" }, 187 { 45, 3, 5, "Boot SPI flash size : 32MB" }, 188 { 45, 3, 6, "Boot SPI flash size : 64MB" }, 189 { 45, 3, 7, "Boot SPI flash size : 128MB" }, 190 { 48, 1, 0, "Disable host SPI ABR" }, 191 { 48, 1, 1, "Enable host SPI ABR" }, 192 { 49, 1, 0, "Disable host SPI ABR mode select pin" }, 193 { 49, 1, 1, "Enable host SPI ABR mode select pin" }, 194 { 50, 1, 0, "Host SPI ABR mode : dual SPI flash" }, 195 { 50, 1, 1, "Host SPI ABR mode : single SPI flash" }, 196 { 51, 3, 0, "Host SPI flash size : no define size" }, 197 { 51, 3, 1, "Host SPI flash size : 2MB" }, 198 { 51, 3, 2, "Host SPI flash size : 4MB" }, 199 { 51, 3, 3, "Host SPI flash size : 8MB" }, 200 { 51, 3, 4, "Host SPI flash size : 16MB" }, 201 { 51, 3, 5, "Host SPI flash size : 32MB" }, 202 { 51, 3, 6, "Host SPI flash size : 64MB" }, 203 { 51, 3, 7, "Host SPI flash size : 128MB" }, 204 { 54, 1, 0, "Disable boot SPI auxiliary control pins" }, 205 { 54, 1, 1, "Enable boot SPI auxiliary control pins" }, 206 { 55, 2, 0, "Boot SPI CRTM size : disable CRTM" }, 207 { 55, 2, 1, "Boot SPI CRTM size : 256KB" }, 208 { 55, 2, 2, "Boot SPI CRTM size : 512KB" }, 209 { 55, 2, 3, "Boot SPI CRTM size : 1MB" }, 210 { 57, 2, 0, "Host SPI CRTM size : disable CRTM" }, 211 { 57, 2, 1, "Host SPI CRTM size : 256KB" }, 212 { 57, 2, 2, "Host SPI CRTM size : 512KB" }, 213 { 57, 2, 3, "Host SPI CRTM size : 1MB" }, 214 { 59, 1, 0, "Disable host SPI auxiliary control pins" }, 215 { 59, 1, 1, "Enable host SPI auxiliary control pins" }, 216 { 60, 1, 0, "Disable GPIO pass through" }, 217 { 60, 1, 1, "Enable GPIO pass through" }, 218 { 61, 1, 0, "Enable low security secure boot key" }, 219 { 61, 1, 1, "Disable low security secure boot key" }, 220 { 62, 1, 0, "Disable dedicate GPIO strap pins" }, 221 { 62, 1, 1, "Enable dedicate GPIO strap pins" }, 222 { 63, 1, OTP_REG_RESERVED, "" } 223 }; 224 225 static const struct otpstrap_info a1_strap_info[] = { 226 { 0, 1, 0, "Disable secure boot" }, 227 { 0, 1, 1, "Enable secure boot" }, 228 { 1, 1, 0, "Disable boot from eMMC" }, 229 { 1, 1, 1, "Enable boot from eMMC" }, 230 { 2, 1, 0, "Disable Boot from debug SPI" }, 231 { 2, 1, 1, "Enable Boot from debug SPI" }, 232 { 3, 1, 0, "Enable ARM CM3" }, 233 { 3, 1, 1, "Disable ARM CM3" }, 234 { 4, 1, 0, "No VGA BIOS ROM, VGA BIOS is merged in the system BIOS" }, 235 { 4, 1, 1, "Enable dedicated VGA BIOS ROM" }, 236 { 5, 1, 0, "MAC 1 : RMII/NCSI" }, 237 { 5, 1, 1, "MAC 1 : RGMII" }, 238 { 6, 1, 0, "MAC 2 : RMII/NCSI" }, 239 { 6, 1, 1, "MAC 2 : RGMII" }, 240 { 7, 3, 0, "CPU Frequency : 1GHz" }, 241 { 7, 3, 1, "CPU Frequency : 800MHz" }, 242 { 7, 3, 2, "CPU Frequency : 1.2GHz" }, 243 { 7, 3, 3, "CPU Frequency : 1.4GHz" }, 244 { 10, 2, 0, "HCLK ratio AXI:AHB = 2:1" }, 245 { 10, 2, 1, "HCLK ratio AXI:AHB = 2:1" }, 246 { 10, 2, 2, "HCLK ratio AXI:AHB = 3:1" }, 247 { 10, 2, 3, "HCLK ratio AXI:AHB = 4:1" }, 248 { 12, 2, 0, "VGA memory size : 8MB" }, 249 { 12, 2, 1, "VGA memory size : 16MB" }, 250 { 12, 2, 2, "VGA memory size : 32MB" }, 251 { 12, 2, 3, "VGA memory size : 64MB" }, 252 { 14, 3, OTP_REG_RESERVED, "" }, 253 { 17, 1, 0, "VGA class code : Class Code for video device" }, 254 { 17, 1, 1, "VGA class code : Class Code for VGA device" }, 255 { 18, 1, 0, "Enable debug interfaces 0" }, 256 { 18, 1, 1, "Disable debug interfaces 0" }, 257 { 19, 1, 0, "Boot from emmc mode : High eMMC speed" }, 258 { 19, 1, 1, "Boot from emmc mode : Normal eMMC speed" }, 259 { 20, 1, 0, "Disable Pcie EHCI device" }, 260 { 20, 1, 1, "Enable Pcie EHCI device" }, 261 { 21, 1, 0, "Enable VGA XDMA function" }, 262 { 21, 1, 1, "Disable VGA XDMA function" }, 263 { 22, 1, 0, "Normal BMC mode" }, 264 { 22, 1, 1, "Disable dedicated BMC functions for non-BMC application" }, 265 { 23, 1, 0, "SSPRST# pin is for secondary processor dedicated reset pin" }, 266 { 23, 1, 1, "SSPRST# pin is for PCIE root complex dedicated reset pin" }, 267 { 24, 1, 0, "Enable watchdog to reset full chip" }, 268 { 24, 1, 1, "Disable watchdog to reset full chip" }, 269 { 25, 5, OTP_REG_RESERVED, "" }, 270 { 30, 2, OTP_REG_RESERVED, "" }, 271 { 32, 1, 0, "MAC 3 : RMII/NCSI" }, 272 { 32, 1, 1, "MAC 3 : RGMII" }, 273 { 33, 1, 0, "MAC 4 : RMII/NCSI" }, 274 { 33, 1, 1, "MAC 4 : RGMII" }, 275 { 34, 1, 0, "SuperIO configuration address : 0x2E" }, 276 { 34, 1, 1, "SuperIO configuration address : 0x4E" }, 277 { 35, 1, 0, "Enable LPC to decode SuperIO" }, 278 { 35, 1, 1, "Disable LPC to decode SuperIO" }, 279 { 36, 1, 0, "Enable debug interfaces 1" }, 280 { 36, 1, 1, "Disable debug interfaces 1" }, 281 { 37, 1, 0, "Disable ACPI function" }, 282 { 37, 1, 1, "Enable ACPI function" }, 283 { 38, 1, 0, "Enable eSPI mode" }, 284 { 38, 1, 1, "Enable LPC mode" }, 285 { 39, 1, 0, "Enable SAFS mode" }, 286 { 39, 1, 1, "Enable SAFS mode" }, 287 { 40, 2, OTP_REG_RESERVED, "" }, 288 { 42, 1, 0, "Disable boot SPI 3B/4B address mode auto detection" }, 289 { 42, 1, 1, "Enable boot SPI 3B/4B address mode auto detection" }, 290 { 43, 1, 0, "Disable boot SPI ABR" }, 291 { 43, 1, 1, "Enable boot SPI ABR" }, 292 { 44, 1, 0, "Boot SPI ABR mode : dual SPI flash" }, 293 { 44, 1, 1, "Boot SPI ABR mode : single SPI flash" }, 294 { 45, 3, 0, "Boot SPI flash size : no define size" }, 295 { 45, 3, 1, "Boot SPI flash size : 2MB" }, 296 { 45, 3, 2, "Boot SPI flash size : 4MB" }, 297 { 45, 3, 3, "Boot SPI flash size : 8MB" }, 298 { 45, 3, 4, "Boot SPI flash size : 16MB" }, 299 { 45, 3, 5, "Boot SPI flash size : 32MB" }, 300 { 45, 3, 6, "Boot SPI flash size : 64MB" }, 301 { 45, 3, 7, "Boot SPI flash size : 128MB" }, 302 { 48, 1, 0, "Disable host SPI ABR" }, 303 { 48, 1, 1, "Enable host SPI ABR" }, 304 { 49, 1, 0, "Disable host SPI ABR mode select pin" }, 305 { 49, 1, 1, "Enable host SPI ABR mode select pin" }, 306 { 50, 1, 0, "Host SPI ABR mode : dual SPI flash" }, 307 { 50, 1, 1, "Host SPI ABR mode : single SPI flash" }, 308 { 51, 3, 0, "Host SPI flash size : no define size" }, 309 { 51, 3, 1, "Host SPI flash size : 2MB" }, 310 { 51, 3, 2, "Host SPI flash size : 4MB" }, 311 { 51, 3, 3, "Host SPI flash size : 8MB" }, 312 { 51, 3, 4, "Host SPI flash size : 16MB" }, 313 { 51, 3, 5, "Host SPI flash size : 32MB" }, 314 { 51, 3, 6, "Host SPI flash size : 64MB" }, 315 { 51, 3, 7, "Host SPI flash size : 128MB" }, 316 { 54, 1, 0, "Disable boot SPI auxiliary control pins" }, 317 { 54, 1, 1, "Enable boot SPI auxiliary control pins" }, 318 { 55, 2, 0, "Boot SPI CRTM size : disable CRTM" }, 319 { 55, 2, 1, "Boot SPI CRTM size : 256KB" }, 320 { 55, 2, 2, "Boot SPI CRTM size : 512KB" }, 321 { 55, 2, 3, "Boot SPI CRTM size : 1MB" }, 322 { 57, 2, 0, "Host SPI CRTM size : disable CRTM" }, 323 { 57, 2, 1, "Host SPI CRTM size : 256KB" }, 324 { 57, 2, 2, "Host SPI CRTM size : 512KB" }, 325 { 57, 2, 3, "Host SPI CRTM size : 1MB" }, 326 { 59, 1, 0, "Disable host SPI auxiliary control pins" }, 327 { 59, 1, 1, "Enable host SPI auxiliary control pins" }, 328 { 60, 1, 0, "Disable GPIO pass through" }, 329 { 60, 1, 1, "Enable GPIO pass through" }, 330 { 61, 1, 0, "Enable low security secure boot key" }, 331 { 61, 1, 1, "Disable low security secure boot key" }, 332 { 62, 1, 0, "Disable dedicate GPIO strap pins" }, 333 { 62, 1, 1, "Enable dedicate GPIO strap pins" }, 334 { 63, 1, OTP_REG_RESERVED, "" } 335 }; 336 337 static const struct otpconf_info a0_conf_info[] = { 338 { 0, 0, 1, 0, "Enable Secure Region programming" }, 339 { 0, 0, 1, 1, "Disable Secure Region programming" }, 340 { 0, 1, 1, 0, "Disable Secure Boot" }, 341 { 0, 1, 1, 1, "Enable Secure Boot" }, 342 { 0, 2, 1, 0, "Initialization programming not done" }, 343 { 0, 2, 1, 1, "Initialization programming done" }, 344 { 0, 3, 1, 0, "User region ECC disable" }, 345 { 0, 3, 1, 1, "User region ECC enable" }, 346 { 0, 4, 1, 0, "Secure Region ECC disable" }, 347 { 0, 4, 1, 1, "Secure Region ECC enable" }, 348 { 0, 5, 1, 0, "Enable low security key" }, 349 { 0, 5, 1, 1, "Disable low security key" }, 350 { 0, 6, 1, 0, "Do not ignore Secure Boot hardware strap" }, 351 { 0, 6, 1, 1, "Ignore Secure Boot hardware strap" }, 352 { 0, 7, 1, 0, "Secure Boot Mode: 1" }, 353 { 0, 7, 1, 1, "Secure Boot Mode: 2" }, 354 { 0, 8, 2, 0, "Single cell mode (recommended)" }, 355 { 0, 8, 2, 1, "Differential mode" }, 356 { 0, 8, 2, 2, "Differential-redundant mode" }, 357 { 0, 10, 2, 0, "RSA mode : RSA1024" }, 358 { 0, 10, 2, 1, "RSA mode : RSA2048" }, 359 { 0, 10, 2, 2, "RSA mode : RSA3072" }, 360 { 0, 10, 2, 3, "RSA mode : RSA4096" }, 361 { 0, 12, 2, 0, "SHA mode : SHA224" }, 362 { 0, 12, 2, 1, "SHA mode : SHA256" }, 363 { 0, 12, 2, 2, "SHA mode : SHA384" }, 364 { 0, 12, 2, 3, "SHA mode : SHA512" }, 365 { 0, 14, 2, OTP_REG_RESERVED, "" }, 366 { 0, 16, 6, OTP_REG_VALUE, "Secure Region size (DW): 0x%x" }, 367 { 0, 22, 1, 0, "Secure Region : Writable" }, 368 { 0, 22, 1, 1, "Secure Region : Write Protect" }, 369 { 0, 23, 1, 0, "User Region : Writable" }, 370 { 0, 23, 1, 1, "User Region : Write Protect" }, 371 { 0, 24, 1, 0, "Configure Region : Writable" }, 372 { 0, 24, 1, 1, "Configure Region : Write Protect" }, 373 { 0, 25, 1, 0, "OTP strap Region : Writable" }, 374 { 0, 25, 1, 1, "OTP strap Region : Write Protect" }, 375 { 0, 26, 1, 0, "Disable Copy Boot Image to Internal SRAM" }, 376 { 0, 26, 1, 1, "Copy Boot Image to Internal SRAM" }, 377 { 0, 27, 1, 0, "Disable image encryption" }, 378 { 0, 27, 1, 1, "Enable image encryption" }, 379 { 0, 28, 1, OTP_REG_RESERVED, "" }, 380 { 0, 29, 1, 0, "OTP key retire Region : Writable" }, 381 { 0, 29, 1, 1, "OTP key retire Region : Write Protect" }, 382 { 0, 30, 1, 0, "Data region redundancy repair disable" }, 383 { 0, 30, 1, 1, "Data region redundancy repair enable" }, 384 { 0, 31, 1, 0, "OTP memory lock disable" }, 385 { 0, 31, 1, 1, "OTP memory lock enable" }, 386 { 2, 0, 16, OTP_REG_VALUE, "Vender ID : 0x%x" }, 387 { 2, 16, 16, OTP_REG_VALUE, "Key Revision : 0x%x" }, 388 { 3, 0, 16, OTP_REG_VALUE, "Secure boot header offset : 0x%x" }, 389 { 4, 0, 8, OTP_REG_VALID_BIT, "Keys valid : %s" }, 390 { 4, 16, 8, OTP_REG_VALID_BIT, "Keys retire : %s" }, 391 { 5, 0, 32, OTP_REG_VALUE, "User define data, random number low : 0x%x" }, 392 { 6, 0, 32, OTP_REG_VALUE, "User define data, random number high : 0x%x" }, 393 { 7, 0, 1, 0, "Force enable PCI bus to AHB bus bridge" }, 394 { 7, 0, 1, 1, "Force disable PCI bus to AHB bus bridge" }, 395 { 7, 1, 1, 0, "Force enable UART5 debug port function" }, 396 { 7, 1, 1, 1, "Force disable UART5 debug port function" }, 397 { 7, 2, 1, 0, "Force enable XDMA function" }, 398 { 7, 2, 1, 1, "Force disable XDMA function" }, 399 { 7, 3, 1, 0, "Force enable APB to PCIE device bridge" }, 400 { 7, 3, 1, 1, "Force disable APB to PCIE device bridge" }, 401 { 7, 4, 1, 0, "Force enable APB to PCIE bridge config access" }, 402 { 7, 4, 1, 1, "Force disable APB to PCIE bridge config access" }, 403 { 7, 5, 1, 0, "Force enable PCIE bus trace buffer" }, 404 { 7, 5, 1, 1, "Force disable PCIE bus trace buffer" }, 405 { 7, 6, 1, 0, "Force enable the capability for PCIE device port as a Root Complex" }, 406 { 7, 6, 1, 1, "Force disable the capability for PCIE device port as a Root Complex" }, 407 { 7, 16, 1, 0, "Force enable ESPI bus to AHB bus bridge" }, 408 { 7, 16, 1, 1, "Force disable ESPI bus to AHB bus bridge" }, 409 { 7, 17, 1, 0, "Force enable LPC bus to AHB bus bridge1" }, 410 { 7, 17, 1, 1, "Force disable LPC bus to AHB bus bridge1" }, 411 { 7, 18, 1, 0, "Force enable LPC bus to AHB bus bridge2" }, 412 { 7, 18, 1, 1, "Force disable LPC bus to AHB bus bridge2" }, 413 { 7, 19, 1, 0, "Force enable UART1 debug port function" }, 414 { 7, 19, 1, 1, "Force disable UART1 debug port function" }, 415 { 7, 31, 1, 0, "Disable chip security setting" }, 416 { 7, 31, 1, 1, "Enable chip security setting" }, 417 { 8, 0, 32, OTP_REG_VALUE, "Redundancy Repair : 0x%x" }, 418 { 10, 0, 32, OTP_REG_VALUE, "Manifest ID low : 0x%x" }, 419 { 11, 0, 32, OTP_REG_VALUE, "Manifest ID high : 0x%x" } 420 }; 421 422 static const struct otpconf_info a1_conf_info[] = { 423 { 0, 0, 1, OTP_REG_RESERVED, "" }, 424 { 0, 1, 1, 0, "Disable Secure Boot" }, 425 { 0, 1, 1, 1, "Enable Secure Boot" }, 426 { 0, 2, 1, 0, "Initialization programming not done" }, 427 { 0, 2, 1, 1, "Initialization programming done" }, 428 { 0, 3, 1, 0, "User region ECC disable" }, 429 { 0, 3, 1, 1, "User region ECC enable" }, 430 { 0, 4, 1, 0, "Secure Region ECC disable" }, 431 { 0, 4, 1, 1, "Secure Region ECC enable" }, 432 { 0, 5, 1, 0, "Enable low security key" }, 433 { 0, 5, 1, 1, "Disable low security key" }, 434 { 0, 6, 1, 0, "Do not ignore Secure Boot hardware strap" }, 435 { 0, 6, 1, 1, "Ignore Secure Boot hardware strap" }, 436 { 0, 7, 1, 0, "Secure Boot Mode: GCM" }, 437 { 0, 7, 1, 1, "Secure Boot Mode: 2" }, 438 { 0, 8, 2, 0, "Single cell mode (recommended)" }, 439 { 0, 8, 2, 1, "Differential mode" }, 440 { 0, 8, 2, 2, "Differential-redundant mode" }, 441 { 0, 10, 2, 0, "RSA mode : RSA1024" }, 442 { 0, 10, 2, 1, "RSA mode : RSA2048" }, 443 { 0, 10, 2, 2, "RSA mode : RSA3072" }, 444 { 0, 10, 2, 3, "RSA mode : RSA4096" }, 445 { 0, 12, 2, 0, "SHA mode : SHA224" }, 446 { 0, 12, 2, 1, "SHA mode : SHA256" }, 447 { 0, 12, 2, 2, "SHA mode : SHA384" }, 448 { 0, 12, 2, 3, "SHA mode : SHA512" }, 449 { 0, 14, 2, OTP_REG_RESERVED, "" }, 450 { 0, 16, 6, OTP_REG_VALUE, "Secure Region size (DW): 0x%x" }, 451 { 0, 22, 1, 0, "Secure Region : Writable" }, 452 { 0, 22, 1, 1, "Secure Region : Write Protect" }, 453 { 0, 23, 1, 0, "User Region : Writable" }, 454 { 0, 23, 1, 1, "User Region : Write Protect" }, 455 { 0, 24, 1, 0, "Configure Region : Writable" }, 456 { 0, 24, 1, 1, "Configure Region : Write Protect" }, 457 { 0, 25, 1, 0, "OTP strap Region : Writable" }, 458 { 0, 25, 1, 1, "OTP strap Region : Write Protect" }, 459 { 0, 26, 1, 0, "Disable Copy Boot Image to Internal SRAM" }, 460 { 0, 26, 1, 1, "Copy Boot Image to Internal SRAM" }, 461 { 0, 27, 1, 0, "Disable image encryption" }, 462 { 0, 27, 1, 1, "Enable image encryption" }, 463 { 0, 28, 1, OTP_REG_RESERVED, "" }, 464 { 0, 29, 1, 0, "OTP key retire Region : Writable" }, 465 { 0, 29, 1, 1, "OTP key retire Region : Write Protect" }, 466 { 0, 30, 1, 0, "Data region redundancy repair disable" }, 467 { 0, 30, 1, 1, "Data region redundancy repair enable" }, 468 { 0, 31, 1, 0, "OTP memory lock disable" }, 469 { 0, 31, 1, 1, "OTP memory lock enable" }, 470 { 2, 0, 16, OTP_REG_VALUE, "Vender ID : 0x%x" }, 471 { 2, 16, 16, OTP_REG_VALUE, "Key Revision : 0x%x" }, 472 { 3, 0, 16, OTP_REG_VALUE, "Secure boot header offset : 0x%x" }, 473 { 4, 0, 8, OTP_REG_VALID_BIT, "Keys valid : %s" }, 474 { 4, 16, 8, OTP_REG_VALID_BIT, "Keys retire : %s" }, 475 { 5, 0, 32, OTP_REG_VALUE, "User define data, random number low : 0x%x" }, 476 { 6, 0, 32, OTP_REG_VALUE, "User define data, random number high : 0x%x" }, 477 { 7, 0, 1, 0, "Force enable PCI bus to AHB bus bridge" }, 478 { 7, 0, 1, 1, "Force disable PCI bus to AHB bus bridge" }, 479 { 7, 1, 1, 0, "Force enable UART5 debug port function" }, 480 { 7, 1, 1, 1, "Force disable UART5 debug port function" }, 481 { 7, 2, 1, 0, "Force enable XDMA function" }, 482 { 7, 2, 1, 1, "Force disable XDMA function" }, 483 { 7, 3, 1, 0, "Force enable APB to PCIE device bridge" }, 484 { 7, 3, 1, 1, "Force disable APB to PCIE device bridge" }, 485 { 7, 4, 1, 0, "Force enable APB to PCIE bridge config access" }, 486 { 7, 4, 1, 1, "Force disable APB to PCIE bridge config access" }, 487 { 7, 5, 1, 0, "Force enable PCIE bus trace buffer" }, 488 { 7, 5, 1, 1, "Force disable PCIE bus trace buffer" }, 489 { 7, 6, 1, 0, "Force enable the capability for PCIE device port as a Root Complex" }, 490 { 7, 6, 1, 1, "Force disable the capability for PCIE device port as a Root Complex" }, 491 { 7, 16, 1, 0, "Force enable ESPI bus to AHB bus bridge" }, 492 { 7, 16, 1, 1, "Force disable ESPI bus to AHB bus bridge" }, 493 { 7, 17, 1, 0, "Force enable LPC bus to AHB bus bridge1" }, 494 { 7, 17, 1, 1, "Force disable LPC bus to AHB bus bridge1" }, 495 { 7, 18, 1, 0, "Force enable LPC bus to AHB bus bridge2" }, 496 { 7, 18, 1, 1, "Force disable LPC bus to AHB bus bridge2" }, 497 { 7, 19, 1, 0, "Force enable UART1 debug port function" }, 498 { 7, 19, 1, 1, "Force disable UART1 debug port function" }, 499 { 7, 31, 1, 0, "Disable chip security setting" }, 500 { 7, 31, 1, 1, "Enable chip security setting" }, 501 { 8, 0, 32, OTP_REG_VALUE, "Redundancy Repair : 0x%x" }, 502 { 10, 0, 32, OTP_REG_VALUE, "Manifest ID low : 0x%x" }, 503 { 11, 0, 32, OTP_REG_VALUE, "Manifest ID high : 0x%x" } 504 }; 505 506 static const struct otpkey_type a0_key_type[] = { 507 {0, OTP_KEY_TYPE_AES, 0, "AES-256 as OEM platform key for image encryption/decryption"}, 508 {1, OTP_KEY_TYPE_VAULT, 0, "AES-256 as secret vault key"}, 509 {4, OTP_KEY_TYPE_HMAC, 1, "HMAC as encrypted OEM HMAC keys in Mode 1"}, 510 {8, OTP_KEY_TYPE_RSA, 1, "RSA-public as OEM DSS public keys in Mode 2"}, 511 {9, OTP_KEY_TYPE_RSA, 0, "RSA-public as SOC public key"}, 512 {10, OTP_KEY_TYPE_RSA, 0, "RSA-public as AES key decryption key"}, 513 {13, OTP_KEY_TYPE_RSA, 0, "RSA-private as SOC private key"}, 514 {14, OTP_KEY_TYPE_RSA, 0, "RSA-private as AES key decryption key"}, 515 }; 516 517 static const struct otpkey_type a1_key_type[] = { 518 {1, OTP_KEY_TYPE_VAULT, 0, "AES-256 as secret vault key"}, 519 {2, OTP_KEY_TYPE_AES, 1, "AES-256 as OEM platform key for image encryption/decryption in Mode 2 or AES-256 as OEM DSS keys for Mode GCM"}, 520 {8, OTP_KEY_TYPE_RSA, 1, "RSA-public as OEM DSS public keys in Mode 2"}, 521 {10, OTP_KEY_TYPE_RSA, 0, "RSA-public as AES key decryption key"}, 522 {14, OTP_KEY_TYPE_RSA, 0, "RSA-private as AES key decryption key"}, 523 }; 524 525 static uint32_t chip_version(void) 526 { 527 uint32_t rev_id; 528 529 rev_id = (readl(0x1e6e2004) >> 16) & 0xff ; 530 531 return rev_id; 532 } 533 534 static void wait_complete(void) 535 { 536 int reg; 537 538 do { 539 reg = readl(OTP_STATUS); 540 } while ((reg & 0x6) != 0x6); 541 } 542 543 static void otp_read_data(uint32_t offset, uint32_t *data) 544 { 545 writel(offset, OTP_ADDR); //Read address 546 writel(0x23b1e361, OTP_COMMAND); //trigger read 547 wait_complete(); 548 data[0] = readl(OTP_COMPARE_1); 549 data[1] = readl(OTP_COMPARE_2); 550 } 551 552 static void otp_read_config(uint32_t offset, uint32_t *data) 553 { 554 int config_offset; 555 556 config_offset = 0x800; 557 config_offset |= (offset / 8) * 0x200; 558 config_offset |= (offset % 8) * 0x2; 559 560 writel(config_offset, OTP_ADDR); //Read address 561 writel(0x23b1e361, OTP_COMMAND); //trigger read 562 wait_complete(); 563 data[0] = readl(OTP_COMPARE_1); 564 } 565 566 static int otp_print_config(uint32_t offset, int dw_count) 567 { 568 int i; 569 uint32_t ret[1]; 570 571 if (offset + dw_count > 32) 572 return OTP_USAGE; 573 for (i = offset; i < offset + dw_count; i ++) { 574 otp_read_config(i, ret); 575 printf("OTPCFG%X: %08X\n", i, ret[0]); 576 } 577 printf("\n"); 578 return OTP_SUCCESS; 579 } 580 581 static int otp_print_data(uint32_t offset, int dw_count) 582 { 583 int i; 584 uint32_t ret[2]; 585 586 if (offset + dw_count > 2048 || offset % 4 != 0) 587 return OTP_USAGE; 588 for (i = offset; i < offset + dw_count; i += 2) { 589 otp_read_data(i, ret); 590 if (i % 4 == 0) 591 printf("%03X: %08X %08X ", i * 4, ret[0], ret[1]); 592 else 593 printf("%08X %08X\n", ret[0], ret[1]); 594 595 } 596 printf("\n"); 597 return OTP_SUCCESS; 598 } 599 600 static int otp_compare(uint32_t otp_addr, uint32_t addr) 601 { 602 uint32_t ret; 603 uint32_t *buf; 604 605 buf = map_physmem(addr, 16, MAP_WRBACK); 606 printf("%08X\n", buf[0]); 607 printf("%08X\n", buf[1]); 608 printf("%08X\n", buf[2]); 609 printf("%08X\n", buf[3]); 610 writel(otp_addr, OTP_ADDR); //Compare address 611 writel(buf[0], OTP_COMPARE_1); //Compare data 1 612 writel(buf[1], OTP_COMPARE_2); //Compare data 2 613 writel(buf[2], OTP_COMPARE_3); //Compare data 3 614 writel(buf[3], OTP_COMPARE_4); //Compare data 4 615 writel(0x23b1e363, OTP_COMMAND); //Compare command 616 wait_complete(); 617 ret = readl(OTP_STATUS); //Compare command 618 if (ret & 0x1) 619 return 0; 620 else 621 return -1; 622 } 623 624 static void otp_write(uint32_t otp_addr, uint32_t data) 625 { 626 writel(otp_addr, OTP_ADDR); //write address 627 writel(data, OTP_COMPARE_1); //write data 628 writel(0x23b1e362, OTP_COMMAND); //write command 629 wait_complete(); 630 } 631 632 static void otp_prog(uint32_t otp_addr, uint32_t prog_bit) 633 { 634 writel(otp_addr, OTP_ADDR); //write address 635 writel(prog_bit, OTP_COMPARE_1); //write data 636 writel(0x23b1e364, OTP_COMMAND); //write command 637 wait_complete(); 638 } 639 640 static int verify_bit(uint32_t otp_addr, int bit_offset, int value) 641 { 642 uint32_t ret[2]; 643 644 if (otp_addr % 2 == 0) 645 writel(otp_addr, OTP_ADDR); //Read address 646 else 647 writel(otp_addr - 1, OTP_ADDR); //Read address 648 649 writel(0x23b1e361, OTP_COMMAND); //trigger read 650 wait_complete(); 651 ret[0] = readl(OTP_COMPARE_1); 652 ret[1] = readl(OTP_COMPARE_2); 653 // printf("verify_bit = %x\n", ret); 654 if (otp_addr % 2 == 0) { 655 if (((ret[0] >> bit_offset) & 1) == value) 656 return 0; 657 else 658 return -1; 659 } else { 660 if (((ret[1] >> bit_offset) & 1) == value) 661 return 0; 662 else 663 return -1; 664 } 665 666 } 667 668 static uint32_t verify_dw(uint32_t otp_addr, uint32_t *value, uint32_t *keep, uint32_t *compare, int size) 669 { 670 uint32_t ret[2]; 671 672 otp_addr &= ~(1 << 15); 673 674 if (otp_addr % 2 == 0) 675 writel(otp_addr, OTP_ADDR); //Read address 676 else 677 writel(otp_addr - 1, OTP_ADDR); //Read address 678 writel(0x23b1e361, OTP_COMMAND); //trigger read 679 wait_complete(); 680 ret[0] = readl(OTP_COMPARE_1); 681 ret[1] = readl(OTP_COMPARE_2); 682 if (size == 1) { 683 if (otp_addr % 2 == 0) { 684 // printf("check %x : %x = %x\n", otp_addr, ret[0], value[0]); 685 if ((value[0] & ~keep[0]) == (ret[0] & ~keep[0])) { 686 compare[0] = 0; 687 return 0; 688 } else { 689 compare[0] = value[0] ^ ret[0]; 690 return -1; 691 } 692 693 } else { 694 // printf("check %x : %x = %x\n", otp_addr, ret[1], value[0]); 695 if ((value[0] & ~keep[0]) == (ret[1] & ~keep[0])) { 696 compare[0] = ~0; 697 return 0; 698 } else { 699 compare[0] = ~(value[0] ^ ret[1]); 700 return -1; 701 } 702 } 703 } else if (size == 2) { 704 // otp_addr should be even 705 if ((value[0] & ~keep[0]) == (ret[0] & ~keep[0]) && (value[1] & ~keep[1]) == (ret[1] & ~keep[1])) { 706 // printf("check[0] %x : %x = %x\n", otp_addr, ret[0], value[0]); 707 // printf("check[1] %x : %x = %x\n", otp_addr, ret[1], value[1]); 708 compare[0] = 0; 709 compare[1] = ~0; 710 return 0; 711 } else { 712 // printf("check[0] %x : %x = %x\n", otp_addr, ret[0], value[0]); 713 // printf("check[1] %x : %x = %x\n", otp_addr, ret[1], value[1]); 714 compare[0] = value[0] ^ ret[0]; 715 compare[1] = ~(value[1] ^ ret[1]); 716 return -1; 717 } 718 } else { 719 return -1; 720 } 721 } 722 723 static void otp_soak(int soak) 724 { 725 switch (soak) { 726 case 0: //default 727 otp_write(0x3000, 0x0); // Write MRA 728 otp_write(0x5000, 0x0); // Write MRB 729 otp_write(0x1000, 0x0); // Write MR 730 break; 731 case 1: //normal program 732 otp_write(0x3000, 0x4021); // Write MRA 733 otp_write(0x5000, 0x302f); // Write MRB 734 otp_write(0x1000, 0x4020); // Write MR 735 writel(0x04190760, OTP_TIMING); 736 break; 737 case 2: //soak program 738 otp_write(0x3000, 0x4021); // Write MRA 739 otp_write(0x5000, 0x1027); // Write MRB 740 otp_write(0x1000, 0x4820); // Write MR 741 writel(0x041930d4, OTP_TIMING); 742 break; 743 } 744 745 wait_complete(); 746 } 747 748 static void otp_prog_dw(uint32_t value, uint32_t keep, uint32_t prog_address) 749 { 750 int j, bit_value, prog_bit; 751 752 for (j = 0; j < 32; j++) { 753 if ((keep >> j) & 0x1) 754 continue; 755 bit_value = (value >> j) & 0x1; 756 if (prog_address % 2 == 0) { 757 if (bit_value) 758 prog_bit = ~(0x1 << j); 759 else 760 continue; 761 } else { 762 prog_address |= 1 << 15; 763 if (bit_value) 764 continue; 765 else 766 prog_bit = 0x1 << j; 767 } 768 otp_prog(prog_address, prog_bit); 769 } 770 } 771 772 static int otp_prog_verify_2dw(uint32_t *data, uint32_t *buf, uint32_t *ignore_mask, uint32_t prog_address) 773 { 774 int pass; 775 int i; 776 uint32_t data0_masked; 777 uint32_t data1_masked; 778 uint32_t buf0_masked; 779 uint32_t buf1_masked; 780 uint32_t compare[2]; 781 782 data0_masked = data[0] & ~ignore_mask[0]; 783 buf0_masked = buf[0] & ~ignore_mask[0]; 784 data1_masked = data[1] & ~ignore_mask[1]; 785 buf1_masked = buf[1] & ~ignore_mask[1]; 786 if ((data0_masked == buf0_masked) && (data1_masked == buf1_masked)) 787 return 0; 788 789 otp_soak(1); 790 if (data0_masked != buf0_masked) 791 otp_prog_dw(buf[0], ignore_mask[0], prog_address); 792 if (data1_masked != buf1_masked) 793 otp_prog_dw(buf[1], ignore_mask[1], prog_address + 1); 794 795 pass = 0; 796 for (i = 0; i < RETRY; i++) { 797 if (verify_dw(prog_address, buf, ignore_mask, compare, 2) != 0) { 798 otp_soak(2); 799 if (compare[0] != 0) { 800 otp_prog_dw(compare[0], ignore_mask[0], prog_address); 801 } 802 if (compare[1] != ~0) { 803 otp_prog_dw(compare[1], ignore_mask[0], prog_address + 1); 804 } 805 if (verify_dw(prog_address, buf, ignore_mask, compare, 2) != 0) { 806 otp_soak(1); 807 } else { 808 pass = 1; 809 break; 810 } 811 } else { 812 pass = 1; 813 break; 814 } 815 } 816 817 if (!pass) { 818 otp_soak(0); 819 return OTP_FAILURE; 820 } 821 return OTP_SUCCESS; 822 } 823 824 825 static void otp_strap_status(struct otpstrap_status *otpstrap) 826 { 827 uint32_t OTPSTRAP_RAW[2]; 828 int i, j; 829 830 for (j = 0; j < 64; j++) { 831 otpstrap[j].value = 0; 832 otpstrap[j].remain_times = 7; 833 otpstrap[j].writeable_option = -1; 834 otpstrap[j].protected = 0; 835 } 836 837 for (i = 16; i < 30; i += 2) { 838 int option = (i - 16) / 2; 839 otp_read_config(i, &OTPSTRAP_RAW[0]); 840 otp_read_config(i + 1, &OTPSTRAP_RAW[1]); 841 for (j = 0; j < 32; j++) { 842 char bit_value = ((OTPSTRAP_RAW[0] >> j) & 0x1); 843 if ((bit_value == 0) && (otpstrap[j].writeable_option == -1)) { 844 otpstrap[j].writeable_option = option; 845 } 846 if (bit_value == 1) 847 otpstrap[j].remain_times --; 848 otpstrap[j].value ^= bit_value; 849 otpstrap[j].option_array[option] = bit_value; 850 } 851 for (j = 32; j < 64; j++) { 852 char bit_value = ((OTPSTRAP_RAW[1] >> (j - 32)) & 0x1); 853 if ((bit_value == 0) && (otpstrap[j].writeable_option == -1)) { 854 otpstrap[j].writeable_option = option; 855 } 856 if (bit_value == 1) 857 otpstrap[j].remain_times --; 858 otpstrap[j].value ^= bit_value; 859 otpstrap[j].option_array[option] = bit_value; 860 } 861 } 862 otp_read_config(30, &OTPSTRAP_RAW[0]); 863 otp_read_config(31, &OTPSTRAP_RAW[1]); 864 for (j = 0; j < 32; j++) { 865 if (((OTPSTRAP_RAW[0] >> j) & 0x1) == 1) 866 otpstrap[j].protected = 1; 867 } 868 for (j = 32; j < 64; j++) { 869 if (((OTPSTRAP_RAW[1] >> (j - 32)) & 0x1) == 1) 870 otpstrap[j].protected = 1; 871 } 872 } 873 874 static int otp_print_conf_image(uint32_t *OTPCFG) 875 { 876 const struct otpconf_info *conf_info = info_cb.conf_info; 877 uint32_t *OTPCFG_KEEP = &OTPCFG[12]; 878 uint32_t mask; 879 uint32_t dw_offset; 880 uint32_t bit_offset; 881 uint32_t otp_value; 882 uint32_t otp_keep; 883 int fail = 0; 884 char valid_bit[20]; 885 int i; 886 int j; 887 888 printf("DW BIT Value Description\n"); 889 printf("__________________________________________________________________________\n"); 890 for (i = 0; i < info_cb.conf_info_len; i++) { 891 dw_offset = conf_info[i].dw_offset; 892 bit_offset = conf_info[i].bit_offset; 893 mask = BIT(conf_info[i].length) - 1; 894 otp_value = (OTPCFG[dw_offset] >> bit_offset) & mask; 895 otp_keep = (OTPCFG_KEEP[dw_offset] >> bit_offset) & mask; 896 897 if (otp_keep == mask) { 898 continue; 899 } else if (otp_keep != 0) { 900 fail = 1; 901 } 902 903 if ((otp_value != conf_info[i].value) && 904 conf_info[i].value != OTP_REG_RESERVED && 905 conf_info[i].value != OTP_REG_VALUE && 906 conf_info[i].value != OTP_REG_VALID_BIT) 907 continue; 908 printf("0x%-4X", dw_offset); 909 910 if (conf_info[i].length == 1) { 911 printf("0x%-9X", conf_info[i].bit_offset); 912 } else { 913 printf("0x%-2X:0x%-4X", 914 conf_info[i].bit_offset + conf_info[i].length - 1, 915 conf_info[i].bit_offset); 916 } 917 printf("0x%-10x", otp_value); 918 919 if (fail) { 920 printf("Keep mask error\n"); 921 } else { 922 if (conf_info[i].value == OTP_REG_RESERVED) { 923 printf("Reserved\n"); 924 } else if (conf_info[i].value == OTP_REG_VALUE) { 925 printf(conf_info[i].information, otp_value); 926 printf("\n"); 927 } else if (conf_info[i].value == OTP_REG_VALID_BIT) { 928 if (otp_value != 0) { 929 for (j = 0; j < 7; j++) { 930 if (otp_value == (1 << j)) { 931 valid_bit[j * 2] = '1'; 932 } else { 933 valid_bit[j * 2] = '0'; 934 } 935 valid_bit[j * 2 + 1] = ' '; 936 } 937 valid_bit[15] = 0; 938 } else { 939 strcpy(valid_bit, "0 0 0 0 0 0 0 0\0"); 940 } 941 printf(conf_info[i].information, valid_bit); 942 printf("\n"); 943 } else { 944 printf("%s\n", conf_info[i].information); 945 } 946 } 947 } 948 949 if (fail) 950 return OTP_FAILURE; 951 952 return OTP_SUCCESS; 953 } 954 955 static int otp_print_conf_info(int input_offset) 956 { 957 const struct otpconf_info *conf_info = info_cb.conf_info; 958 uint32_t OTPCFG[12]; 959 uint32_t mask; 960 uint32_t dw_offset; 961 uint32_t bit_offset; 962 uint32_t otp_value; 963 char valid_bit[20]; 964 int i; 965 int j; 966 967 for (i = 0; i < 12; i++) 968 otp_read_config(i, &OTPCFG[i]); 969 970 971 printf("DW BIT Value Description\n"); 972 printf("__________________________________________________________________________\n"); 973 for (i = 0; i < info_cb.conf_info_len; i++) { 974 if (input_offset != -1 && input_offset != conf_info[i].dw_offset) 975 continue; 976 dw_offset = conf_info[i].dw_offset; 977 bit_offset = conf_info[i].bit_offset; 978 mask = BIT(conf_info[i].length) - 1; 979 otp_value = (OTPCFG[dw_offset] >> bit_offset) & mask; 980 981 if ((otp_value != conf_info[i].value) && 982 conf_info[i].value != OTP_REG_RESERVED && 983 conf_info[i].value != OTP_REG_VALUE && 984 conf_info[i].value != OTP_REG_VALID_BIT) 985 continue; 986 printf("0x%-4X", dw_offset); 987 988 if (conf_info[i].length == 1) { 989 printf("0x%-9X", conf_info[i].bit_offset); 990 } else { 991 printf("0x%-2X:0x%-4X", 992 conf_info[i].bit_offset + conf_info[i].length - 1, 993 conf_info[i].bit_offset); 994 } 995 printf("0x%-10x", otp_value); 996 997 if (conf_info[i].value == OTP_REG_RESERVED) { 998 printf("Reserved\n"); 999 } else if (conf_info[i].value == OTP_REG_VALUE) { 1000 printf(conf_info[i].information, otp_value); 1001 printf("\n"); 1002 } else if (conf_info[i].value == OTP_REG_VALID_BIT) { 1003 if (otp_value != 0) { 1004 for (j = 0; j < 7; j++) { 1005 if (otp_value == (1 << j)) { 1006 valid_bit[j * 2] = '1'; 1007 } else { 1008 valid_bit[j * 2] = '0'; 1009 } 1010 valid_bit[j * 2 + 1] = ' '; 1011 } 1012 valid_bit[15] = 0; 1013 } else { 1014 strcpy(valid_bit, "0 0 0 0 0 0 0 0\0"); 1015 } 1016 printf(conf_info[i].information, valid_bit); 1017 printf("\n"); 1018 } else { 1019 printf("%s\n", conf_info[i].information); 1020 } 1021 } 1022 return OTP_SUCCESS; 1023 } 1024 1025 static int otp_print_strap_image(uint32_t *OTPSTRAP) 1026 { 1027 const struct otpstrap_info *strap_info = info_cb.strap_info; 1028 uint32_t *OTPSTRAP_PRO = &OTPSTRAP[4]; 1029 uint32_t *OTPSTRAP_KEEP = &OTPSTRAP[2]; 1030 int i; 1031 int fail = 0; 1032 uint32_t bit_offset; 1033 uint32_t dw_offset; 1034 uint32_t mask; 1035 uint32_t otp_value; 1036 uint32_t otp_protect; 1037 uint32_t otp_keep; 1038 1039 printf("BIT(hex) Value Protect Description\n"); 1040 printf("__________________________________________________________________________________________\n"); 1041 1042 for (i = 0; i < info_cb.strap_info_len; i++) { 1043 if (strap_info[i].bit_offset > 32) { 1044 dw_offset = 1; 1045 bit_offset = strap_info[i].bit_offset - 32; 1046 } else { 1047 dw_offset = 0; 1048 bit_offset = strap_info[i].bit_offset; 1049 } 1050 1051 mask = BIT(strap_info[i].length) - 1; 1052 otp_value = (OTPSTRAP[dw_offset] >> bit_offset) & mask; 1053 otp_protect = (OTPSTRAP_PRO[dw_offset] >> bit_offset) & mask; 1054 otp_keep = (OTPSTRAP_KEEP[dw_offset] >> bit_offset) & mask; 1055 1056 if (otp_keep == mask) { 1057 continue; 1058 } else if (otp_keep != 0) { 1059 fail = 1; 1060 } 1061 1062 if ((otp_value != strap_info[i].value) && 1063 strap_info[i].value != OTP_REG_RESERVED) 1064 continue; 1065 1066 if (strap_info[i].length == 1) { 1067 printf("0x%-9X", strap_info[i].bit_offset); 1068 } else { 1069 printf("0x%-2X:0x%-4X", 1070 strap_info[i].bit_offset + strap_info[i].length - 1, 1071 strap_info[i].bit_offset); 1072 } 1073 printf("0x%-10x", otp_value); 1074 printf("0x%-10x", otp_protect); 1075 1076 if (fail) { 1077 printf("Keep mask error\n"); 1078 } else { 1079 if (strap_info[i].value != OTP_REG_RESERVED) 1080 printf("%s\n", strap_info[i].information); 1081 else 1082 printf("Reserved\n"); 1083 } 1084 } 1085 1086 if (fail) 1087 return OTP_FAILURE; 1088 1089 return OTP_SUCCESS; 1090 } 1091 1092 static int otp_print_strap_info(int view) 1093 { 1094 const struct otpstrap_info *strap_info = info_cb.strap_info; 1095 struct otpstrap_status strap_status[64]; 1096 int i, j; 1097 int fail = 0; 1098 uint32_t bit_offset; 1099 uint32_t length; 1100 uint32_t otp_value; 1101 uint32_t otp_protect; 1102 1103 otp_strap_status(strap_status); 1104 1105 if (view) { 1106 // printf("BIT(hex) Value Option Protect Description\n"); 1107 // printf(" 0 1 2 3 4 5 6\n"); 1108 printf("BIT(hex) Value Remains Protect Description\n"); 1109 printf("___________________________________________________________________________________________________\n"); 1110 } else { 1111 printf("BIT(hex) Value Description\n"); 1112 printf("________________________________________________________________________________\n"); 1113 } 1114 for (i = 0; i < info_cb.strap_info_len; i++) { 1115 otp_value = 0; 1116 bit_offset = strap_info[i].bit_offset; 1117 length = strap_info[i].length; 1118 for (j = 0; j < length; j++) { 1119 otp_value |= strap_status[bit_offset + j].value << j; 1120 otp_protect |= strap_status[bit_offset + j].protected << j; 1121 } 1122 if ((otp_value != strap_info[i].value) && 1123 strap_info[i].value != OTP_REG_RESERVED) 1124 continue; 1125 if (view) { 1126 for (j = 0; j < length; j++) { 1127 printf("0x%-7X", strap_info[i].bit_offset + j); 1128 printf("0x%-5X", strap_status[bit_offset + j].value); 1129 printf("%-9d", strap_status[bit_offset + j].remain_times); 1130 printf("0x%-7X", strap_status[bit_offset].protected); 1131 if (strap_info[i].value == OTP_REG_RESERVED) { 1132 printf(" Reserved\n"); 1133 continue; 1134 } 1135 if (length == 1) { 1136 printf(" %s\n", strap_info[i].information); 1137 continue; 1138 } 1139 1140 if (j == 0) 1141 printf("/%s\n", strap_info[i].information); 1142 else if (j == length - 1) 1143 printf("\\ \"\n"); 1144 else 1145 printf("| \"\n"); 1146 } 1147 } else { 1148 if (length == 1) { 1149 printf("0x%-9X", strap_info[i].bit_offset); 1150 } else { 1151 printf("0x%-2X:0x%-4X", 1152 bit_offset + length - 1, bit_offset); 1153 } 1154 1155 printf("0x%-10X", otp_value); 1156 1157 if (strap_info[i].value != OTP_REG_RESERVED) 1158 printf("%s\n", strap_info[i].information); 1159 else 1160 printf("Reserved\n"); 1161 } 1162 } 1163 1164 if (fail) 1165 return OTP_FAILURE; 1166 1167 return OTP_SUCCESS; 1168 } 1169 1170 static void buf_print(char *buf, int len) 1171 { 1172 int i; 1173 printf(" 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F\n"); 1174 for (i = 0; i < len; i++) { 1175 if (i % 16 == 0) { 1176 printf("%04X: ", i); 1177 } 1178 printf("%02X ", buf[i]); 1179 if ((i + 1) % 16 == 0) { 1180 printf("\n"); 1181 } 1182 } 1183 } 1184 1185 static int otp_print_data_info(uint32_t *buf) 1186 { 1187 int key_id, key_offset, last, key_type, key_length, exp_length; 1188 const struct otpkey_type *key_info_array = info_cb.key_info; 1189 struct otpkey_type key_info; 1190 char *byte_buf; 1191 char empty = 1; 1192 int i = 0, len = 0; 1193 int j; 1194 1195 byte_buf = (char *)buf; 1196 1197 for (i = 0; i < 16; i++) { 1198 if (buf[i] != 0) { 1199 empty = 0; 1200 } 1201 } 1202 if (empty) 1203 return 0; 1204 1205 i = 0; 1206 while (1) { 1207 key_id = buf[i] & 0x7; 1208 key_offset = buf[i] & 0x1ff8; 1209 last = (buf[i] >> 13) & 1; 1210 key_type = (buf[i] >> 14) & 0xf; 1211 key_length = (buf[i] >> 18) & 0x3; 1212 exp_length = (buf[i] >> 20) & 0xfff; 1213 1214 for (j = 0; j < info_cb.key_info_len; j++) { 1215 if (key_type == key_info_array[j].value) { 1216 key_info = key_info_array[j]; 1217 break; 1218 } 1219 } 1220 1221 printf("\nKey[%d]:\n", i); 1222 printf("Key Type: "); 1223 printf("%s\n", key_info.information); 1224 1225 if (key_info.key_type == OTP_KEY_TYPE_HMAC) { 1226 printf("HMAC SHA Type: "); 1227 switch (key_length) { 1228 case 0: 1229 printf("HMAC(SHA224)\n"); 1230 break; 1231 case 1: 1232 printf("HMAC(SHA256)\n"); 1233 break; 1234 case 2: 1235 printf("HMAC(SHA384)\n"); 1236 break; 1237 case 3: 1238 printf("HMAC(SHA512)\n"); 1239 break; 1240 } 1241 } else if (key_info.key_type == OTP_KEY_TYPE_RSA) { 1242 printf("RSA SHA Type: "); 1243 switch (key_length) { 1244 case 0: 1245 printf("RSA1024\n"); 1246 len = 0x100; 1247 break; 1248 case 1: 1249 printf("RSA2048\n"); 1250 len = 0x200; 1251 break; 1252 case 2: 1253 printf("RSA3072\n"); 1254 len = 0x300; 1255 break; 1256 case 3: 1257 printf("RSA4096\n"); 1258 len = 0x400; 1259 break; 1260 } 1261 printf("RSA exponent bit length: %d\n", exp_length); 1262 } 1263 if (key_info.need_id) 1264 printf("Key Number ID: %d\n", key_id); 1265 printf("Key Value:\n"); 1266 if (key_info.key_type == OTP_KEY_TYPE_HMAC) { 1267 buf_print(&byte_buf[key_offset], 0x40); 1268 } else if (key_info.key_type == OTP_KEY_TYPE_AES) { 1269 printf("AES Key:\n"); 1270 buf_print(&byte_buf[key_offset], 0x20); 1271 if (info_cb.version == 0) { 1272 printf("AES IV:\n"); 1273 buf_print(&byte_buf[key_offset + 0x20], 0x10); 1274 } 1275 1276 } else if (key_info.key_type == OTP_KEY_TYPE_VAULT) { 1277 if (info_cb.version == 0) { 1278 printf("AES Key:\n"); 1279 buf_print(&byte_buf[key_offset], 0x20); 1280 printf("AES IV:\n"); 1281 buf_print(&byte_buf[key_offset + 0x20], 0x10); 1282 } else if (info_cb.version == 1) { 1283 printf("AES Key 1:\n"); 1284 buf_print(&byte_buf[key_offset], 0x20); 1285 printf("AES Key 2:\n"); 1286 buf_print(&byte_buf[key_offset + 0x20], 0x20); 1287 } 1288 1289 } else if (key_info.key_type == OTP_KEY_TYPE_RSA) { 1290 printf("RSA mod:\n"); 1291 buf_print(&byte_buf[key_offset], len / 2); 1292 printf("RSA exp:\n"); 1293 buf_print(&byte_buf[key_offset + (len / 2)], len / 2); 1294 } 1295 if (last) 1296 break; 1297 i++; 1298 } 1299 return 0; 1300 } 1301 1302 static int otp_prog_conf(uint32_t *buf) 1303 { 1304 int i, k; 1305 int pass = 0; 1306 uint32_t prog_address; 1307 uint32_t data[12]; 1308 uint32_t compare[2]; 1309 uint32_t *buf_keep = &buf[12]; 1310 uint32_t data_masked; 1311 uint32_t buf_masked; 1312 1313 printf("Read OTP Config Region:\n"); 1314 1315 for (i = 0; i < 12 ; i ++) { 1316 prog_address = 0x800; 1317 prog_address |= (i / 8) * 0x200; 1318 prog_address |= (i % 8) * 0x2; 1319 otp_read_data(prog_address, &data[i]); 1320 } 1321 1322 printf("Check writable...\n"); 1323 for (i = 0; i < 12; i++) { 1324 data_masked = data[i] & ~buf_keep[i]; 1325 buf_masked = buf[i] & ~buf_keep[i]; 1326 if (data_masked == buf_masked) 1327 continue; 1328 if ((data_masked | buf_masked) == buf_masked) { 1329 continue; 1330 } else { 1331 printf("Input image can't program into OTP, please check.\n"); 1332 printf("OTPCFG[%X] = %x\n", i, data[i]); 1333 printf("Input [%X] = %x\n", i, buf[i]); 1334 printf("Mask [%X] = %x\n", i, ~buf_keep[i]); 1335 return OTP_FAILURE; 1336 } 1337 } 1338 1339 printf("Start Programing...\n"); 1340 otp_soak(0); 1341 for (i = 0; i < 12; i++) { 1342 data_masked = data[i] & ~buf_keep[i]; 1343 buf_masked = buf[i] & ~buf_keep[i]; 1344 prog_address = 0x800; 1345 prog_address |= (i / 8) * 0x200; 1346 prog_address |= (i % 8) * 0x2; 1347 if (data_masked == buf_masked) 1348 continue; 1349 1350 1351 otp_soak(1); 1352 otp_prog_dw(buf[i], buf_keep[i], prog_address); 1353 1354 pass = 0; 1355 for (k = 0; k < RETRY; k++) { 1356 if (verify_dw(prog_address, &buf[i], &buf_keep[i], compare, 1) != 0) { 1357 otp_soak(2); 1358 otp_prog_dw(compare[0], prog_address, 1); 1359 if (verify_dw(prog_address, &buf[i], &buf_keep[i], compare, 1) != 0) { 1360 otp_soak(1); 1361 } else { 1362 pass = 1; 1363 break; 1364 } 1365 } else { 1366 pass = 1; 1367 break; 1368 } 1369 } 1370 } 1371 1372 otp_soak(0); 1373 if (!pass) 1374 return OTP_FAILURE; 1375 1376 return OTP_SUCCESS; 1377 1378 } 1379 1380 1381 static int otp_strap_image_confirm(uint32_t *buf) 1382 { 1383 int i; 1384 uint32_t *strap_keep = buf + 2; 1385 uint32_t *strap_protect = buf + 4; 1386 int bit, pbit, kbit; 1387 int fail = 0; 1388 int skip = -1; 1389 struct otpstrap_status otpstrap[64]; 1390 1391 otp_strap_status(otpstrap); 1392 for (i = 0; i < 64; i++) { 1393 if (i < 32) { 1394 bit = (buf[0] >> i) & 0x1; 1395 kbit = (strap_keep[0] >> i) & 0x1; 1396 pbit = (strap_protect[0] >> i) & 0x1; 1397 } else { 1398 bit = (buf[1] >> (i - 32)) & 0x1; 1399 kbit = (strap_keep[1] >> (i - 32)) & 0x1; 1400 pbit = (strap_protect[1] >> (i - 32)) & 0x1; 1401 } 1402 1403 if (kbit == 1) { 1404 continue; 1405 } else { 1406 printf("OTPSTRAP[%X]:\n", i); 1407 } 1408 if (bit == otpstrap[i].value) { 1409 printf(" The value is same as before, skip it.\n"); 1410 if (skip == -1) 1411 skip = 1; 1412 continue; 1413 } else { 1414 skip = 0; 1415 } 1416 if (otpstrap[i].protected == 1) { 1417 printf(" This bit is protected and is not writable\n"); 1418 fail = 1; 1419 continue; 1420 } 1421 if (otpstrap[i].remain_times == 0) { 1422 printf(" This bit is no remaining times to write.\n"); 1423 fail = 1; 1424 continue; 1425 } 1426 if (pbit == 1) { 1427 printf(" This bit will be protected and become non-writable.\n"); 1428 } 1429 printf(" Write 1 to OTPSTRAP[%X] OPTION[%X], that value becomes from %d to %d.\n", i, otpstrap[i].writeable_option + 1, otpstrap[i].value, otpstrap[i].value ^ 1); 1430 } 1431 if (fail == 1) 1432 return OTP_FAILURE; 1433 else if (skip == 1) 1434 return OTP_PROG_SKIP; 1435 1436 return 0; 1437 } 1438 1439 static int otp_print_strap(int start, int count) 1440 { 1441 int i, j; 1442 struct otpstrap_status otpstrap[64]; 1443 1444 if (start < 0 || start > 64) 1445 return OTP_USAGE; 1446 1447 if ((start + count) < 0 || (start + count) > 64) 1448 return OTP_USAGE; 1449 1450 otp_strap_status(otpstrap); 1451 1452 printf("BIT(hex) Value Option Status\n"); 1453 printf("___________________________________________________________________________\n"); 1454 1455 for (i = start; i < start + count; i++) { 1456 printf("0x%-8X", i); 1457 printf("%-7d", otpstrap[i].value); 1458 for (j = 0; j < 7; j++) 1459 printf("%d ", otpstrap[i].option_array[j]); 1460 printf(" "); 1461 if (otpstrap[i].protected == 1) { 1462 printf("protected and not writable"); 1463 } else { 1464 printf("not protected "); 1465 if (otpstrap[i].remain_times == 0) { 1466 printf("and no remaining times to write."); 1467 } else { 1468 printf("and still can write %d times", otpstrap[i].remain_times); 1469 } 1470 } 1471 printf("\n"); 1472 } 1473 1474 return OTP_SUCCESS; 1475 } 1476 1477 static int otp_prog_strap(uint32_t *buf) 1478 { 1479 int i, j; 1480 uint32_t *strap_keep = buf + 2; 1481 uint32_t *strap_protect = buf + 4; 1482 uint32_t prog_bit, prog_address; 1483 int bit, pbit, kbit, offset; 1484 int fail = 0; 1485 int pass = 0; 1486 struct otpstrap_status otpstrap[64]; 1487 1488 printf("Read OTP Strap Region:\n"); 1489 otp_strap_status(otpstrap); 1490 1491 printf("Check writable...\n"); 1492 if (otp_strap_image_confirm(buf) == OTP_FAILURE) { 1493 printf("Input image can't program into OTP, please check.\n"); 1494 return OTP_FAILURE; 1495 } 1496 1497 for (i = 0; i < 64; i++) { 1498 prog_address = 0x800; 1499 if (i < 32) { 1500 offset = i; 1501 bit = (buf[0] >> offset) & 0x1; 1502 kbit = (strap_keep[0] >> offset) & 0x1; 1503 pbit = (strap_protect[0] >> offset) & 0x1; 1504 prog_address |= ((otpstrap[i].writeable_option * 2 + 16) / 8) * 0x200; 1505 prog_address |= ((otpstrap[i].writeable_option * 2 + 16) % 8) * 0x2; 1506 1507 } else { 1508 offset = (i - 32); 1509 bit = (buf[1] >> offset) & 0x1; 1510 kbit = (strap_keep[1] >> offset) & 0x1; 1511 pbit = (strap_protect[1] >> offset) & 0x1; 1512 prog_address |= ((otpstrap[i].writeable_option * 2 + 17) / 8) * 0x200; 1513 prog_address |= ((otpstrap[i].writeable_option * 2 + 17) % 8) * 0x2; 1514 } 1515 prog_bit = ~(0x1 << offset); 1516 1517 if (kbit == 1) { 1518 continue; 1519 } 1520 if (bit == otpstrap[i].value) { 1521 continue; 1522 } 1523 if (otpstrap[i].protected == 1) { 1524 fail = 1; 1525 continue; 1526 } 1527 if (otpstrap[i].remain_times == 0) { 1528 fail = 1; 1529 continue; 1530 } 1531 1532 1533 otp_soak(1); 1534 otp_prog(prog_address, prog_bit); 1535 1536 pass = 0; 1537 for (j = 0; j < RETRY; j++) { 1538 if (verify_bit(prog_address, offset, 1) != 0) { 1539 otp_soak(2); 1540 otp_prog(prog_address, prog_bit); 1541 if (verify_bit(prog_address, offset, 1) != 0) { 1542 otp_soak(1); 1543 } else { 1544 pass = 1; 1545 break; 1546 } 1547 } else { 1548 pass = 1; 1549 break; 1550 } 1551 } 1552 if (!pass) 1553 return OTP_FAILURE; 1554 1555 if (pbit == 0) 1556 continue; 1557 prog_address = 0x800; 1558 if (i < 32) 1559 prog_address |= 0x60c; 1560 else 1561 prog_address |= 0x60e; 1562 1563 1564 otp_soak(1); 1565 otp_prog(prog_address, prog_bit); 1566 1567 pass = 0; 1568 for (j = 0; j < RETRY; j++) { 1569 if (verify_bit(prog_address, offset, 1) != 0) { 1570 otp_soak(2); 1571 otp_prog(prog_address, prog_bit); 1572 if (verify_bit(prog_address, offset, 1) != 0) { 1573 otp_soak(1); 1574 } else { 1575 pass = 1; 1576 break; 1577 } 1578 } else { 1579 pass = 1; 1580 break; 1581 } 1582 } 1583 if (!pass) 1584 return OTP_FAILURE; 1585 1586 } 1587 otp_soak(0); 1588 if (fail == 1) 1589 return OTP_FAILURE; 1590 else 1591 return OTP_SUCCESS; 1592 1593 } 1594 1595 static void otp_prog_bit(uint32_t value, uint32_t prog_address, uint32_t bit_offset) 1596 { 1597 int prog_bit; 1598 1599 if (prog_address % 2 == 0) { 1600 if (value) 1601 prog_bit = ~(0x1 << bit_offset); 1602 else 1603 return; 1604 } else { 1605 prog_address |= 1 << 15; 1606 if (!value) 1607 prog_bit = 0x1 << bit_offset; 1608 else 1609 return; 1610 } 1611 otp_prog(prog_address, prog_bit); 1612 } 1613 1614 static int otp_prog_data(uint32_t *buf) 1615 { 1616 int i; 1617 int ret; 1618 uint32_t data[2048]; 1619 uint32_t *buf_keep = &buf[2048]; 1620 1621 uint32_t data_masked; 1622 uint32_t buf_masked; 1623 1624 printf("Read OTP Data:\n"); 1625 1626 for (i = 0; i < 2046 ; i += 2) { 1627 otp_read_data(i, &data[i]); 1628 } 1629 1630 1631 printf("Check writable...\n"); 1632 // ignore last two dw, the last two dw is used for slt otp write check. 1633 for (i = 0; i < 2046; i++) { 1634 data_masked = data[i] & ~buf_keep[i]; 1635 buf_masked = buf[i] & ~buf_keep[i]; 1636 if (data_masked == buf_masked) 1637 continue; 1638 if (i % 2 == 0) { 1639 if ((data_masked | buf_masked) == buf_masked) { 1640 continue; 1641 } else { 1642 printf("Input image can't program into OTP, please check.\n"); 1643 printf("OTP_ADDR[%x] = %x\n", i, data[i]); 1644 printf("Input [%x] = %x\n", i, buf[i]); 1645 printf("Mask [%x] = %x\n", i, ~buf_keep[i]); 1646 return OTP_FAILURE; 1647 } 1648 } else { 1649 if ((data_masked & buf_masked) == buf_masked) { 1650 continue; 1651 } else { 1652 printf("Input image can't program into OTP, please check.\n"); 1653 printf("OTP_ADDR[%x] = %x\n", i, data[i]); 1654 printf("Input [%x] = %x\n", i, buf[i]); 1655 printf("Mask [%x] = %x\n", i, ~buf_keep[i]); 1656 return OTP_FAILURE; 1657 } 1658 } 1659 } 1660 1661 printf("Start Programing...\n"); 1662 1663 // programing ecc region first 1664 for (i = 1792; i < 2046; i += 2) { 1665 ret = otp_prog_verify_2dw(&data[i], &buf[i], &buf_keep[i], i); 1666 if (ret != OTP_SUCCESS) { 1667 printf("address: %08x, data: %08x %08x, buffer: %08x %08x, mask: %08x %08x\n", 1668 i, data[i], data[i + 1], buf[i], buf[i + 1], buf_keep[i], buf_keep[i + 1]); 1669 return ret; 1670 } 1671 } 1672 1673 for (i = 0; i < 1792; i += 2) { 1674 ret = otp_prog_verify_2dw(&data[i], &buf[i], &buf_keep[i], i); 1675 if (ret != OTP_SUCCESS) { 1676 printf("address: %08x, data: %08x %08x, buffer: %08x %08x, mask: %08x %08x\n", 1677 i, data[i], data[i + 1], buf[i], buf[i + 1], buf_keep[i], buf_keep[i + 1]); 1678 return ret; 1679 } 1680 } 1681 otp_soak(0); 1682 return OTP_SUCCESS; 1683 1684 } 1685 1686 static int do_otp_prog(int addr, int byte_size, int nconfirm) 1687 { 1688 int ret; 1689 int mode = 0; 1690 int image_version = 0; 1691 uint32_t *buf; 1692 uint32_t *data_region = NULL; 1693 uint32_t *conf_region = NULL; 1694 uint32_t *strap_region = NULL; 1695 1696 buf = map_physmem(addr, byte_size, MAP_WRBACK); 1697 if (!buf) { 1698 puts("Failed to map physical memory\n"); 1699 return OTP_FAILURE; 1700 } 1701 1702 image_version = buf[0] & 0x3; 1703 if (image_version != info_cb.version) { 1704 puts("Version is not match\n"); 1705 return OTP_FAILURE; 1706 } 1707 1708 if (buf[0] & BIT(29)) { 1709 mode |= OTP_REGION_DATA; 1710 data_region = &buf[36]; 1711 } 1712 if (buf[0] & BIT(30)) { 1713 mode |= OTP_REGION_CONF; 1714 conf_region = &buf[12]; 1715 } 1716 if (buf[0] & BIT(31)) { 1717 mode |= OTP_REGION_STRAP; 1718 strap_region = &buf[4]; 1719 } 1720 1721 if (!nconfirm) { 1722 if (mode & OTP_REGION_DATA) { 1723 printf("\nOTP data region :\n"); 1724 if (otp_print_data_info(data_region) < 0) { 1725 printf("OTP data error, please check.\n"); 1726 return OTP_FAILURE; 1727 } 1728 } 1729 if (mode & OTP_REGION_STRAP) { 1730 printf("\nOTP strap region :\n"); 1731 if (otp_print_strap_image(strap_region) < 0) { 1732 printf("OTP strap error, please check.\n"); 1733 return OTP_FAILURE; 1734 } 1735 } 1736 if (mode & OTP_REGION_CONF) { 1737 printf("\nOTP configuration region :\n"); 1738 if (otp_print_conf_image(conf_region) < 0) { 1739 printf("OTP config error, please check.\n"); 1740 return OTP_FAILURE; 1741 } 1742 } 1743 1744 printf("type \"YES\" (no quotes) to continue:\n"); 1745 if (!confirm_yesno()) { 1746 printf(" Aborting\n"); 1747 return OTP_FAILURE; 1748 } 1749 } 1750 1751 if (mode & OTP_REGION_DATA) { 1752 printf("programing data region ...\n"); 1753 ret = otp_prog_data(data_region); 1754 if (ret != 0) { 1755 printf("Error\n"); 1756 return ret; 1757 } else { 1758 printf("Done\n"); 1759 } 1760 } 1761 if (mode & OTP_REGION_STRAP) { 1762 printf("programing strap region ...\n"); 1763 ret = otp_prog_strap(strap_region); 1764 if (ret != 0) { 1765 printf("Error\n"); 1766 return ret; 1767 } else { 1768 printf("Done\n"); 1769 } 1770 } 1771 if (mode & OTP_REGION_CONF) { 1772 printf("programing configuration region ...\n"); 1773 ret = otp_prog_conf(conf_region); 1774 if (ret != 0) { 1775 printf("Error\n"); 1776 return ret; 1777 } 1778 printf("Done\n"); 1779 } 1780 1781 return OTP_SUCCESS; 1782 } 1783 1784 static int do_otp_prog_bit(int mode, int otp_dw_offset, int bit_offset, int value, int nconfirm) 1785 { 1786 uint32_t read[2]; 1787 uint32_t strap_buf[6]; 1788 uint32_t prog_address = 0; 1789 struct otpstrap_status otpstrap[64]; 1790 int otp_bit; 1791 int i; 1792 int pass; 1793 int ret; 1794 1795 switch (mode) { 1796 case OTP_REGION_CONF: 1797 otp_read_config(otp_dw_offset, read); 1798 prog_address = 0x800; 1799 prog_address |= (otp_dw_offset / 8) * 0x200; 1800 prog_address |= (otp_dw_offset % 8) * 0x2; 1801 otp_bit = (read[0] >> bit_offset) & 0x1; 1802 if (otp_bit == value) { 1803 printf("OTPCFG%X[%X] = %d\n", otp_dw_offset, bit_offset, value); 1804 printf("No need to program\n"); 1805 return OTP_SUCCESS; 1806 } 1807 if (otp_bit == 1 && value == 0) { 1808 printf("OTPCFG%X[%X] = 1\n", otp_dw_offset, bit_offset); 1809 printf("OTP is programed, which can't be clean\n"); 1810 return OTP_FAILURE; 1811 } 1812 printf("Program OTPCFG%X[%X] to 1\n", otp_dw_offset, bit_offset); 1813 break; 1814 case OTP_REGION_DATA: 1815 prog_address = otp_dw_offset; 1816 1817 if (otp_dw_offset % 2 == 0) { 1818 otp_read_data(otp_dw_offset, read); 1819 otp_bit = (read[0] >> bit_offset) & 0x1; 1820 1821 if (otp_bit == 1 && value == 0) { 1822 printf("OTPDATA%X[%X] = 1\n", otp_dw_offset, bit_offset); 1823 printf("OTP is programed, which can't be cleaned\n"); 1824 return OTP_FAILURE; 1825 } 1826 } else { 1827 otp_read_data(otp_dw_offset - 1, read); 1828 otp_bit = (read[1] >> bit_offset) & 0x1; 1829 1830 if (otp_bit == 0 && value == 1) { 1831 printf("OTPDATA%X[%X] = 1\n", otp_dw_offset, bit_offset); 1832 printf("OTP is programed, which can't be writen\n"); 1833 return OTP_FAILURE; 1834 } 1835 } 1836 if (otp_bit == value) { 1837 printf("OTPDATA%X[%X] = %d\n", otp_dw_offset, bit_offset, value); 1838 printf("No need to program\n"); 1839 return OTP_SUCCESS; 1840 } 1841 1842 printf("Program OTPDATA%X[%X] to 1\n", otp_dw_offset, bit_offset); 1843 break; 1844 case OTP_REGION_STRAP: 1845 otp_strap_status(otpstrap); 1846 otp_print_strap(bit_offset, 1); 1847 if (bit_offset < 32) { 1848 strap_buf[0] = value << bit_offset; 1849 strap_buf[1] = 0; 1850 strap_buf[2] = ~BIT(bit_offset); 1851 strap_buf[3] = ~0; 1852 strap_buf[4] = 0; 1853 strap_buf[5] = 0; 1854 } else { 1855 strap_buf[0] = 0; 1856 strap_buf[1] = value << (bit_offset - 32); 1857 strap_buf[2] = ~0; 1858 strap_buf[3] = ~BIT(bit_offset - 32); 1859 strap_buf[4] = 0; 1860 strap_buf[5] = 0; 1861 } 1862 ret = otp_strap_image_confirm(strap_buf); 1863 if (ret == OTP_FAILURE) 1864 return OTP_FAILURE; 1865 else if (ret == OTP_PROG_SKIP) 1866 return OTP_SUCCESS; 1867 1868 break; 1869 } 1870 1871 if (!nconfirm) { 1872 printf("type \"YES\" (no quotes) to continue:\n"); 1873 if (!confirm_yesno()) { 1874 printf(" Aborting\n"); 1875 return OTP_FAILURE; 1876 } 1877 } 1878 1879 switch (mode) { 1880 case OTP_REGION_STRAP: 1881 return otp_prog_strap(strap_buf); 1882 case OTP_REGION_CONF: 1883 case OTP_REGION_DATA: 1884 otp_soak(1); 1885 otp_prog_bit(value, prog_address, bit_offset); 1886 pass = 0; 1887 1888 for (i = 0; i < RETRY; i++) { 1889 if (verify_bit(prog_address, bit_offset, value) != 0) { 1890 otp_soak(2); 1891 otp_prog_bit(value, prog_address, bit_offset); 1892 if (verify_bit(prog_address, bit_offset, value) != 0) { 1893 otp_soak(1); 1894 } else { 1895 pass = 1; 1896 break; 1897 } 1898 } else { 1899 pass = 1; 1900 break; 1901 } 1902 } 1903 1904 otp_soak(0); 1905 if (pass) { 1906 printf("SUCCESS\n"); 1907 return OTP_SUCCESS; 1908 } else { 1909 printf("OTP cannot be programed\n"); 1910 printf("FAILED\n"); 1911 return OTP_FAILURE; 1912 } 1913 } 1914 1915 return OTP_USAGE; 1916 } 1917 1918 static int do_otpread(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) 1919 { 1920 uint32_t offset, count; 1921 int ret; 1922 1923 if (argc == 4) { 1924 offset = simple_strtoul(argv[2], NULL, 16); 1925 count = simple_strtoul(argv[3], NULL, 16); 1926 } else if (argc == 3) { 1927 offset = simple_strtoul(argv[2], NULL, 16); 1928 count = 1; 1929 } else { 1930 return CMD_RET_USAGE; 1931 } 1932 1933 1934 if (!strcmp(argv[1], "conf")) { 1935 writel(OTP_PASSWD, OTP_PROTECT_KEY); //password 1936 ret = otp_print_config(offset, count); 1937 } else if (!strcmp(argv[1], "data")) { 1938 writel(OTP_PASSWD, OTP_PROTECT_KEY); //password 1939 ret = otp_print_data(offset, count); 1940 } else if (!strcmp(argv[1], "strap")) { 1941 writel(OTP_PASSWD, OTP_PROTECT_KEY); //password 1942 ret = otp_print_strap(offset, count); 1943 } else { 1944 return CMD_RET_USAGE; 1945 } 1946 1947 if (ret == OTP_SUCCESS) 1948 return CMD_RET_SUCCESS; 1949 else 1950 return CMD_RET_USAGE; 1951 1952 } 1953 1954 static int do_otpprog(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) 1955 { 1956 phys_addr_t addr; 1957 uint32_t byte_size; 1958 int ret; 1959 1960 if (argc == 4) { 1961 if (strcmp(argv[1], "o")) 1962 return CMD_RET_USAGE; 1963 addr = simple_strtoul(argv[2], NULL, 16); 1964 byte_size = simple_strtoul(argv[3], NULL, 16); 1965 writel(OTP_PASSWD, OTP_PROTECT_KEY); //password 1966 ret = do_otp_prog(addr, byte_size, 1); 1967 } else if (argc == 3) { 1968 addr = simple_strtoul(argv[1], NULL, 16); 1969 byte_size = simple_strtoul(argv[2], NULL, 16); 1970 writel(OTP_PASSWD, OTP_PROTECT_KEY); //password 1971 ret = do_otp_prog(addr, byte_size, 0); 1972 } else { 1973 return CMD_RET_USAGE; 1974 } 1975 1976 if (ret == OTP_SUCCESS) 1977 return CMD_RET_SUCCESS; 1978 else if (ret == OTP_FAILURE) 1979 return CMD_RET_FAILURE; 1980 else 1981 return CMD_RET_USAGE; 1982 } 1983 1984 static int do_otppb(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) 1985 { 1986 int mode = 0; 1987 int nconfirm = 0; 1988 int otp_addr = 0; 1989 int bit_offset; 1990 int value; 1991 int ret; 1992 1993 if (argc != 4 && argc != 5 && argc != 6) 1994 return CMD_RET_USAGE; 1995 1996 /* Drop the pb cmd */ 1997 argc--; 1998 argv++; 1999 2000 if (!strcmp(argv[0], "conf")) 2001 mode = OTP_REGION_CONF; 2002 else if (!strcmp(argv[0], "strap")) 2003 mode = OTP_REGION_STRAP; 2004 else if (!strcmp(argv[0], "data")) 2005 mode = OTP_REGION_DATA; 2006 else 2007 return CMD_RET_USAGE; 2008 2009 /* Drop the region cmd */ 2010 argc--; 2011 argv++; 2012 2013 if (!strcmp(argv[0], "o")) { 2014 nconfirm = 1; 2015 /* Drop the force option */ 2016 argc--; 2017 argv++; 2018 } 2019 2020 if (mode == OTP_REGION_STRAP) { 2021 bit_offset = simple_strtoul(argv[0], NULL, 16); 2022 value = simple_strtoul(argv[1], NULL, 16); 2023 if (bit_offset >= 64 || (value != 0 && value != 1)) 2024 return CMD_RET_USAGE; 2025 } else { 2026 otp_addr = simple_strtoul(argv[0], NULL, 16); 2027 bit_offset = simple_strtoul(argv[1], NULL, 16); 2028 value = simple_strtoul(argv[2], NULL, 16); 2029 if (bit_offset >= 32 || (value != 0 && value != 1)) 2030 return CMD_RET_USAGE; 2031 if (mode == OTP_REGION_DATA) { 2032 if (otp_addr >= 0x800) 2033 return CMD_RET_USAGE; 2034 } else { 2035 if (otp_addr >= 0x20) 2036 return CMD_RET_USAGE; 2037 } 2038 } 2039 if (value != 0 && value != 1) 2040 return CMD_RET_USAGE; 2041 2042 writel(OTP_PASSWD, OTP_PROTECT_KEY); //password 2043 ret = do_otp_prog_bit(mode, otp_addr, bit_offset, value, nconfirm); 2044 2045 if (ret == OTP_SUCCESS) 2046 return CMD_RET_SUCCESS; 2047 else if (ret == OTP_FAILURE) 2048 return CMD_RET_FAILURE; 2049 else 2050 return CMD_RET_USAGE; 2051 } 2052 2053 static int do_otpcmp(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) 2054 { 2055 phys_addr_t addr; 2056 int otp_addr = 0; 2057 2058 if (argc != 3) 2059 return CMD_RET_USAGE; 2060 2061 writel(OTP_PASSWD, OTP_PROTECT_KEY); //password 2062 addr = simple_strtoul(argv[1], NULL, 16); 2063 otp_addr = simple_strtoul(argv[2], NULL, 16); 2064 if (otp_compare(otp_addr, addr) == 0) { 2065 printf("Compare pass\n"); 2066 return CMD_RET_SUCCESS; 2067 } else { 2068 printf("Compare fail\n"); 2069 return CMD_RET_FAILURE; 2070 } 2071 } 2072 2073 static int do_otpinfo(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) 2074 { 2075 int view = 0; 2076 int input; 2077 2078 if (argc != 2 && argc != 3) 2079 return CMD_RET_USAGE; 2080 2081 if (!strcmp(argv[1], "conf")) { 2082 2083 writel(OTP_PASSWD, OTP_PROTECT_KEY); //password 2084 if (argc == 3) { 2085 input = simple_strtoul(argv[2], NULL, 16); 2086 otp_print_conf_info(input); 2087 } else { 2088 otp_print_conf_info(-1); 2089 } 2090 } else if (!strcmp(argv[1], "strap")) { 2091 if (!strcmp(argv[2], "v")) { 2092 view = 1; 2093 /* Drop the view option */ 2094 argc--; 2095 argv++; 2096 } 2097 writel(OTP_PASSWD, OTP_PROTECT_KEY); //password 2098 otp_print_strap_info(view); 2099 } else { 2100 return CMD_RET_USAGE; 2101 } 2102 2103 return CMD_RET_SUCCESS; 2104 } 2105 2106 static int do_otpprotect(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) 2107 { 2108 int input; 2109 int bit_offset; 2110 int prog_address; 2111 int pass; 2112 int i; 2113 if (argc != 3 && argc != 2) 2114 return CMD_RET_USAGE; 2115 2116 if (!strcmp(argv[0], "o")) { 2117 input = simple_strtoul(argv[2], NULL, 16); 2118 } else { 2119 input = simple_strtoul(argv[1], NULL, 16); 2120 printf("OTPSTRAP[%d] will be protected\n", input); 2121 printf("type \"YES\" (no quotes) to continue:\n"); 2122 if (!confirm_yesno()) { 2123 printf(" Aborting\n"); 2124 return CMD_RET_FAILURE; 2125 } 2126 } 2127 2128 prog_address = 0x800; 2129 if (input < 32) { 2130 bit_offset = input; 2131 prog_address |= 0x60c; 2132 } else if (input < 64) { 2133 bit_offset = input - 32; 2134 prog_address |= 0x60e; 2135 } else { 2136 return CMD_RET_USAGE; 2137 } 2138 2139 if (verify_bit(prog_address, bit_offset, 1) == 0) { 2140 printf("OTPSTRAP[%d] already protected\n", input); 2141 } 2142 2143 otp_soak(1); 2144 otp_prog_bit(1, prog_address, bit_offset); 2145 pass = 0; 2146 2147 for (i = 0; i < RETRY; i++) { 2148 if (verify_bit(prog_address, bit_offset, 1) != 0) { 2149 otp_soak(2); 2150 otp_prog_bit(1, prog_address, bit_offset); 2151 if (verify_bit(prog_address, bit_offset, 1) != 0) { 2152 otp_soak(1); 2153 } else { 2154 pass = 1; 2155 break; 2156 } 2157 } else { 2158 pass = 1; 2159 break; 2160 } 2161 } 2162 otp_soak(0); 2163 if (pass) { 2164 printf("OTPSTRAP[%d] is protected\n", input); 2165 return CMD_RET_SUCCESS; 2166 } 2167 2168 printf("Protect OTPSTRAP[%d] fail\n", input); 2169 return CMD_RET_FAILURE; 2170 2171 } 2172 2173 static cmd_tbl_t cmd_otp[] = { 2174 U_BOOT_CMD_MKENT(read, 4, 0, do_otpread, "", ""), 2175 U_BOOT_CMD_MKENT(info, 3, 0, do_otpinfo, "", ""), 2176 U_BOOT_CMD_MKENT(prog, 4, 0, do_otpprog, "", ""), 2177 U_BOOT_CMD_MKENT(pb, 6, 0, do_otppb, "", ""), 2178 U_BOOT_CMD_MKENT(protect, 3, 0, do_otpprotect, "", ""), 2179 U_BOOT_CMD_MKENT(cmp, 3, 0, do_otpcmp, "", ""), 2180 }; 2181 2182 static int do_ast_otp(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) 2183 { 2184 cmd_tbl_t *cp; 2185 2186 cp = find_cmd_tbl(argv[1], cmd_otp, ARRAY_SIZE(cmd_otp)); 2187 2188 /* Drop the otp command */ 2189 argc--; 2190 argv++; 2191 2192 if (cp == NULL || argc > cp->maxargs) 2193 return CMD_RET_USAGE; 2194 if (flag == CMD_FLAG_REPEAT && !cmd_is_repeatable(cp)) 2195 return CMD_RET_SUCCESS; 2196 2197 if (chip_version() == 0) { 2198 info_cb.version = 0; 2199 info_cb.conf_info = a0_conf_info; 2200 info_cb.conf_info_len = ARRAY_SIZE(a0_conf_info); 2201 info_cb.strap_info = a0_strap_info; 2202 info_cb.strap_info_len = ARRAY_SIZE(a0_strap_info); 2203 info_cb.key_info = a0_key_type; 2204 info_cb.key_info_len = ARRAY_SIZE(a0_key_type); 2205 } else if (chip_version() == 1) { 2206 info_cb.version = 1; 2207 info_cb.conf_info = a1_conf_info; 2208 info_cb.conf_info_len = ARRAY_SIZE(a1_conf_info); 2209 info_cb.strap_info = a1_strap_info; 2210 info_cb.strap_info_len = ARRAY_SIZE(a1_strap_info); 2211 info_cb.key_info = a1_key_type; 2212 info_cb.key_info_len = ARRAY_SIZE(a1_key_type); 2213 } 2214 2215 return cp->cmd(cmdtp, flag, argc, argv); 2216 } 2217 2218 U_BOOT_CMD( 2219 otp, 7, 0, do_ast_otp, 2220 "ASPEED One-Time-Programmable sub-system", 2221 "read conf|data <otp_dw_offset> <dw_count>\n" 2222 "otp read strap <strap_bit_offset> <bit_count>\n" 2223 "otp info strap [v]\n" 2224 "otp info conf [otp_dw_offset]\n" 2225 "otp prog [o] <addr> <byte_size>\n" 2226 "otp pb conf|data [o] <otp_dw_offset> <bit_offset> <value>\n" 2227 "otp pb strap [o] <bit_offset> <value>\n" 2228 "otp protect [o] <bit_offset>\n" 2229 "otp cmp <addr> <otp_dw_offset>\n" 2230 ); 2231