1 /* 2 * This program is distributed in the hope that it will be useful, 3 * but WITHOUT ANY WARRANTY; without even the implied warranty of 4 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 5 * GNU General Public License for more details. 6 * 7 * You should have received a copy of the GNU General Public License 8 * along with this program; if not, write to the Free Software 9 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 10 */ 11 #include <stdlib.h> 12 #include <common.h> 13 #include <console.h> 14 #include <bootretry.h> 15 #include <cli.h> 16 #include <command.h> 17 #include <console.h> 18 #include <malloc.h> 19 #include <inttypes.h> 20 #include <mapmem.h> 21 #include <asm/io.h> 22 #include <linux/compiler.h> 23 24 DECLARE_GLOBAL_DATA_PTR; 25 26 #define OTP_PASSWD 0x349fe38a 27 #define RETRY 3 28 #define OTP_REGION_STRAP BIT(0) 29 #define OTP_REGION_CONF BIT(1) 30 #define OTP_REGION_DATA BIT(2) 31 32 #define OTP_USAGE -1 33 #define OTP_FAILURE -2 34 #define OTP_SUCCESS 0 35 36 #define OTP_PROG_SKIP 1 37 38 #define OTP_KEY_TYPE_RSA 1 39 #define OTP_KEY_TYPE_AES 2 40 #define OTP_KEY_TYPE_VAULT 3 41 #define OTP_KEY_TYPE_HMAC 4 42 43 44 #define OTP_REG_RESERVED -1 45 #define OTP_REG_VALUE -2 46 #define OTP_REG_VALID_BIT -3 47 48 #define PBSTR "||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||" 49 #define PBWIDTH 60 50 51 #define OTP_BASE 0x1e6f2000 52 #define OTP_PROTECT_KEY OTP_BASE 53 #define OTP_COMMAND OTP_BASE + 0x4 54 #define OTP_TIMING OTP_BASE + 0x8 55 #define OTP_ADDR OTP_BASE + 0x10 56 #define OTP_STATUS OTP_BASE + 0x14 57 #define OTP_COMPARE_1 OTP_BASE + 0x20 58 #define OTP_COMPARE_2 OTP_BASE + 0x24 59 #define OTP_COMPARE_3 OTP_BASE + 0x28 60 #define OTP_COMPARE_4 OTP_BASE + 0x2c 61 62 struct otpstrap_status { 63 int value; 64 int option_array[7]; 65 int remain_times; 66 int writeable_option; 67 int protected; 68 }; 69 70 struct otpconf_parse { 71 int dw_offset; 72 int bit; 73 int length; 74 int value; 75 int keep; 76 char status[80]; 77 }; 78 79 struct otpstrap_info { 80 int8_t bit_offset; 81 int8_t length; 82 int8_t value; 83 char *information; 84 }; 85 86 struct otpconf_info { 87 int8_t dw_offset; 88 int8_t bit_offset; 89 int8_t length; 90 int8_t value; 91 char *information; 92 }; 93 94 struct otpkey_type { 95 int value; 96 int key_type; 97 int need_id; 98 char information[110]; 99 }; 100 101 struct otp_info_cb { 102 int version; 103 const struct otpstrap_info *strap_info; 104 int strap_info_len; 105 const struct otpconf_info *conf_info; 106 int conf_info_len; 107 const struct otpkey_type *key_info; 108 int key_info_len; 109 }; 110 111 void printProgress(int numerator, int denominator, char *format, ...) 112 { 113 int val = numerator * 100 / denominator; 114 int lpad = numerator * PBWIDTH / denominator; 115 int rpad = PBWIDTH - lpad; 116 char buffer[256]; 117 va_list aptr; 118 119 va_start(aptr, format); 120 vsprintf(buffer, format, aptr); 121 va_end(aptr); 122 123 printf("\r%3d%% [%.*s%*s] %s", val, lpad, PBSTR, rpad, "", buffer); 124 if (numerator == denominator) 125 printf("\n"); 126 } 127 128 static struct otp_info_cb info_cb; 129 130 static const struct otpstrap_info a0_strap_info[] = { 131 { 0, 1, 0, "Disable secure boot" }, 132 { 0, 1, 1, "Enable secure boot" }, 133 { 1, 1, 0, "Disable boot from eMMC" }, 134 { 1, 1, 1, "Enable boot from eMMC" }, 135 { 2, 1, 0, "Disable Boot from debug SPI" }, 136 { 2, 1, 1, "Enable Boot from debug SPI" }, 137 { 3, 1, 0, "Enable ARM CM3" }, 138 { 3, 1, 1, "Disable ARM CM3" }, 139 { 4, 1, 0, "No VGA BIOS ROM, VGA BIOS is merged in the system BIOS" }, 140 { 4, 1, 1, "Enable dedicated VGA BIOS ROM" }, 141 { 5, 1, 0, "MAC 1 : RMII/NCSI" }, 142 { 5, 1, 1, "MAC 1 : RGMII" }, 143 { 6, 1, 0, "MAC 2 : RMII/NCSI" }, 144 { 6, 1, 1, "MAC 2 : RGMII" }, 145 { 7, 3, 0, "CPU Frequency : 1GHz" }, 146 { 7, 3, 1, "CPU Frequency : 800MHz" }, 147 { 7, 3, 2, "CPU Frequency : 1.2GHz" }, 148 { 7, 3, 3, "CPU Frequency : 1.4GHz" }, 149 { 10, 2, 0, "HCLK ratio AXI:AHB = 2:1" }, 150 { 10, 2, 1, "HCLK ratio AXI:AHB = 2:1" }, 151 { 10, 2, 2, "HCLK ratio AXI:AHB = 3:1" }, 152 { 10, 2, 3, "HCLK ratio AXI:AHB = 4:1" }, 153 { 12, 2, 0, "VGA memory size : 8MB" }, 154 { 12, 2, 1, "VGA memory size : 16MB" }, 155 { 12, 2, 2, "VGA memory size : 32MB" }, 156 { 12, 2, 3, "VGA memory size : 64MB" }, 157 { 14, 3, OTP_REG_RESERVED, "" }, 158 { 17, 1, 0, "VGA class code : Class Code for video device" }, 159 { 17, 1, 1, "VGA class code : Class Code for VGA device" }, 160 { 18, 1, 0, "Enable debug interfaces 0" }, 161 { 18, 1, 1, "Disable debug interfaces 0" }, 162 { 19, 1, 0, "Boot from emmc mode : High eMMC speed" }, 163 { 19, 1, 1, "Boot from emmc mode : Normal eMMC speed" }, 164 { 20, 1, 0, "Enable Pcie EHCI device" }, 165 { 20, 1, 1, "Disable Pcie EHCI device" }, 166 { 21, 1, 0, "Enable VGA XDMA function" }, 167 { 21, 1, 1, "Disable VGA XDMA function" }, 168 { 22, 1, 0, "Normal BMC mode" }, 169 { 22, 1, 1, "Disable dedicated BMC functions for non-BMC application" }, 170 { 23, 1, 0, "SSPRST# pin is for secondary processor dedicated reset pin" }, 171 { 23, 1, 1, "SSPRST# pin is for PCIE root complex dedicated reset pin" }, 172 { 24, 1, 0, "DRAM types : DDR4" }, 173 { 24, 1, 1, "DRAM types : DDR3" }, 174 { 25, 5, OTP_REG_RESERVED, "" }, 175 { 30, 2, OTP_REG_RESERVED, "" }, 176 { 32, 1, 0, "MAC 3 : RMII/NCSI" }, 177 { 32, 1, 1, "MAC 3 : RGMII" }, 178 { 33, 1, 0, "MAC 4 : RMII/NCSI" }, 179 { 33, 1, 1, "MAC 4 : RGMII" }, 180 { 34, 1, 0, "SuperIO configuration address : 0x2E" }, 181 { 34, 1, 1, "SuperIO configuration address : 0x4E" }, 182 { 35, 1, 0, "Enable LPC to decode SuperIO" }, 183 { 35, 1, 1, "Disable LPC to decode SuperIO" }, 184 { 36, 1, 0, "Enable debug interfaces 1" }, 185 { 36, 1, 1, "Disable debug interfaces 1" }, 186 { 37, 1, 0, "Disable ACPI function" }, 187 { 37, 1, 1, "Enable ACPI function" }, 188 { 38, 1, 0, "Enable eSPI mode" }, 189 { 38, 1, 1, "Enable LPC mode" }, 190 { 39, 1, 0, "Enable SAFS mode" }, 191 { 39, 1, 1, "Enable SAFS mode" }, 192 { 40, 2, OTP_REG_RESERVED, "" }, 193 { 42, 1, 0, "Disable boot SPI 3B/4B address mode auto detection" }, 194 { 42, 1, 1, "Enable boot SPI 3B/4B address mode auto detection" }, 195 { 43, 1, 0, "Disable boot SPI ABR" }, 196 { 43, 1, 1, "Enable boot SPI ABR" }, 197 { 44, 1, 0, "Boot SPI ABR mode : dual SPI flash" }, 198 { 44, 1, 1, "Boot SPI ABR mode : single SPI flash" }, 199 { 45, 3, 0, "Boot SPI flash size : no define size" }, 200 { 45, 3, 1, "Boot SPI flash size : 2MB" }, 201 { 45, 3, 2, "Boot SPI flash size : 4MB" }, 202 { 45, 3, 3, "Boot SPI flash size : 8MB" }, 203 { 45, 3, 4, "Boot SPI flash size : 16MB" }, 204 { 45, 3, 5, "Boot SPI flash size : 32MB" }, 205 { 45, 3, 6, "Boot SPI flash size : 64MB" }, 206 { 45, 3, 7, "Boot SPI flash size : 128MB" }, 207 { 48, 1, 0, "Disable host SPI ABR" }, 208 { 48, 1, 1, "Enable host SPI ABR" }, 209 { 49, 1, 0, "Disable host SPI ABR mode select pin" }, 210 { 49, 1, 1, "Enable host SPI ABR mode select pin" }, 211 { 50, 1, 0, "Host SPI ABR mode : dual SPI flash" }, 212 { 50, 1, 1, "Host SPI ABR mode : single SPI flash" }, 213 { 51, 3, 0, "Host SPI flash size : no define size" }, 214 { 51, 3, 1, "Host SPI flash size : 2MB" }, 215 { 51, 3, 2, "Host SPI flash size : 4MB" }, 216 { 51, 3, 3, "Host SPI flash size : 8MB" }, 217 { 51, 3, 4, "Host SPI flash size : 16MB" }, 218 { 51, 3, 5, "Host SPI flash size : 32MB" }, 219 { 51, 3, 6, "Host SPI flash size : 64MB" }, 220 { 51, 3, 7, "Host SPI flash size : 128MB" }, 221 { 54, 1, 0, "Disable boot SPI auxiliary control pins" }, 222 { 54, 1, 1, "Enable boot SPI auxiliary control pins" }, 223 { 55, 2, 0, "Boot SPI CRTM size : disable CRTM" }, 224 { 55, 2, 1, "Boot SPI CRTM size : 256KB" }, 225 { 55, 2, 2, "Boot SPI CRTM size : 512KB" }, 226 { 55, 2, 3, "Boot SPI CRTM size : 1MB" }, 227 { 57, 2, 0, "Host SPI CRTM size : disable CRTM" }, 228 { 57, 2, 1, "Host SPI CRTM size : 256KB" }, 229 { 57, 2, 2, "Host SPI CRTM size : 512KB" }, 230 { 57, 2, 3, "Host SPI CRTM size : 1MB" }, 231 { 59, 1, 0, "Disable host SPI auxiliary control pins" }, 232 { 59, 1, 1, "Enable host SPI auxiliary control pins" }, 233 { 60, 1, 0, "Disable GPIO pass through" }, 234 { 60, 1, 1, "Enable GPIO pass through" }, 235 { 61, 1, 0, "Enable low security secure boot key" }, 236 { 61, 1, 1, "Disable low security secure boot key" }, 237 { 62, 1, 0, "Disable dedicate GPIO strap pins" }, 238 { 62, 1, 1, "Enable dedicate GPIO strap pins" }, 239 { 63, 1, OTP_REG_RESERVED, "" } 240 }; 241 242 static const struct otpstrap_info a1_strap_info[] = { 243 { 0, 1, 0, "Disable secure boot" }, 244 { 0, 1, 1, "Enable secure boot" }, 245 { 1, 1, 0, "Disable boot from eMMC" }, 246 { 1, 1, 1, "Enable boot from eMMC" }, 247 { 2, 1, 0, "Disable Boot from debug SPI" }, 248 { 2, 1, 1, "Enable Boot from debug SPI" }, 249 { 3, 1, 0, "Enable ARM CM3" }, 250 { 3, 1, 1, "Disable ARM CM3" }, 251 { 4, 1, 0, "No VGA BIOS ROM, VGA BIOS is merged in the system BIOS" }, 252 { 4, 1, 1, "Enable dedicated VGA BIOS ROM" }, 253 { 5, 1, 0, "MAC 1 : RMII/NCSI" }, 254 { 5, 1, 1, "MAC 1 : RGMII" }, 255 { 6, 1, 0, "MAC 2 : RMII/NCSI" }, 256 { 6, 1, 1, "MAC 2 : RGMII" }, 257 { 7, 3, 0, "CPU Frequency : 1GHz" }, 258 { 7, 3, 1, "CPU Frequency : 800MHz" }, 259 { 7, 3, 2, "CPU Frequency : 1.2GHz" }, 260 { 7, 3, 3, "CPU Frequency : 1.4GHz" }, 261 { 10, 2, 0, "HCLK ratio AXI:AHB = 2:1" }, 262 { 10, 2, 1, "HCLK ratio AXI:AHB = 2:1" }, 263 { 10, 2, 2, "HCLK ratio AXI:AHB = 3:1" }, 264 { 10, 2, 3, "HCLK ratio AXI:AHB = 4:1" }, 265 { 12, 2, 0, "VGA memory size : 8MB" }, 266 { 12, 2, 1, "VGA memory size : 16MB" }, 267 { 12, 2, 2, "VGA memory size : 32MB" }, 268 { 12, 2, 3, "VGA memory size : 64MB" }, 269 { 14, 3, OTP_REG_RESERVED, "" }, 270 { 17, 1, 0, "VGA class code : Class Code for video device" }, 271 { 17, 1, 1, "VGA class code : Class Code for VGA device" }, 272 { 18, 1, 0, "Enable debug interfaces 0" }, 273 { 18, 1, 1, "Disable debug interfaces 0" }, 274 { 19, 1, 0, "Boot from emmc mode : High eMMC speed" }, 275 { 19, 1, 1, "Boot from emmc mode : Normal eMMC speed" }, 276 { 20, 1, 0, "Disable Pcie EHCI device" }, 277 { 20, 1, 1, "Enable Pcie EHCI device" }, 278 { 21, 1, 0, "Enable VGA XDMA function" }, 279 { 21, 1, 1, "Disable VGA XDMA function" }, 280 { 22, 1, 0, "Normal BMC mode" }, 281 { 22, 1, 1, "Disable dedicated BMC functions for non-BMC application" }, 282 { 23, 1, 0, "SSPRST# pin is for secondary processor dedicated reset pin" }, 283 { 23, 1, 1, "SSPRST# pin is for PCIE root complex dedicated reset pin" }, 284 { 24, 1, 0, "Enable watchdog to reset full chip" }, 285 { 24, 1, 1, "Disable watchdog to reset full chip" }, 286 { 25, 5, OTP_REG_RESERVED, "" }, 287 { 30, 2, OTP_REG_RESERVED, "" }, 288 { 32, 1, 0, "MAC 3 : RMII/NCSI" }, 289 { 32, 1, 1, "MAC 3 : RGMII" }, 290 { 33, 1, 0, "MAC 4 : RMII/NCSI" }, 291 { 33, 1, 1, "MAC 4 : RGMII" }, 292 { 34, 1, 0, "SuperIO configuration address : 0x2E" }, 293 { 34, 1, 1, "SuperIO configuration address : 0x4E" }, 294 { 35, 1, 0, "Enable LPC to decode SuperIO" }, 295 { 35, 1, 1, "Disable LPC to decode SuperIO" }, 296 { 36, 1, 0, "Enable debug interfaces 1" }, 297 { 36, 1, 1, "Disable debug interfaces 1" }, 298 { 37, 1, 0, "Disable ACPI function" }, 299 { 37, 1, 1, "Enable ACPI function" }, 300 { 38, 1, 0, "Enable eSPI mode" }, 301 { 38, 1, 1, "Enable LPC mode" }, 302 { 39, 1, 0, "Enable SAFS mode" }, 303 { 39, 1, 1, "Enable SAFS mode" }, 304 { 40, 2, OTP_REG_RESERVED, "" }, 305 { 42, 1, 0, "Disable boot SPI 3B/4B address mode auto detection" }, 306 { 42, 1, 1, "Enable boot SPI 3B/4B address mode auto detection" }, 307 { 43, 1, 0, "Disable boot SPI ABR" }, 308 { 43, 1, 1, "Enable boot SPI ABR" }, 309 { 44, 1, 0, "Boot SPI ABR mode : dual SPI flash" }, 310 { 44, 1, 1, "Boot SPI ABR mode : single SPI flash" }, 311 { 45, 3, 0, "Boot SPI flash size : no define size" }, 312 { 45, 3, 1, "Boot SPI flash size : 2MB" }, 313 { 45, 3, 2, "Boot SPI flash size : 4MB" }, 314 { 45, 3, 3, "Boot SPI flash size : 8MB" }, 315 { 45, 3, 4, "Boot SPI flash size : 16MB" }, 316 { 45, 3, 5, "Boot SPI flash size : 32MB" }, 317 { 45, 3, 6, "Boot SPI flash size : 64MB" }, 318 { 45, 3, 7, "Boot SPI flash size : 128MB" }, 319 { 48, 1, 0, "Disable host SPI ABR" }, 320 { 48, 1, 1, "Enable host SPI ABR" }, 321 { 49, 1, 0, "Disable host SPI ABR mode select pin" }, 322 { 49, 1, 1, "Enable host SPI ABR mode select pin" }, 323 { 50, 1, 0, "Host SPI ABR mode : dual SPI flash" }, 324 { 50, 1, 1, "Host SPI ABR mode : single SPI flash" }, 325 { 51, 3, 0, "Host SPI flash size : no define size" }, 326 { 51, 3, 1, "Host SPI flash size : 2MB" }, 327 { 51, 3, 2, "Host SPI flash size : 4MB" }, 328 { 51, 3, 3, "Host SPI flash size : 8MB" }, 329 { 51, 3, 4, "Host SPI flash size : 16MB" }, 330 { 51, 3, 5, "Host SPI flash size : 32MB" }, 331 { 51, 3, 6, "Host SPI flash size : 64MB" }, 332 { 51, 3, 7, "Host SPI flash size : 128MB" }, 333 { 54, 1, 0, "Disable boot SPI auxiliary control pins" }, 334 { 54, 1, 1, "Enable boot SPI auxiliary control pins" }, 335 { 55, 2, 0, "Boot SPI CRTM size : disable CRTM" }, 336 { 55, 2, 1, "Boot SPI CRTM size : 256KB" }, 337 { 55, 2, 2, "Boot SPI CRTM size : 512KB" }, 338 { 55, 2, 3, "Boot SPI CRTM size : 1MB" }, 339 { 57, 2, 0, "Host SPI CRTM size : disable CRTM" }, 340 { 57, 2, 1, "Host SPI CRTM size : 256KB" }, 341 { 57, 2, 2, "Host SPI CRTM size : 512KB" }, 342 { 57, 2, 3, "Host SPI CRTM size : 1MB" }, 343 { 59, 1, 0, "Disable host SPI auxiliary control pins" }, 344 { 59, 1, 1, "Enable host SPI auxiliary control pins" }, 345 { 60, 1, 0, "Disable GPIO pass through" }, 346 { 60, 1, 1, "Enable GPIO pass through" }, 347 { 61, 1, 0, "Enable low security secure boot key" }, 348 { 61, 1, 1, "Disable low security secure boot key" }, 349 { 62, 1, 0, "Disable dedicate GPIO strap pins" }, 350 { 62, 1, 1, "Enable dedicate GPIO strap pins" }, 351 { 63, 1, OTP_REG_RESERVED, "" } 352 }; 353 354 static const struct otpconf_info a0_conf_info[] = { 355 { 0, 0, 1, 0, "Enable Secure Region programming" }, 356 { 0, 0, 1, 1, "Disable Secure Region programming" }, 357 { 0, 1, 1, 0, "Disable Secure Boot" }, 358 { 0, 1, 1, 1, "Enable Secure Boot" }, 359 { 0, 2, 1, 0, "Initialization programming not done" }, 360 { 0, 2, 1, 1, "Initialization programming done" }, 361 { 0, 3, 1, 0, "User region ECC disable" }, 362 { 0, 3, 1, 1, "User region ECC enable" }, 363 { 0, 4, 1, 0, "Secure Region ECC disable" }, 364 { 0, 4, 1, 1, "Secure Region ECC enable" }, 365 { 0, 5, 1, 0, "Enable low security key" }, 366 { 0, 5, 1, 1, "Disable low security key" }, 367 { 0, 6, 1, 0, "Do not ignore Secure Boot hardware strap" }, 368 { 0, 6, 1, 1, "Ignore Secure Boot hardware strap" }, 369 { 0, 7, 1, 0, "Secure Boot Mode: 1" }, 370 { 0, 7, 1, 1, "Secure Boot Mode: 2" }, 371 { 0, 8, 2, 0, "Single cell mode (recommended)" }, 372 { 0, 8, 2, 1, "Differential mode" }, 373 { 0, 8, 2, 2, "Differential-redundant mode" }, 374 { 0, 10, 2, 0, "RSA mode : RSA1024" }, 375 { 0, 10, 2, 1, "RSA mode : RSA2048" }, 376 { 0, 10, 2, 2, "RSA mode : RSA3072" }, 377 { 0, 10, 2, 3, "RSA mode : RSA4096" }, 378 { 0, 12, 2, 0, "SHA mode : SHA224" }, 379 { 0, 12, 2, 1, "SHA mode : SHA256" }, 380 { 0, 12, 2, 2, "SHA mode : SHA384" }, 381 { 0, 12, 2, 3, "SHA mode : SHA512" }, 382 { 0, 14, 2, OTP_REG_RESERVED, "" }, 383 { 0, 16, 6, OTP_REG_VALUE, "Secure Region size (DW): 0x%x" }, 384 { 0, 22, 1, 0, "Secure Region : Writable" }, 385 { 0, 22, 1, 1, "Secure Region : Write Protect" }, 386 { 0, 23, 1, 0, "User Region : Writable" }, 387 { 0, 23, 1, 1, "User Region : Write Protect" }, 388 { 0, 24, 1, 0, "Configure Region : Writable" }, 389 { 0, 24, 1, 1, "Configure Region : Write Protect" }, 390 { 0, 25, 1, 0, "OTP strap Region : Writable" }, 391 { 0, 25, 1, 1, "OTP strap Region : Write Protect" }, 392 { 0, 26, 1, 0, "Disable Copy Boot Image to Internal SRAM" }, 393 { 0, 26, 1, 1, "Copy Boot Image to Internal SRAM" }, 394 { 0, 27, 1, 0, "Disable image encryption" }, 395 { 0, 27, 1, 1, "Enable image encryption" }, 396 { 0, 28, 1, OTP_REG_RESERVED, "" }, 397 { 0, 29, 1, 0, "OTP key retire Region : Writable" }, 398 { 0, 29, 1, 1, "OTP key retire Region : Write Protect" }, 399 { 0, 30, 1, 0, "Data region redundancy repair disable" }, 400 { 0, 30, 1, 1, "Data region redundancy repair enable" }, 401 { 0, 31, 1, 0, "OTP memory lock disable" }, 402 { 0, 31, 1, 1, "OTP memory lock enable" }, 403 { 2, 0, 16, OTP_REG_VALUE, "Vender ID : 0x%x" }, 404 { 2, 16, 16, OTP_REG_VALUE, "Key Revision : 0x%x" }, 405 { 3, 0, 16, OTP_REG_VALUE, "Secure boot header offset : 0x%x" }, 406 { 4, 0, 8, OTP_REG_VALID_BIT, "Keys valid : %s" }, 407 { 4, 16, 8, OTP_REG_VALID_BIT, "Keys retire : %s" }, 408 { 5, 0, 32, OTP_REG_VALUE, "User define data, random number low : 0x%x" }, 409 { 6, 0, 32, OTP_REG_VALUE, "User define data, random number high : 0x%x" }, 410 { 7, 0, 1, 0, "Force enable PCI bus to AHB bus bridge" }, 411 { 7, 0, 1, 1, "Force disable PCI bus to AHB bus bridge" }, 412 { 7, 1, 1, 0, "Force enable UART5 debug port function" }, 413 { 7, 1, 1, 1, "Force disable UART5 debug port function" }, 414 { 7, 2, 1, 0, "Force enable XDMA function" }, 415 { 7, 2, 1, 1, "Force disable XDMA function" }, 416 { 7, 3, 1, 0, "Force enable APB to PCIE device bridge" }, 417 { 7, 3, 1, 1, "Force disable APB to PCIE device bridge" }, 418 { 7, 4, 1, 0, "Force enable APB to PCIE bridge config access" }, 419 { 7, 4, 1, 1, "Force disable APB to PCIE bridge config access" }, 420 { 7, 5, 1, 0, "Force enable PCIE bus trace buffer" }, 421 { 7, 5, 1, 1, "Force disable PCIE bus trace buffer" }, 422 { 7, 6, 1, 0, "Force enable the capability for PCIE device port as a Root Complex" }, 423 { 7, 6, 1, 1, "Force disable the capability for PCIE device port as a Root Complex" }, 424 { 7, 16, 1, 0, "Force enable ESPI bus to AHB bus bridge" }, 425 { 7, 16, 1, 1, "Force disable ESPI bus to AHB bus bridge" }, 426 { 7, 17, 1, 0, "Force enable LPC bus to AHB bus bridge1" }, 427 { 7, 17, 1, 1, "Force disable LPC bus to AHB bus bridge1" }, 428 { 7, 18, 1, 0, "Force enable LPC bus to AHB bus bridge2" }, 429 { 7, 18, 1, 1, "Force disable LPC bus to AHB bus bridge2" }, 430 { 7, 19, 1, 0, "Force enable UART1 debug port function" }, 431 { 7, 19, 1, 1, "Force disable UART1 debug port function" }, 432 { 7, 31, 1, 0, "Disable chip security setting" }, 433 { 7, 31, 1, 1, "Enable chip security setting" }, 434 { 8, 0, 32, OTP_REG_VALUE, "Redundancy Repair : 0x%x" }, 435 { 10, 0, 32, OTP_REG_VALUE, "Manifest ID low : 0x%x" }, 436 { 11, 0, 32, OTP_REG_VALUE, "Manifest ID high : 0x%x" } 437 }; 438 439 static const struct otpconf_info a1_conf_info[] = { 440 { 0, 0, 1, OTP_REG_RESERVED, "" }, 441 { 0, 1, 1, 0, "Disable Secure Boot" }, 442 { 0, 1, 1, 1, "Enable Secure Boot" }, 443 { 0, 2, 1, 0, "Initialization programming not done" }, 444 { 0, 2, 1, 1, "Initialization programming done" }, 445 { 0, 3, 1, 0, "User region ECC disable" }, 446 { 0, 3, 1, 1, "User region ECC enable" }, 447 { 0, 4, 1, 0, "Secure Region ECC disable" }, 448 { 0, 4, 1, 1, "Secure Region ECC enable" }, 449 { 0, 5, 1, 0, "Enable low security key" }, 450 { 0, 5, 1, 1, "Disable low security key" }, 451 { 0, 6, 1, 0, "Do not ignore Secure Boot hardware strap" }, 452 { 0, 6, 1, 1, "Ignore Secure Boot hardware strap" }, 453 { 0, 7, 1, 0, "Secure Boot Mode: GCM" }, 454 { 0, 7, 1, 1, "Secure Boot Mode: 2" }, 455 { 0, 8, 2, 0, "Single cell mode (recommended)" }, 456 { 0, 8, 2, 1, "Differential mode" }, 457 { 0, 8, 2, 2, "Differential-redundant mode" }, 458 { 0, 10, 2, 0, "RSA mode : RSA1024" }, 459 { 0, 10, 2, 1, "RSA mode : RSA2048" }, 460 { 0, 10, 2, 2, "RSA mode : RSA3072" }, 461 { 0, 10, 2, 3, "RSA mode : RSA4096" }, 462 { 0, 12, 2, 0, "SHA mode : SHA224" }, 463 { 0, 12, 2, 1, "SHA mode : SHA256" }, 464 { 0, 12, 2, 2, "SHA mode : SHA384" }, 465 { 0, 12, 2, 3, "SHA mode : SHA512" }, 466 { 0, 14, 2, OTP_REG_RESERVED, "" }, 467 { 0, 16, 6, OTP_REG_VALUE, "Secure Region size (DW): 0x%x" }, 468 { 0, 22, 1, 0, "Secure Region : Writable" }, 469 { 0, 22, 1, 1, "Secure Region : Write Protect" }, 470 { 0, 23, 1, 0, "User Region : Writable" }, 471 { 0, 23, 1, 1, "User Region : Write Protect" }, 472 { 0, 24, 1, 0, "Configure Region : Writable" }, 473 { 0, 24, 1, 1, "Configure Region : Write Protect" }, 474 { 0, 25, 1, 0, "OTP strap Region : Writable" }, 475 { 0, 25, 1, 1, "OTP strap Region : Write Protect" }, 476 { 0, 26, 1, 0, "Disable Copy Boot Image to Internal SRAM" }, 477 { 0, 26, 1, 1, "Copy Boot Image to Internal SRAM" }, 478 { 0, 27, 1, 0, "Disable image encryption" }, 479 { 0, 27, 1, 1, "Enable image encryption" }, 480 { 0, 28, 1, OTP_REG_RESERVED, "" }, 481 { 0, 29, 1, 0, "OTP key retire Region : Writable" }, 482 { 0, 29, 1, 1, "OTP key retire Region : Write Protect" }, 483 { 0, 30, 1, 0, "Data region redundancy repair disable" }, 484 { 0, 30, 1, 1, "Data region redundancy repair enable" }, 485 { 0, 31, 1, 0, "OTP memory lock disable" }, 486 { 0, 31, 1, 1, "OTP memory lock enable" }, 487 { 2, 0, 16, OTP_REG_VALUE, "Vender ID : 0x%x" }, 488 { 2, 16, 16, OTP_REG_VALUE, "Key Revision : 0x%x" }, 489 { 3, 0, 16, OTP_REG_VALUE, "Secure boot header offset : 0x%x" }, 490 { 4, 0, 8, OTP_REG_VALID_BIT, "Keys valid : %s" }, 491 { 4, 16, 8, OTP_REG_VALID_BIT, "Keys retire : %s" }, 492 { 5, 0, 32, OTP_REG_VALUE, "User define data, random number low : 0x%x" }, 493 { 6, 0, 32, OTP_REG_VALUE, "User define data, random number high : 0x%x" }, 494 { 7, 0, 1, 0, "Force enable PCI bus to AHB bus bridge" }, 495 { 7, 0, 1, 1, "Force disable PCI bus to AHB bus bridge" }, 496 { 7, 1, 1, 0, "Force enable UART5 debug port function" }, 497 { 7, 1, 1, 1, "Force disable UART5 debug port function" }, 498 { 7, 2, 1, 0, "Force enable XDMA function" }, 499 { 7, 2, 1, 1, "Force disable XDMA function" }, 500 { 7, 3, 1, 0, "Force enable APB to PCIE device bridge" }, 501 { 7, 3, 1, 1, "Force disable APB to PCIE device bridge" }, 502 { 7, 4, 1, 0, "Force enable APB to PCIE bridge config access" }, 503 { 7, 4, 1, 1, "Force disable APB to PCIE bridge config access" }, 504 { 7, 5, 1, 0, "Force enable PCIE bus trace buffer" }, 505 { 7, 5, 1, 1, "Force disable PCIE bus trace buffer" }, 506 { 7, 6, 1, 0, "Force enable the capability for PCIE device port as a Root Complex" }, 507 { 7, 6, 1, 1, "Force disable the capability for PCIE device port as a Root Complex" }, 508 { 7, 16, 1, 0, "Force enable ESPI bus to AHB bus bridge" }, 509 { 7, 16, 1, 1, "Force disable ESPI bus to AHB bus bridge" }, 510 { 7, 17, 1, 0, "Force enable LPC bus to AHB bus bridge1" }, 511 { 7, 17, 1, 1, "Force disable LPC bus to AHB bus bridge1" }, 512 { 7, 18, 1, 0, "Force enable LPC bus to AHB bus bridge2" }, 513 { 7, 18, 1, 1, "Force disable LPC bus to AHB bus bridge2" }, 514 { 7, 19, 1, 0, "Force enable UART1 debug port function" }, 515 { 7, 19, 1, 1, "Force disable UART1 debug port function" }, 516 { 7, 31, 1, 0, "Disable chip security setting" }, 517 { 7, 31, 1, 1, "Enable chip security setting" }, 518 { 8, 0, 32, OTP_REG_VALUE, "Redundancy Repair : 0x%x" }, 519 { 10, 0, 32, OTP_REG_VALUE, "Manifest ID low : 0x%x" }, 520 { 11, 0, 32, OTP_REG_VALUE, "Manifest ID high : 0x%x" } 521 }; 522 523 static const struct otpkey_type a0_key_type[] = { 524 {0, OTP_KEY_TYPE_AES, 0, "AES-256 as OEM platform key for image encryption/decryption"}, 525 {1, OTP_KEY_TYPE_VAULT, 0, "AES-256 as secret vault key"}, 526 {4, OTP_KEY_TYPE_HMAC, 1, "HMAC as encrypted OEM HMAC keys in Mode 1"}, 527 {8, OTP_KEY_TYPE_RSA, 1, "RSA-public as OEM DSS public keys in Mode 2"}, 528 {9, OTP_KEY_TYPE_RSA, 0, "RSA-public as SOC public key"}, 529 {10, OTP_KEY_TYPE_RSA, 0, "RSA-public as AES key decryption key"}, 530 {13, OTP_KEY_TYPE_RSA, 0, "RSA-private as SOC private key"}, 531 {14, OTP_KEY_TYPE_RSA, 0, "RSA-private as AES key decryption key"}, 532 }; 533 534 static const struct otpkey_type a1_key_type[] = { 535 {1, OTP_KEY_TYPE_VAULT, 0, "AES-256 as secret vault key"}, 536 {2, OTP_KEY_TYPE_AES, 1, "AES-256 as OEM platform key for image encryption/decryption in Mode 2 or AES-256 as OEM DSS keys for Mode GCM"}, 537 {8, OTP_KEY_TYPE_RSA, 1, "RSA-public as OEM DSS public keys in Mode 2"}, 538 {10, OTP_KEY_TYPE_RSA, 0, "RSA-public as AES key decryption key"}, 539 {14, OTP_KEY_TYPE_RSA, 0, "RSA-private as AES key decryption key"}, 540 }; 541 542 static uint32_t chip_version(void) 543 { 544 uint32_t rev_id; 545 546 rev_id = (readl(0x1e6e2004) >> 16) & 0xff ; 547 548 return rev_id; 549 } 550 551 static void wait_complete(void) 552 { 553 int reg; 554 555 do { 556 reg = readl(OTP_STATUS); 557 } while ((reg & 0x6) != 0x6); 558 } 559 560 static void otp_read_data(uint32_t offset, uint32_t *data) 561 { 562 writel(offset, OTP_ADDR); //Read address 563 writel(0x23b1e361, OTP_COMMAND); //trigger read 564 wait_complete(); 565 data[0] = readl(OTP_COMPARE_1); 566 data[1] = readl(OTP_COMPARE_2); 567 } 568 569 static void otp_read_config(uint32_t offset, uint32_t *data) 570 { 571 int config_offset; 572 573 config_offset = 0x800; 574 config_offset |= (offset / 8) * 0x200; 575 config_offset |= (offset % 8) * 0x2; 576 577 writel(config_offset, OTP_ADDR); //Read address 578 writel(0x23b1e361, OTP_COMMAND); //trigger read 579 wait_complete(); 580 data[0] = readl(OTP_COMPARE_1); 581 } 582 583 static int otp_print_config(uint32_t offset, int dw_count) 584 { 585 int i; 586 uint32_t ret[1]; 587 588 if (offset + dw_count > 32) 589 return OTP_USAGE; 590 for (i = offset; i < offset + dw_count; i ++) { 591 otp_read_config(i, ret); 592 printf("OTPCFG%X: %08X\n", i, ret[0]); 593 } 594 printf("\n"); 595 return OTP_SUCCESS; 596 } 597 598 static int otp_print_data(uint32_t offset, int dw_count) 599 { 600 int i; 601 uint32_t ret[2]; 602 603 if (offset + dw_count > 2048 || offset % 4 != 0) 604 return OTP_USAGE; 605 for (i = offset; i < offset + dw_count; i += 2) { 606 otp_read_data(i, ret); 607 if (i % 4 == 0) 608 printf("%03X: %08X %08X ", i * 4, ret[0], ret[1]); 609 else 610 printf("%08X %08X\n", ret[0], ret[1]); 611 612 } 613 printf("\n"); 614 return OTP_SUCCESS; 615 } 616 617 static int otp_compare(uint32_t otp_addr, uint32_t addr) 618 { 619 uint32_t ret; 620 uint32_t *buf; 621 622 buf = map_physmem(addr, 16, MAP_WRBACK); 623 printf("%08X\n", buf[0]); 624 printf("%08X\n", buf[1]); 625 printf("%08X\n", buf[2]); 626 printf("%08X\n", buf[3]); 627 writel(otp_addr, OTP_ADDR); //Compare address 628 writel(buf[0], OTP_COMPARE_1); //Compare data 1 629 writel(buf[1], OTP_COMPARE_2); //Compare data 2 630 writel(buf[2], OTP_COMPARE_3); //Compare data 3 631 writel(buf[3], OTP_COMPARE_4); //Compare data 4 632 writel(0x23b1e363, OTP_COMMAND); //Compare command 633 wait_complete(); 634 ret = readl(OTP_STATUS); //Compare command 635 if (ret & 0x1) 636 return 0; 637 else 638 return -1; 639 } 640 641 static void otp_write(uint32_t otp_addr, uint32_t data) 642 { 643 writel(otp_addr, OTP_ADDR); //write address 644 writel(data, OTP_COMPARE_1); //write data 645 writel(0x23b1e362, OTP_COMMAND); //write command 646 wait_complete(); 647 } 648 649 static void otp_prog(uint32_t otp_addr, uint32_t prog_bit) 650 { 651 writel(otp_addr, OTP_ADDR); //write address 652 writel(prog_bit, OTP_COMPARE_1); //write data 653 writel(0x23b1e364, OTP_COMMAND); //write command 654 wait_complete(); 655 } 656 657 static int verify_bit(uint32_t otp_addr, int bit_offset, int value) 658 { 659 uint32_t ret[2]; 660 661 if (otp_addr % 2 == 0) 662 writel(otp_addr, OTP_ADDR); //Read address 663 else 664 writel(otp_addr - 1, OTP_ADDR); //Read address 665 666 writel(0x23b1e361, OTP_COMMAND); //trigger read 667 wait_complete(); 668 ret[0] = readl(OTP_COMPARE_1); 669 ret[1] = readl(OTP_COMPARE_2); 670 // printf("verify_bit = %x\n", ret); 671 if (otp_addr % 2 == 0) { 672 if (((ret[0] >> bit_offset) & 1) == value) 673 return 0; 674 else 675 return -1; 676 } else { 677 if (((ret[1] >> bit_offset) & 1) == value) 678 return 0; 679 else 680 return -1; 681 } 682 683 } 684 685 static uint32_t verify_dw(uint32_t otp_addr, uint32_t *value, uint32_t *keep, uint32_t *compare, int size) 686 { 687 uint32_t ret[2]; 688 689 otp_addr &= ~(1 << 15); 690 691 if (otp_addr % 2 == 0) 692 writel(otp_addr, OTP_ADDR); //Read address 693 else 694 writel(otp_addr - 1, OTP_ADDR); //Read address 695 writel(0x23b1e361, OTP_COMMAND); //trigger read 696 wait_complete(); 697 ret[0] = readl(OTP_COMPARE_1); 698 ret[1] = readl(OTP_COMPARE_2); 699 if (size == 1) { 700 if (otp_addr % 2 == 0) { 701 // printf("check %x : %x = %x\n", otp_addr, ret[0], value[0]); 702 if ((value[0] & ~keep[0]) == (ret[0] & ~keep[0])) { 703 compare[0] = 0; 704 return 0; 705 } else { 706 compare[0] = value[0] ^ ret[0]; 707 return -1; 708 } 709 710 } else { 711 // printf("check %x : %x = %x\n", otp_addr, ret[1], value[0]); 712 if ((value[0] & ~keep[0]) == (ret[1] & ~keep[0])) { 713 compare[0] = ~0; 714 return 0; 715 } else { 716 compare[0] = ~(value[0] ^ ret[1]); 717 return -1; 718 } 719 } 720 } else if (size == 2) { 721 // otp_addr should be even 722 if ((value[0] & ~keep[0]) == (ret[0] & ~keep[0]) && (value[1] & ~keep[1]) == (ret[1] & ~keep[1])) { 723 // printf("check[0] %x : %x = %x\n", otp_addr, ret[0], value[0]); 724 // printf("check[1] %x : %x = %x\n", otp_addr, ret[1], value[1]); 725 compare[0] = 0; 726 compare[1] = ~0; 727 return 0; 728 } else { 729 // printf("check[0] %x : %x = %x\n", otp_addr, ret[0], value[0]); 730 // printf("check[1] %x : %x = %x\n", otp_addr, ret[1], value[1]); 731 compare[0] = value[0] ^ ret[0]; 732 compare[1] = ~(value[1] ^ ret[1]); 733 return -1; 734 } 735 } else { 736 return -1; 737 } 738 } 739 740 static void otp_soak(int soak) 741 { 742 switch (soak) { 743 case 0: //default 744 otp_write(0x3000, 0x0); // Write MRA 745 otp_write(0x5000, 0x0); // Write MRB 746 otp_write(0x1000, 0x0); // Write MR 747 break; 748 case 1: //normal program 749 otp_write(0x3000, 0x4021); // Write MRA 750 otp_write(0x5000, 0x302f); // Write MRB 751 otp_write(0x1000, 0x4020); // Write MR 752 writel(0x04190760, OTP_TIMING); 753 break; 754 case 2: //soak program 755 otp_write(0x3000, 0x4021); // Write MRA 756 otp_write(0x5000, 0x1027); // Write MRB 757 otp_write(0x1000, 0x4820); // Write MR 758 writel(0x041930d4, OTP_TIMING); 759 break; 760 } 761 762 wait_complete(); 763 } 764 765 static void otp_prog_dw(uint32_t value, uint32_t keep, uint32_t prog_address) 766 { 767 int j, bit_value, prog_bit; 768 769 for (j = 0; j < 32; j++) { 770 if ((keep >> j) & 0x1) 771 continue; 772 bit_value = (value >> j) & 0x1; 773 if (prog_address % 2 == 0) { 774 if (bit_value) 775 prog_bit = ~(0x1 << j); 776 else 777 continue; 778 } else { 779 prog_address |= 1 << 15; 780 if (bit_value) 781 continue; 782 else 783 prog_bit = 0x1 << j; 784 } 785 otp_prog(prog_address, prog_bit); 786 } 787 } 788 789 790 static void otp_strap_status(struct otpstrap_status *otpstrap) 791 { 792 uint32_t OTPSTRAP_RAW[2]; 793 int i, j; 794 795 for (j = 0; j < 64; j++) { 796 otpstrap[j].value = 0; 797 otpstrap[j].remain_times = 7; 798 otpstrap[j].writeable_option = -1; 799 otpstrap[j].protected = 0; 800 } 801 802 for (i = 16; i < 30; i += 2) { 803 int option = (i - 16) / 2; 804 otp_read_config(i, &OTPSTRAP_RAW[0]); 805 otp_read_config(i + 1, &OTPSTRAP_RAW[1]); 806 for (j = 0; j < 32; j++) { 807 char bit_value = ((OTPSTRAP_RAW[0] >> j) & 0x1); 808 if ((bit_value == 0) && (otpstrap[j].writeable_option == -1)) { 809 otpstrap[j].writeable_option = option; 810 } 811 if (bit_value == 1) 812 otpstrap[j].remain_times --; 813 otpstrap[j].value ^= bit_value; 814 otpstrap[j].option_array[option] = bit_value; 815 } 816 for (j = 32; j < 64; j++) { 817 char bit_value = ((OTPSTRAP_RAW[1] >> (j - 32)) & 0x1); 818 if ((bit_value == 0) && (otpstrap[j].writeable_option == -1)) { 819 otpstrap[j].writeable_option = option; 820 } 821 if (bit_value == 1) 822 otpstrap[j].remain_times --; 823 otpstrap[j].value ^= bit_value; 824 otpstrap[j].option_array[option] = bit_value; 825 } 826 } 827 otp_read_config(30, &OTPSTRAP_RAW[0]); 828 otp_read_config(31, &OTPSTRAP_RAW[1]); 829 for (j = 0; j < 32; j++) { 830 if (((OTPSTRAP_RAW[0] >> j) & 0x1) == 1) 831 otpstrap[j].protected = 1; 832 } 833 for (j = 32; j < 64; j++) { 834 if (((OTPSTRAP_RAW[1] >> (j - 32)) & 0x1) == 1) 835 otpstrap[j].protected = 1; 836 } 837 } 838 839 static int otp_print_conf_image(uint32_t *OTPCFG) 840 { 841 const struct otpconf_info *conf_info = info_cb.conf_info; 842 uint32_t *OTPCFG_KEEP = &OTPCFG[12]; 843 uint32_t mask; 844 uint32_t dw_offset; 845 uint32_t bit_offset; 846 uint32_t otp_value; 847 uint32_t otp_keep; 848 int fail = 0; 849 char valid_bit[20]; 850 int i; 851 int j; 852 853 printf("DW BIT Value Description\n"); 854 printf("__________________________________________________________________________\n"); 855 for (i = 0; i < info_cb.conf_info_len; i++) { 856 dw_offset = conf_info[i].dw_offset; 857 bit_offset = conf_info[i].bit_offset; 858 mask = BIT(conf_info[i].length) - 1; 859 otp_value = (OTPCFG[dw_offset] >> bit_offset) & mask; 860 otp_keep = (OTPCFG_KEEP[dw_offset] >> bit_offset) & mask; 861 862 if (otp_keep == mask) { 863 continue; 864 } else if (otp_keep != 0) { 865 fail = 1; 866 } 867 868 if ((otp_value != conf_info[i].value) && 869 conf_info[i].value != OTP_REG_RESERVED && 870 conf_info[i].value != OTP_REG_VALUE && 871 conf_info[i].value != OTP_REG_VALID_BIT) 872 continue; 873 printf("0x%-4X", dw_offset); 874 875 if (conf_info[i].length == 1) { 876 printf("0x%-9X", conf_info[i].bit_offset); 877 } else { 878 printf("0x%-2X:0x%-4X", 879 conf_info[i].bit_offset + conf_info[i].length - 1, 880 conf_info[i].bit_offset); 881 } 882 printf("0x%-10x", otp_value); 883 884 if (fail) { 885 printf("Keep mask error\n"); 886 } else { 887 if (conf_info[i].value == OTP_REG_RESERVED) { 888 printf("Reserved\n"); 889 } else if (conf_info[i].value == OTP_REG_VALUE) { 890 printf(conf_info[i].information, otp_value); 891 printf("\n"); 892 } else if (conf_info[i].value == OTP_REG_VALID_BIT) { 893 if (otp_value != 0) { 894 for (j = 0; j < 7; j++) { 895 if (otp_value == (1 << j)) { 896 valid_bit[j * 2] = '1'; 897 } else { 898 valid_bit[j * 2] = '0'; 899 } 900 valid_bit[j * 2 + 1] = ' '; 901 } 902 valid_bit[15] = 0; 903 } else { 904 strcpy(valid_bit, "0 0 0 0 0 0 0 0\0"); 905 } 906 printf(conf_info[i].information, valid_bit); 907 printf("\n"); 908 } else { 909 printf("%s\n", conf_info[i].information); 910 } 911 } 912 } 913 914 if (fail) 915 return OTP_FAILURE; 916 917 return OTP_SUCCESS; 918 } 919 920 static int otp_print_conf_info(int input_offset) 921 { 922 const struct otpconf_info *conf_info = info_cb.conf_info; 923 uint32_t OTPCFG[12]; 924 uint32_t mask; 925 uint32_t dw_offset; 926 uint32_t bit_offset; 927 uint32_t otp_value; 928 char valid_bit[20]; 929 int i; 930 int j; 931 932 for (i = 0; i < 12; i++) 933 otp_read_config(i, &OTPCFG[i]); 934 935 936 printf("DW BIT Value Description\n"); 937 printf("__________________________________________________________________________\n"); 938 for (i = 0; i < info_cb.conf_info_len; i++) { 939 if (input_offset != -1 && input_offset != conf_info[i].dw_offset) 940 continue; 941 dw_offset = conf_info[i].dw_offset; 942 bit_offset = conf_info[i].bit_offset; 943 mask = BIT(conf_info[i].length) - 1; 944 otp_value = (OTPCFG[dw_offset] >> bit_offset) & mask; 945 946 if ((otp_value != conf_info[i].value) && 947 conf_info[i].value != OTP_REG_RESERVED && 948 conf_info[i].value != OTP_REG_VALUE && 949 conf_info[i].value != OTP_REG_VALID_BIT) 950 continue; 951 printf("0x%-4X", dw_offset); 952 953 if (conf_info[i].length == 1) { 954 printf("0x%-9X", conf_info[i].bit_offset); 955 } else { 956 printf("0x%-2X:0x%-4X", 957 conf_info[i].bit_offset + conf_info[i].length - 1, 958 conf_info[i].bit_offset); 959 } 960 printf("0x%-10x", otp_value); 961 962 if (conf_info[i].value == OTP_REG_RESERVED) { 963 printf("Reserved\n"); 964 } else if (conf_info[i].value == OTP_REG_VALUE) { 965 printf(conf_info[i].information, otp_value); 966 printf("\n"); 967 } else if (conf_info[i].value == OTP_REG_VALID_BIT) { 968 if (otp_value != 0) { 969 for (j = 0; j < 7; j++) { 970 if (otp_value == (1 << j)) { 971 valid_bit[j * 2] = '1'; 972 } else { 973 valid_bit[j * 2] = '0'; 974 } 975 valid_bit[j * 2 + 1] = ' '; 976 } 977 valid_bit[15] = 0; 978 } else { 979 strcpy(valid_bit, "0 0 0 0 0 0 0 0\0"); 980 } 981 printf(conf_info[i].information, valid_bit); 982 printf("\n"); 983 } else { 984 printf("%s\n", conf_info[i].information); 985 } 986 } 987 return OTP_SUCCESS; 988 } 989 990 static int otp_print_strap_image(uint32_t *OTPSTRAP) 991 { 992 const struct otpstrap_info *strap_info = info_cb.strap_info; 993 uint32_t *OTPSTRAP_PRO = &OTPSTRAP[4]; 994 uint32_t *OTPSTRAP_KEEP = &OTPSTRAP[2]; 995 int i; 996 int fail = 0; 997 uint32_t bit_offset; 998 uint32_t dw_offset; 999 uint32_t mask; 1000 uint32_t otp_value; 1001 uint32_t otp_protect; 1002 uint32_t otp_keep; 1003 1004 printf("BIT(hex) Value Protect Description\n"); 1005 printf("__________________________________________________________________________________________\n"); 1006 1007 for (i = 0; i < info_cb.strap_info_len; i++) { 1008 if (strap_info[i].bit_offset > 32) { 1009 dw_offset = 1; 1010 bit_offset = strap_info[i].bit_offset - 32; 1011 } else { 1012 dw_offset = 0; 1013 bit_offset = strap_info[i].bit_offset; 1014 } 1015 1016 mask = BIT(strap_info[i].length) - 1; 1017 otp_value = (OTPSTRAP[dw_offset] >> bit_offset) & mask; 1018 otp_protect = (OTPSTRAP_PRO[dw_offset] >> bit_offset) & mask; 1019 otp_keep = (OTPSTRAP_KEEP[dw_offset] >> bit_offset) & mask; 1020 1021 if (otp_keep == mask) { 1022 continue; 1023 } else if (otp_keep != 0) { 1024 fail = 1; 1025 } 1026 1027 if ((otp_value != strap_info[i].value) && 1028 strap_info[i].value != OTP_REG_RESERVED) 1029 continue; 1030 1031 if (strap_info[i].length == 1) { 1032 printf("0x%-9X", strap_info[i].bit_offset); 1033 } else { 1034 printf("0x%-2X:0x%-4X", 1035 strap_info[i].bit_offset + strap_info[i].length - 1, 1036 strap_info[i].bit_offset); 1037 } 1038 printf("0x%-10x", otp_value); 1039 printf("0x%-10x", otp_protect); 1040 1041 if (fail) { 1042 printf("Keep mask error\n"); 1043 } else { 1044 if (strap_info[i].value != OTP_REG_RESERVED) 1045 printf("%s\n", strap_info[i].information); 1046 else 1047 printf("Reserved\n"); 1048 } 1049 } 1050 1051 if (fail) 1052 return OTP_FAILURE; 1053 1054 return OTP_SUCCESS; 1055 } 1056 1057 static int otp_print_strap_info(int view) 1058 { 1059 const struct otpstrap_info *strap_info = info_cb.strap_info; 1060 struct otpstrap_status strap_status[64]; 1061 int i, j; 1062 int fail = 0; 1063 uint32_t bit_offset; 1064 uint32_t length; 1065 uint32_t otp_value; 1066 uint32_t otp_protect; 1067 1068 otp_strap_status(strap_status); 1069 1070 if (view) { 1071 // printf("BIT(hex) Value Option Protect Description\n"); 1072 // printf(" 0 1 2 3 4 5 6\n"); 1073 printf("BIT(hex) Value Remains Protect Description\n"); 1074 printf("___________________________________________________________________________________________________\n"); 1075 } else { 1076 printf("BIT(hex) Value Description\n"); 1077 printf("________________________________________________________________________________\n"); 1078 } 1079 for (i = 0; i < info_cb.strap_info_len; i++) { 1080 otp_value = 0; 1081 bit_offset = strap_info[i].bit_offset; 1082 length = strap_info[i].length; 1083 for (j = 0; j < length; j++) { 1084 otp_value |= strap_status[bit_offset + j].value << j; 1085 otp_protect |= strap_status[bit_offset + j].protected << j; 1086 } 1087 if ((otp_value != strap_info[i].value) && 1088 strap_info[i].value != OTP_REG_RESERVED) 1089 continue; 1090 if (view) { 1091 for (j = 0; j < length; j++) { 1092 printf("0x%-7X", strap_info[i].bit_offset + j); 1093 printf("0x%-5X", strap_status[bit_offset + j].value); 1094 printf("%-9d", strap_status[bit_offset + j].remain_times); 1095 printf("0x%-7X", strap_status[bit_offset].protected); 1096 if (strap_info[i].value == OTP_REG_RESERVED) { 1097 printf(" Reserved\n"); 1098 continue; 1099 } 1100 if (length == 1) { 1101 printf(" %s\n", strap_info[i].information); 1102 continue; 1103 } 1104 1105 if (j == 0) 1106 printf("/%s\n", strap_info[i].information); 1107 else if (j == length - 1) 1108 printf("\\ \"\n"); 1109 else 1110 printf("| \"\n"); 1111 } 1112 } else { 1113 if (length == 1) { 1114 printf("0x%-9X", strap_info[i].bit_offset); 1115 } else { 1116 printf("0x%-2X:0x%-4X", 1117 bit_offset + length - 1, bit_offset); 1118 } 1119 1120 printf("0x%-10X", otp_value); 1121 1122 if (strap_info[i].value != OTP_REG_RESERVED) 1123 printf("%s\n", strap_info[i].information); 1124 else 1125 printf("Reserved\n"); 1126 } 1127 } 1128 1129 if (fail) 1130 return OTP_FAILURE; 1131 1132 return OTP_SUCCESS; 1133 } 1134 1135 static void buf_print(char *buf, int len) 1136 { 1137 int i; 1138 printf(" 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F\n"); 1139 for (i = 0; i < len; i++) { 1140 if (i % 16 == 0) { 1141 printf("%04X: ", i); 1142 } 1143 printf("%02X ", buf[i]); 1144 if ((i + 1) % 16 == 0) { 1145 printf("\n"); 1146 } 1147 } 1148 } 1149 1150 static int otp_print_data_info(uint32_t *buf) 1151 { 1152 int key_id, key_offset, last, key_type, key_length, exp_length; 1153 const struct otpkey_type *key_info_array = info_cb.key_info; 1154 struct otpkey_type key_info; 1155 char *byte_buf; 1156 int i = 0, len = 0; 1157 int j; 1158 byte_buf = (char *)buf; 1159 while (1) { 1160 key_id = buf[i] & 0x7; 1161 key_offset = buf[i] & 0x1ff8; 1162 last = (buf[i] >> 13) & 1; 1163 key_type = (buf[i] >> 14) & 0xf; 1164 key_length = (buf[i] >> 18) & 0x3; 1165 exp_length = (buf[i] >> 20) & 0xfff; 1166 1167 for (j = 0; j < info_cb.key_info_len; j++) { 1168 if (key_type == key_info_array[j].value) { 1169 key_info = key_info_array[j]; 1170 break; 1171 } 1172 } 1173 1174 printf("\nKey[%d]:\n", i); 1175 printf("Key Type: "); 1176 printf("%s\n", key_info.information); 1177 1178 if (key_info.key_type == OTP_KEY_TYPE_HMAC) { 1179 printf("HMAC SHA Type: "); 1180 switch (key_length) { 1181 case 0: 1182 printf("HMAC(SHA224)\n"); 1183 break; 1184 case 1: 1185 printf("HMAC(SHA256)\n"); 1186 break; 1187 case 2: 1188 printf("HMAC(SHA384)\n"); 1189 break; 1190 case 3: 1191 printf("HMAC(SHA512)\n"); 1192 break; 1193 } 1194 } else if (key_info.key_type == OTP_KEY_TYPE_RSA) { 1195 printf("RSA SHA Type: "); 1196 switch (key_length) { 1197 case 0: 1198 printf("RSA1024\n"); 1199 len = 0x100; 1200 break; 1201 case 1: 1202 printf("RSA2048\n"); 1203 len = 0x200; 1204 break; 1205 case 2: 1206 printf("RSA3072\n"); 1207 len = 0x300; 1208 break; 1209 case 3: 1210 printf("RSA4096\n"); 1211 len = 0x400; 1212 break; 1213 } 1214 printf("RSA exponent bit length: %d\n", exp_length); 1215 } 1216 if (key_info.need_id) 1217 printf("Key Number ID: %d\n", key_id); 1218 printf("Key Value:\n"); 1219 if (key_info.key_type == OTP_KEY_TYPE_HMAC) { 1220 buf_print(&byte_buf[key_offset], 0x40); 1221 } else if (key_info.key_type == OTP_KEY_TYPE_AES) { 1222 printf("AES Key:\n"); 1223 buf_print(&byte_buf[key_offset], 0x20); 1224 if (info_cb.version == 0) { 1225 printf("AES IV:\n"); 1226 buf_print(&byte_buf[key_offset + 0x20], 0x10); 1227 } 1228 1229 } else if (key_info.key_type == OTP_KEY_TYPE_VAULT) { 1230 if (info_cb.version == 0) { 1231 printf("AES Key:\n"); 1232 buf_print(&byte_buf[key_offset], 0x20); 1233 printf("AES IV:\n"); 1234 buf_print(&byte_buf[key_offset + 0x20], 0x10); 1235 } else if (info_cb.version == 1) { 1236 printf("AES Key 1:\n"); 1237 buf_print(&byte_buf[key_offset], 0x20); 1238 printf("AES Key 2:\n"); 1239 buf_print(&byte_buf[key_offset + 0x20], 0x20); 1240 } 1241 1242 } else if (key_info.key_type == OTP_KEY_TYPE_RSA) { 1243 printf("RSA mod:\n"); 1244 buf_print(&byte_buf[key_offset], len / 2); 1245 printf("RSA exp:\n"); 1246 buf_print(&byte_buf[key_offset + (len / 2)], len / 2); 1247 } 1248 if (last) 1249 break; 1250 i++; 1251 } 1252 return 0; 1253 } 1254 1255 static int otp_prog_conf(uint32_t *buf) 1256 { 1257 int i, k; 1258 int pass = 0; 1259 uint32_t prog_address; 1260 uint32_t data[12]; 1261 uint32_t compare[2]; 1262 uint32_t *buf_keep = &buf[12]; 1263 uint32_t data_masked; 1264 uint32_t buf_masked; 1265 1266 printf("Read OTP Config Region:\n"); 1267 1268 printProgress(0, 12, ""); 1269 for (i = 0; i < 12 ; i ++) { 1270 printProgress(i + 1, 12, ""); 1271 prog_address = 0x800; 1272 prog_address |= (i / 8) * 0x200; 1273 prog_address |= (i % 8) * 0x2; 1274 otp_read_data(prog_address, &data[i]); 1275 } 1276 1277 printf("Check writable...\n"); 1278 for (i = 0; i < 12; i++) { 1279 data_masked = data[i] & ~buf_keep[i]; 1280 buf_masked = buf[i] & ~buf_keep[i]; 1281 if (data_masked == buf_masked) 1282 continue; 1283 if ((data_masked | buf_masked) == buf_masked) { 1284 continue; 1285 } else { 1286 printf("Input image can't program into OTP, please check.\n"); 1287 printf("OTPCFG[%X] = %x\n", i, data[i]); 1288 printf("Input [%X] = %x\n", i, buf[i]); 1289 printf("Mask [%X] = %x\n", i, ~buf_keep[i]); 1290 return OTP_FAILURE; 1291 } 1292 } 1293 1294 printf("Start Programing...\n"); 1295 printProgress(0, 12, ""); 1296 otp_soak(0); 1297 for (i = 0; i < 12; i++) { 1298 data_masked = data[i] & ~buf_keep[i]; 1299 buf_masked = buf[i] & ~buf_keep[i]; 1300 prog_address = 0x800; 1301 prog_address |= (i / 8) * 0x200; 1302 prog_address |= (i % 8) * 0x2; 1303 if (data_masked == buf_masked) { 1304 printProgress(i + 1, 12, "[%03X]=%08X HIT", prog_address, buf[i]); 1305 continue; 1306 } 1307 1308 printProgress(i + 1, 12, "[%03X]=%08X ", prog_address, buf[i]); 1309 1310 otp_soak(1); 1311 otp_prog_dw(buf[i], buf_keep[i], prog_address); 1312 1313 pass = 0; 1314 for (k = 0; k < RETRY; k++) { 1315 if (verify_dw(prog_address, &buf[i], &buf_keep[i], compare, 1) != 0) { 1316 otp_soak(2); 1317 otp_prog_dw(compare[0], prog_address, 1); 1318 if (verify_dw(prog_address, &buf[i], &buf_keep[i], compare, 1) != 0) { 1319 otp_soak(1); 1320 } else { 1321 pass = 1; 1322 break; 1323 } 1324 } else { 1325 pass = 1; 1326 break; 1327 } 1328 } 1329 } 1330 1331 otp_soak(0); 1332 if (!pass) 1333 return OTP_FAILURE; 1334 1335 return OTP_SUCCESS; 1336 1337 } 1338 1339 1340 static int otp_strap_image_confirm(uint32_t *buf) 1341 { 1342 int i; 1343 uint32_t *strap_keep = buf + 2; 1344 uint32_t *strap_protect = buf + 4; 1345 int bit, pbit, kbit; 1346 int fail = 0; 1347 int skip = -1; 1348 struct otpstrap_status otpstrap[64]; 1349 1350 otp_strap_status(otpstrap); 1351 for (i = 0; i < 64; i++) { 1352 if (i < 32) { 1353 bit = (buf[0] >> i) & 0x1; 1354 kbit = (strap_keep[0] >> i) & 0x1; 1355 pbit = (strap_protect[0] >> i) & 0x1; 1356 } else { 1357 bit = (buf[1] >> (i - 32)) & 0x1; 1358 kbit = (strap_keep[1] >> (i - 32)) & 0x1; 1359 pbit = (strap_protect[1] >> (i - 32)) & 0x1; 1360 } 1361 1362 if (kbit == 1) { 1363 continue; 1364 } else { 1365 printf("OTPSTRAP[%X]:\n", i); 1366 } 1367 if (bit == otpstrap[i].value) { 1368 printf(" The value is same as before, skip it.\n"); 1369 if (skip == -1) 1370 skip = 1; 1371 continue; 1372 } else { 1373 skip = 0; 1374 } 1375 if (otpstrap[i].protected == 1) { 1376 printf(" This bit is protected and is not writable\n"); 1377 fail = 1; 1378 continue; 1379 } 1380 if (otpstrap[i].remain_times == 0) { 1381 printf(" This bit is no remaining times to write.\n"); 1382 fail = 1; 1383 continue; 1384 } 1385 if (pbit == 1) { 1386 printf(" This bit will be protected and become non-writable.\n"); 1387 } 1388 printf(" Write 1 to OTPSTRAP[%X] OPTION[%X], that value becomes from %d to %d.\n", i, otpstrap[i].writeable_option + 1, otpstrap[i].value, otpstrap[i].value ^ 1); 1389 } 1390 if (fail == 1) 1391 return OTP_FAILURE; 1392 else if (skip == 1) 1393 return OTP_PROG_SKIP; 1394 1395 return 0; 1396 } 1397 1398 static int otp_print_strap(int start, int count) 1399 { 1400 int i, j; 1401 struct otpstrap_status otpstrap[64]; 1402 1403 if (start < 0 || start > 64) 1404 return OTP_USAGE; 1405 1406 if ((start + count) < 0 || (start + count) > 64) 1407 return OTP_USAGE; 1408 1409 otp_strap_status(otpstrap); 1410 1411 printf("BIT(hex) Value Option Status\n"); 1412 printf("___________________________________________________________________________\n"); 1413 1414 for (i = start; i < start + count; i++) { 1415 printf("0x%-8X", i); 1416 printf("%-7d", otpstrap[i].value); 1417 for (j = 0; j < 7; j++) 1418 printf("%d ", otpstrap[i].option_array[j]); 1419 printf(" "); 1420 if (otpstrap[i].protected == 1) { 1421 printf("protected and not writable"); 1422 } else { 1423 printf("not protected "); 1424 if (otpstrap[i].remain_times == 0) { 1425 printf("and no remaining times to write."); 1426 } else { 1427 printf("and still can write %d times", otpstrap[i].remain_times); 1428 } 1429 } 1430 printf("\n"); 1431 } 1432 1433 return OTP_SUCCESS; 1434 } 1435 1436 static int otp_prog_strap(uint32_t *buf) 1437 { 1438 int i, j; 1439 uint32_t *strap_keep = buf + 2; 1440 uint32_t *strap_protect = buf + 4; 1441 uint32_t prog_bit, prog_address; 1442 int bit, pbit, kbit, offset; 1443 int fail = 0; 1444 int pass = 0; 1445 struct otpstrap_status otpstrap[64]; 1446 1447 printf("Read OTP Strap Region:\n"); 1448 otp_strap_status(otpstrap); 1449 1450 printf("Check writable...\n"); 1451 if (otp_strap_image_confirm(buf) == OTP_FAILURE) { 1452 printf("Input image can't program into OTP, please check.\n"); 1453 return OTP_FAILURE; 1454 } 1455 1456 for (i = 0; i < 64; i++) { 1457 printProgress(i + 1, 64, ""); 1458 prog_address = 0x800; 1459 if (i < 32) { 1460 offset = i; 1461 bit = (buf[0] >> offset) & 0x1; 1462 kbit = (strap_keep[0] >> offset) & 0x1; 1463 pbit = (strap_protect[0] >> offset) & 0x1; 1464 prog_address |= ((otpstrap[i].writeable_option * 2 + 16) / 8) * 0x200; 1465 prog_address |= ((otpstrap[i].writeable_option * 2 + 16) % 8) * 0x2; 1466 1467 } else { 1468 offset = (i - 32); 1469 bit = (buf[1] >> offset) & 0x1; 1470 kbit = (strap_keep[1] >> offset) & 0x1; 1471 pbit = (strap_protect[1] >> offset) & 0x1; 1472 prog_address |= ((otpstrap[i].writeable_option * 2 + 17) / 8) * 0x200; 1473 prog_address |= ((otpstrap[i].writeable_option * 2 + 17) % 8) * 0x2; 1474 } 1475 prog_bit = ~(0x1 << offset); 1476 1477 if (kbit == 1) { 1478 continue; 1479 } 1480 if (bit == otpstrap[i].value) { 1481 continue; 1482 } 1483 if (otpstrap[i].protected == 1) { 1484 fail = 1; 1485 continue; 1486 } 1487 if (otpstrap[i].remain_times == 0) { 1488 fail = 1; 1489 continue; 1490 } 1491 1492 1493 otp_soak(1); 1494 otp_prog(prog_address, prog_bit); 1495 1496 pass = 0; 1497 for (j = 0; j < RETRY; j++) { 1498 if (verify_bit(prog_address, offset, 1) != 0) { 1499 otp_soak(2); 1500 otp_prog(prog_address, prog_bit); 1501 if (verify_bit(prog_address, offset, 1) != 0) { 1502 otp_soak(1); 1503 } else { 1504 pass = 1; 1505 break; 1506 } 1507 } else { 1508 pass = 1; 1509 break; 1510 } 1511 } 1512 if (!pass) 1513 return OTP_FAILURE; 1514 1515 if (pbit == 0) 1516 continue; 1517 prog_address = 0x800; 1518 if (i < 32) 1519 prog_address |= 0x60c; 1520 else 1521 prog_address |= 0x60e; 1522 1523 1524 otp_soak(1); 1525 otp_prog(prog_address, prog_bit); 1526 1527 pass = 0; 1528 for (j = 0; j < RETRY; j++) { 1529 if (verify_bit(prog_address, offset, 1) != 0) { 1530 otp_soak(2); 1531 otp_prog(prog_address, prog_bit); 1532 if (verify_bit(prog_address, offset, 1) != 0) { 1533 otp_soak(1); 1534 } else { 1535 pass = 1; 1536 break; 1537 } 1538 } else { 1539 pass = 1; 1540 break; 1541 } 1542 } 1543 if (!pass) 1544 return OTP_FAILURE; 1545 1546 } 1547 otp_soak(0); 1548 if (fail == 1) 1549 return OTP_FAILURE; 1550 else 1551 return OTP_SUCCESS; 1552 1553 } 1554 1555 static void otp_prog_bit(uint32_t value, uint32_t prog_address, uint32_t bit_offset) 1556 { 1557 int prog_bit; 1558 1559 if (prog_address % 2 == 0) { 1560 if (value) 1561 prog_bit = ~(0x1 << bit_offset); 1562 else 1563 return; 1564 } else { 1565 prog_address |= 1 << 15; 1566 if (!value) 1567 prog_bit = 0x1 << bit_offset; 1568 else 1569 return; 1570 } 1571 otp_prog(prog_address, prog_bit); 1572 } 1573 1574 static int otp_prog_data(uint32_t *buf) 1575 { 1576 int i, k; 1577 int pass; 1578 uint32_t prog_address; 1579 uint32_t data[2048]; 1580 uint32_t compare[2]; 1581 uint32_t *buf_keep = &buf[2048]; 1582 1583 uint32_t data0_masked; 1584 uint32_t data1_masked; 1585 uint32_t buf0_masked; 1586 uint32_t buf1_masked; 1587 1588 printf("Read OTP Data:\n"); 1589 1590 printProgress(0, 2048, ""); 1591 for (i = 0; i < 2048 ; i += 2) { 1592 printProgress(i + 2, 2048, ""); 1593 otp_read_data(i, &data[i]); 1594 } 1595 1596 1597 printf("Check writable...\n"); 1598 for (i = 0; i < 2048; i++) { 1599 data0_masked = data[i] & ~buf_keep[i]; 1600 buf0_masked = buf[i] & ~buf_keep[i]; 1601 if (data0_masked == buf0_masked) 1602 continue; 1603 if (i % 2 == 0) { 1604 if ((data0_masked | buf0_masked) == buf0_masked) { 1605 continue; 1606 } else { 1607 printf("Input image can't program into OTP, please check.\n"); 1608 printf("OTP_ADDR[%x] = %x\n", i, data[i]); 1609 printf("Input [%x] = %x\n", i, buf[i]); 1610 printf("Mask [%x] = %x\n", i, ~buf_keep[i]); 1611 return OTP_FAILURE; 1612 } 1613 } else { 1614 if ((data0_masked & buf0_masked) == buf0_masked) { 1615 continue; 1616 } else { 1617 printf("Input image can't program into OTP, please check.\n"); 1618 printf("OTP_ADDR[%x] = %x\n", i, data[i]); 1619 printf("Input [%x] = %x\n", i, buf[i]); 1620 printf("Mask [%x] = %x\n", i, ~buf_keep[i]); 1621 return OTP_FAILURE; 1622 } 1623 } 1624 } 1625 1626 printf("Start Programing...\n"); 1627 printProgress(0, 2048, ""); 1628 1629 for (i = 0; i < 2048; i += 2) { 1630 prog_address = i; 1631 data0_masked = data[i] & ~buf_keep[i]; 1632 buf0_masked = buf[i] & ~buf_keep[i]; 1633 data1_masked = data[i + 1] & ~buf_keep[i + 1]; 1634 buf1_masked = buf[i + 1] & ~buf_keep[i + 1]; 1635 if ((data0_masked == buf0_masked) && (data1_masked == buf1_masked)) { 1636 printProgress(i + 2, 2048, "[%03X]=%08X HIT;[%03X]=%08X HIT", prog_address, buf[i], prog_address + 1, buf[i + 1]); 1637 continue; 1638 } 1639 1640 otp_soak(1); 1641 if (data1_masked == buf1_masked) { 1642 printProgress(i + 2, 2048, "[%03X]=%08X ;[%03X]=%08X HIT", prog_address, buf[i], prog_address + 1, buf[i + 1]); 1643 otp_prog_dw(buf[i], buf_keep[i], prog_address); 1644 } else if (data0_masked == buf0_masked) { 1645 printProgress(i + 2, 2048, "[%03X]=%08X HIT;[%03X]=%08X ", prog_address, buf[i], prog_address + 1, buf[i + 1]); 1646 otp_prog_dw(buf[i + 1], buf_keep[i + 1], prog_address + 1); 1647 } else { 1648 printProgress(i + 2, 2048, "[%03X]=%08X ;[%03X]=%08X ", prog_address, buf[i], prog_address + 1, buf[i + 1]); 1649 otp_prog_dw(buf[i], buf_keep[i], prog_address); 1650 otp_prog_dw(buf[i + 1], buf_keep[i + 1], prog_address + 1); 1651 } 1652 1653 pass = 0; 1654 for (k = 0; k < RETRY; k++) { 1655 if (verify_dw(prog_address, &buf[i], &buf_keep[i], compare, 2) != 0) { 1656 otp_soak(2); 1657 if (compare[0] != 0) { 1658 otp_prog_dw(compare[0], buf_keep[i], prog_address); 1659 } 1660 if (compare[1] != ~0) { 1661 otp_prog_dw(compare[1], buf_keep[i], prog_address + 1); 1662 } 1663 if (verify_dw(prog_address, &buf[i], &buf_keep[i], compare, 2) != 0) { 1664 otp_soak(1); 1665 } else { 1666 pass = 1; 1667 break; 1668 } 1669 } else { 1670 pass = 1; 1671 break; 1672 } 1673 } 1674 1675 if (!pass) { 1676 otp_soak(0); 1677 return OTP_FAILURE; 1678 } 1679 } 1680 otp_soak(0); 1681 return OTP_SUCCESS; 1682 1683 } 1684 1685 static int do_otp_prog(int addr, int byte_size, int nconfirm) 1686 { 1687 int ret; 1688 int mode = 0; 1689 int image_version = 0; 1690 uint32_t *buf; 1691 uint32_t *data_region = NULL; 1692 uint32_t *conf_region = NULL; 1693 uint32_t *strap_region = NULL; 1694 1695 buf = map_physmem(addr, byte_size, MAP_WRBACK); 1696 if (!buf) { 1697 puts("Failed to map physical memory\n"); 1698 return OTP_FAILURE; 1699 } 1700 1701 image_version = buf[0] & 0x3; 1702 if (image_version != info_cb.version) { 1703 puts("Version is not match\n"); 1704 return OTP_FAILURE; 1705 } 1706 1707 if (buf[0] & BIT(29)) { 1708 mode |= OTP_REGION_DATA; 1709 data_region = &buf[36]; 1710 } 1711 if (buf[0] & BIT(30)) { 1712 mode |= OTP_REGION_CONF; 1713 conf_region = &buf[12]; 1714 } 1715 if (buf[0] & BIT(31)) { 1716 mode |= OTP_REGION_STRAP; 1717 strap_region = &buf[4]; 1718 } 1719 1720 if (!nconfirm) { 1721 if (mode & OTP_REGION_DATA) { 1722 printf("\nOTP data region :\n"); 1723 if (otp_print_data_info(data_region) < 0) { 1724 printf("OTP data error, please check.\n"); 1725 return OTP_FAILURE; 1726 } 1727 } 1728 if (mode & OTP_REGION_STRAP) { 1729 printf("\nOTP strap region :\n"); 1730 if (otp_print_strap_image(strap_region) < 0) { 1731 printf("OTP strap error, please check.\n"); 1732 return OTP_FAILURE; 1733 } 1734 } 1735 if (mode & OTP_REGION_CONF) { 1736 printf("\nOTP configuration region :\n"); 1737 if (otp_print_conf_image(conf_region) < 0) { 1738 printf("OTP config error, please check.\n"); 1739 return OTP_FAILURE; 1740 } 1741 } 1742 1743 printf("type \"YES\" (no quotes) to continue:\n"); 1744 if (!confirm_yesno()) { 1745 printf(" Aborting\n"); 1746 return OTP_FAILURE; 1747 } 1748 } 1749 1750 if (mode & OTP_REGION_DATA) { 1751 printf("programing data region ...\n"); 1752 ret = otp_prog_data(data_region); 1753 if (ret != 0) { 1754 printf("Error\n"); 1755 return ret; 1756 } else { 1757 printf("Done\n"); 1758 } 1759 } 1760 if (mode & OTP_REGION_STRAP) { 1761 printf("programing strap region ...\n"); 1762 ret = otp_prog_strap(strap_region); 1763 if (ret != 0) { 1764 printf("Error\n"); 1765 return ret; 1766 } else { 1767 printf("Done\n"); 1768 } 1769 } 1770 if (mode & OTP_REGION_CONF) { 1771 printf("programing configuration region ...\n"); 1772 ret = otp_prog_conf(conf_region); 1773 if (ret != 0) { 1774 printf("Error\n"); 1775 return ret; 1776 } 1777 printf("Done\n"); 1778 } 1779 1780 return OTP_SUCCESS; 1781 } 1782 1783 static int do_otp_prog_bit(int mode, int otp_dw_offset, int bit_offset, int value, int nconfirm) 1784 { 1785 uint32_t read[2]; 1786 uint32_t strap_buf[6]; 1787 uint32_t prog_address = 0; 1788 struct otpstrap_status otpstrap[64]; 1789 int otp_bit; 1790 int i; 1791 int pass; 1792 int ret; 1793 1794 switch (mode) { 1795 case OTP_REGION_CONF: 1796 otp_read_config(otp_dw_offset, read); 1797 prog_address = 0x800; 1798 prog_address |= (otp_dw_offset / 8) * 0x200; 1799 prog_address |= (otp_dw_offset % 8) * 0x2; 1800 otp_bit = (read[0] >> bit_offset) & 0x1; 1801 if (otp_bit == value) { 1802 printf("OTPCFG%X[%X] = %d\n", otp_dw_offset, bit_offset, value); 1803 printf("No need to program\n"); 1804 return OTP_SUCCESS; 1805 } 1806 if (otp_bit == 1 && value == 0) { 1807 printf("OTPCFG%X[%X] = 1\n", otp_dw_offset, bit_offset); 1808 printf("OTP is programed, which can't be clean\n"); 1809 return OTP_FAILURE; 1810 } 1811 printf("Program OTPCFG%X[%X] to 1\n", otp_dw_offset, bit_offset); 1812 break; 1813 case OTP_REGION_DATA: 1814 prog_address = otp_dw_offset; 1815 1816 if (otp_dw_offset % 2 == 0) { 1817 otp_read_data(otp_dw_offset, read); 1818 otp_bit = (read[0] >> bit_offset) & 0x1; 1819 1820 if (otp_bit == 1 && value == 0) { 1821 printf("OTPDATA%X[%X] = 1\n", otp_dw_offset, bit_offset); 1822 printf("OTP is programed, which can't be cleaned\n"); 1823 return OTP_FAILURE; 1824 } 1825 } else { 1826 otp_read_data(otp_dw_offset - 1, read); 1827 otp_bit = (read[1] >> bit_offset) & 0x1; 1828 1829 if (otp_bit == 0 && value == 1) { 1830 printf("OTPDATA%X[%X] = 1\n", otp_dw_offset, bit_offset); 1831 printf("OTP is programed, which can't be writen\n"); 1832 return OTP_FAILURE; 1833 } 1834 } 1835 if (otp_bit == value) { 1836 printf("OTPDATA%X[%X] = %d\n", otp_dw_offset, bit_offset, value); 1837 printf("No need to program\n"); 1838 return OTP_SUCCESS; 1839 } 1840 1841 printf("Program OTPDATA%X[%X] to 1\n", otp_dw_offset, bit_offset); 1842 break; 1843 case OTP_REGION_STRAP: 1844 otp_strap_status(otpstrap); 1845 otp_print_strap(bit_offset, 1); 1846 if (bit_offset < 32) { 1847 strap_buf[0] = value << bit_offset; 1848 strap_buf[2] = ~BIT(bit_offset); 1849 strap_buf[3] = ~0; 1850 strap_buf[5] = 0; 1851 // if (protect) 1852 // strap_buf[4] = BIT(bit_offset); 1853 // else 1854 // strap_buf[4] = 0; 1855 } else { 1856 strap_buf[1] = value << (bit_offset - 32); 1857 strap_buf[2] = ~0; 1858 strap_buf[3] = ~BIT(bit_offset - 32); 1859 strap_buf[4] = 0; 1860 // if (protect) 1861 // strap_buf[5] = BIT(bit_offset - 32); 1862 // else 1863 // strap_buf[5] = 0; 1864 } 1865 ret = otp_strap_image_confirm(strap_buf); 1866 if (ret == OTP_FAILURE) 1867 return OTP_FAILURE; 1868 else if (ret == OTP_PROG_SKIP) 1869 return OTP_SUCCESS; 1870 1871 break; 1872 } 1873 1874 if (!nconfirm) { 1875 printf("type \"YES\" (no quotes) to continue:\n"); 1876 if (!confirm_yesno()) { 1877 printf(" Aborting\n"); 1878 return OTP_FAILURE; 1879 } 1880 } 1881 1882 switch (mode) { 1883 case OTP_REGION_STRAP: 1884 return otp_prog_strap(strap_buf); 1885 case OTP_REGION_CONF: 1886 case OTP_REGION_DATA: 1887 otp_soak(1); 1888 otp_prog_bit(value, prog_address, bit_offset); 1889 pass = 0; 1890 1891 for (i = 0; i < RETRY; i++) { 1892 if (verify_bit(prog_address, bit_offset, value) != 0) { 1893 otp_soak(2); 1894 otp_prog_bit(value, prog_address, bit_offset); 1895 if (verify_bit(prog_address, bit_offset, value) != 0) { 1896 otp_soak(1); 1897 } else { 1898 pass = 1; 1899 break; 1900 } 1901 } else { 1902 pass = 1; 1903 break; 1904 } 1905 } 1906 1907 otp_soak(0); 1908 if (pass) { 1909 printf("SUCCESS\n"); 1910 return OTP_SUCCESS; 1911 } else { 1912 printf("OTP cannot be programed\n"); 1913 printf("FAILED\n"); 1914 return OTP_FAILURE; 1915 } 1916 } 1917 1918 return OTP_USAGE; 1919 } 1920 1921 static int do_otpread(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) 1922 { 1923 uint32_t offset, count; 1924 int ret; 1925 1926 if (argc == 4) { 1927 offset = simple_strtoul(argv[2], NULL, 16); 1928 count = simple_strtoul(argv[3], NULL, 16); 1929 } else if (argc == 3) { 1930 offset = simple_strtoul(argv[2], NULL, 16); 1931 count = 1; 1932 } else { 1933 return CMD_RET_USAGE; 1934 } 1935 1936 1937 if (!strcmp(argv[1], "conf")) { 1938 writel(OTP_PASSWD, OTP_PROTECT_KEY); //password 1939 ret = otp_print_config(offset, count); 1940 } else if (!strcmp(argv[1], "data")) { 1941 writel(OTP_PASSWD, OTP_PROTECT_KEY); //password 1942 ret = otp_print_data(offset, count); 1943 } else if (!strcmp(argv[1], "strap")) { 1944 writel(OTP_PASSWD, OTP_PROTECT_KEY); //password 1945 ret = otp_print_strap(offset, count); 1946 } else { 1947 return CMD_RET_USAGE; 1948 } 1949 1950 if (ret == OTP_SUCCESS) 1951 return CMD_RET_SUCCESS; 1952 else 1953 return CMD_RET_USAGE; 1954 1955 } 1956 1957 static int do_otpprog(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) 1958 { 1959 phys_addr_t addr; 1960 uint32_t byte_size; 1961 int ret; 1962 1963 if (argc == 4) { 1964 if (strcmp(argv[1], "o")) 1965 return CMD_RET_USAGE; 1966 addr = simple_strtoul(argv[2], NULL, 16); 1967 byte_size = simple_strtoul(argv[3], NULL, 16); 1968 writel(OTP_PASSWD, OTP_PROTECT_KEY); //password 1969 ret = do_otp_prog(addr, byte_size, 1); 1970 } else if (argc == 3) { 1971 addr = simple_strtoul(argv[1], NULL, 16); 1972 byte_size = simple_strtoul(argv[2], NULL, 16); 1973 writel(OTP_PASSWD, OTP_PROTECT_KEY); //password 1974 ret = do_otp_prog(addr, byte_size, 0); 1975 } else { 1976 return CMD_RET_USAGE; 1977 } 1978 1979 if (ret == OTP_SUCCESS) 1980 return CMD_RET_SUCCESS; 1981 else if (ret == OTP_FAILURE) 1982 return CMD_RET_FAILURE; 1983 else 1984 return CMD_RET_USAGE; 1985 } 1986 1987 static int do_otppb(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) 1988 { 1989 int mode = 0; 1990 int nconfirm = 0; 1991 int otp_addr = 0; 1992 int bit_offset; 1993 int value; 1994 int ret; 1995 1996 if (argc != 4 && argc != 5 && argc != 6) 1997 return CMD_RET_USAGE; 1998 1999 /* Drop the pb cmd */ 2000 argc--; 2001 argv++; 2002 2003 if (!strcmp(argv[0], "conf")) 2004 mode = OTP_REGION_CONF; 2005 else if (!strcmp(argv[0], "strap")) 2006 mode = OTP_REGION_STRAP; 2007 else if (!strcmp(argv[0], "data")) 2008 mode = OTP_REGION_DATA; 2009 else 2010 return CMD_RET_USAGE; 2011 2012 /* Drop the region cmd */ 2013 argc--; 2014 argv++; 2015 2016 if (!strcmp(argv[0], "o")) { 2017 nconfirm = 1; 2018 /* Drop the force option */ 2019 argc--; 2020 argv++; 2021 } 2022 2023 if (mode == OTP_REGION_STRAP) { 2024 bit_offset = simple_strtoul(argv[0], NULL, 16); 2025 value = simple_strtoul(argv[1], NULL, 16); 2026 if (bit_offset >= 64 || (value != 0 && value != 1)) 2027 return CMD_RET_USAGE; 2028 } else { 2029 otp_addr = simple_strtoul(argv[0], NULL, 16); 2030 bit_offset = simple_strtoul(argv[1], NULL, 16); 2031 value = simple_strtoul(argv[2], NULL, 16); 2032 if (bit_offset >= 32 || (value != 0 && value != 1)) 2033 return CMD_RET_USAGE; 2034 if (mode == OTP_REGION_DATA) { 2035 if (otp_addr >= 0x800) 2036 return CMD_RET_USAGE; 2037 } else { 2038 if (otp_addr >= 0x20) 2039 return CMD_RET_USAGE; 2040 } 2041 } 2042 if (value != 0 && value != 1) 2043 return CMD_RET_USAGE; 2044 2045 writel(OTP_PASSWD, OTP_PROTECT_KEY); //password 2046 ret = do_otp_prog_bit(mode, otp_addr, bit_offset, value, nconfirm); 2047 2048 if (ret == OTP_SUCCESS) 2049 return CMD_RET_SUCCESS; 2050 else if (ret == OTP_FAILURE) 2051 return CMD_RET_FAILURE; 2052 else 2053 return CMD_RET_USAGE; 2054 } 2055 2056 static int do_otpcmp(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) 2057 { 2058 phys_addr_t addr; 2059 int otp_addr = 0; 2060 2061 if (argc != 3) 2062 return CMD_RET_USAGE; 2063 2064 writel(OTP_PASSWD, OTP_PROTECT_KEY); //password 2065 addr = simple_strtoul(argv[1], NULL, 16); 2066 otp_addr = simple_strtoul(argv[2], NULL, 16); 2067 if (otp_compare(otp_addr, addr) == 0) { 2068 printf("Compare pass\n"); 2069 return CMD_RET_SUCCESS; 2070 } else { 2071 printf("Compare fail\n"); 2072 return CMD_RET_FAILURE; 2073 } 2074 } 2075 2076 static int do_otpinfo(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) 2077 { 2078 int view = 0; 2079 int input; 2080 2081 if (argc != 2 && argc != 3) 2082 return CMD_RET_USAGE; 2083 2084 if (!strcmp(argv[1], "conf")) { 2085 2086 writel(OTP_PASSWD, OTP_PROTECT_KEY); //password 2087 if (argc == 3) { 2088 input = simple_strtoul(argv[2], NULL, 16); 2089 otp_print_conf_info(input); 2090 } else { 2091 otp_print_conf_info(-1); 2092 } 2093 } else if (!strcmp(argv[1], "strap")) { 2094 if (!strcmp(argv[2], "v")) { 2095 view = 1; 2096 /* Drop the view option */ 2097 argc--; 2098 argv++; 2099 } 2100 writel(OTP_PASSWD, OTP_PROTECT_KEY); //password 2101 otp_print_strap_info(view); 2102 } else { 2103 return CMD_RET_USAGE; 2104 } 2105 2106 return CMD_RET_SUCCESS; 2107 } 2108 2109 static int do_otpprotect(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) 2110 { 2111 int input; 2112 int bit_offset; 2113 int prog_address; 2114 int pass; 2115 int i; 2116 if (argc != 3 && argc != 2) 2117 return CMD_RET_USAGE; 2118 2119 if (!strcmp(argv[0], "o")) { 2120 input = simple_strtoul(argv[2], NULL, 16); 2121 } else { 2122 input = simple_strtoul(argv[1], NULL, 16); 2123 printf("OTPSTRAP[%d] will be protected\n", input); 2124 printf("type \"YES\" (no quotes) to continue:\n"); 2125 if (!confirm_yesno()) { 2126 printf(" Aborting\n"); 2127 return CMD_RET_FAILURE; 2128 } 2129 } 2130 2131 prog_address = 0x800; 2132 if (input < 32) { 2133 bit_offset = input; 2134 prog_address |= 0x60c; 2135 } else if (input < 64) { 2136 bit_offset = input - 32; 2137 prog_address |= 0x60e; 2138 } else { 2139 return CMD_RET_USAGE; 2140 } 2141 2142 if (verify_bit(prog_address, bit_offset, 1) == 0) { 2143 printf("OTPSTRAP[%d] already protected\n", input); 2144 } 2145 2146 otp_soak(1); 2147 otp_prog_bit(1, prog_address, bit_offset); 2148 pass = 0; 2149 2150 for (i = 0; i < RETRY; i++) { 2151 if (verify_bit(prog_address, bit_offset, 1) != 0) { 2152 otp_soak(2); 2153 otp_prog_bit(1, prog_address, bit_offset); 2154 if (verify_bit(prog_address, bit_offset, 1) != 0) { 2155 otp_soak(1); 2156 } else { 2157 pass = 1; 2158 break; 2159 } 2160 } else { 2161 pass = 1; 2162 break; 2163 } 2164 } 2165 otp_soak(0); 2166 if (pass) { 2167 printf("OTPSTRAP[%d] is protected\n", input); 2168 return CMD_RET_SUCCESS; 2169 } 2170 2171 printf("Protect OTPSTRAP[%d] fail\n", input); 2172 return CMD_RET_FAILURE; 2173 2174 } 2175 2176 static cmd_tbl_t cmd_otp[] = { 2177 U_BOOT_CMD_MKENT(read, 4, 0, do_otpread, "", ""), 2178 U_BOOT_CMD_MKENT(info, 3, 0, do_otpinfo, "", ""), 2179 U_BOOT_CMD_MKENT(prog, 4, 0, do_otpprog, "", ""), 2180 U_BOOT_CMD_MKENT(pb, 6, 0, do_otppb, "", ""), 2181 U_BOOT_CMD_MKENT(protect, 3, 0, do_otpprotect, "", ""), 2182 U_BOOT_CMD_MKENT(cmp, 3, 0, do_otpcmp, "", ""), 2183 }; 2184 2185 static int do_ast_otp(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) 2186 { 2187 cmd_tbl_t *cp; 2188 2189 cp = find_cmd_tbl(argv[1], cmd_otp, ARRAY_SIZE(cmd_otp)); 2190 2191 /* Drop the otp command */ 2192 argc--; 2193 argv++; 2194 2195 if (cp == NULL || argc > cp->maxargs) 2196 return CMD_RET_USAGE; 2197 if (flag == CMD_FLAG_REPEAT && !cmd_is_repeatable(cp)) 2198 return CMD_RET_SUCCESS; 2199 2200 if (chip_version() == 0) { 2201 info_cb.version = 0; 2202 info_cb.conf_info = a0_conf_info; 2203 info_cb.conf_info_len = ARRAY_SIZE(a0_conf_info); 2204 info_cb.strap_info = a0_strap_info; 2205 info_cb.strap_info_len = ARRAY_SIZE(a0_strap_info); 2206 info_cb.key_info = a0_key_type; 2207 info_cb.key_info_len = ARRAY_SIZE(a0_key_type); 2208 } else if (chip_version() == 1) { 2209 info_cb.version = 1; 2210 info_cb.conf_info = a1_conf_info; 2211 info_cb.conf_info_len = ARRAY_SIZE(a1_conf_info); 2212 info_cb.strap_info = a1_strap_info; 2213 info_cb.strap_info_len = ARRAY_SIZE(a1_strap_info); 2214 info_cb.key_info = a1_key_type; 2215 info_cb.key_info_len = ARRAY_SIZE(a1_key_type); 2216 } 2217 2218 return cp->cmd(cmdtp, flag, argc, argv); 2219 } 2220 2221 U_BOOT_CMD( 2222 otp, 7, 0, do_ast_otp, 2223 "ASPEED One-Time-Programmable sub-system", 2224 "read conf|data <otp_dw_offset> <dw_count>\n" 2225 "otp read strap <strap_bit_offset> <bit_count>\n" 2226 "otp info strap [v]\n" 2227 "otp info conf [otp_dw_offset]\n" 2228 "otp prog [o] <addr> <byte_size>\n" 2229 "otp pb conf|data [o] <otp_dw_offset> <bit_offset> <value>\n" 2230 "otp pb strap [o] <bit_offset> <value>\n" 2231 "otp protect [o] <bit_offset>\n" 2232 "otp cmp <addr> <otp_dw_offset>\n" 2233 ); 2234