1 /* 2 * Copyright (C) 2015 Technexion Ltd. 3 * 4 * Author: Richard Hu <richard.hu@technexion.com> 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 #include <asm/arch/clock.h> 10 #include <asm/arch/iomux.h> 11 #include <asm/arch/imx-regs.h> 12 #include <asm/arch/crm_regs.h> 13 #include <asm/arch/mx6-pins.h> 14 #include <asm/arch/sys_proto.h> 15 #include <asm/gpio.h> 16 #include <asm/imx-common/iomux-v3.h> 17 #include <asm/io.h> 18 #include <common.h> 19 #include <miiphy.h> 20 #include <netdev.h> 21 #include <fsl_esdhc.h> 22 #include <linux/sizes.h> 23 #include <usb.h> 24 25 DECLARE_GLOBAL_DATA_PTR; 26 27 #define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ 28 PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ 29 PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) 30 31 #define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ 32 PAD_CTL_PUS_22K_UP | PAD_CTL_SPEED_LOW | \ 33 PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) 34 35 #define OTG_ID_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ 36 PAD_CTL_PUS_47K_UP | PAD_CTL_SPEED_LOW | \ 37 PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) 38 39 #define MDIO_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_PUE | \ 40 PAD_CTL_DSE_48ohm | PAD_CTL_SRE_FAST | PAD_CTL_ODE) 41 42 #define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_PUE | \ 43 PAD_CTL_SPEED_HIGH | \ 44 PAD_CTL_DSE_48ohm | PAD_CTL_SRE_FAST) 45 46 #define ENET_CLK_PAD_CTRL (PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST) 47 48 #define RMII_PHY_RESET IMX_GPIO_NR(1, 28) 49 50 static iomux_v3_cfg_t const fec_pads[] = { 51 MX6_PAD_ENET1_TX_EN__ENET2_MDC | MUX_PAD_CTRL(MDIO_PAD_CTRL), 52 MX6_PAD_ENET1_TX_DATA1__ENET2_MDIO | MUX_PAD_CTRL(MDIO_PAD_CTRL), 53 MX6_PAD_ENET2_TX_DATA0__ENET2_TDATA00 | MUX_PAD_CTRL(ENET_PAD_CTRL), 54 MX6_PAD_ENET2_TX_DATA1__ENET2_TDATA01 | MUX_PAD_CTRL(ENET_PAD_CTRL), 55 MX6_PAD_ENET2_TX_CLK__ENET2_REF_CLK2 | MUX_PAD_CTRL(ENET_CLK_PAD_CTRL), 56 MX6_PAD_ENET2_TX_EN__ENET2_TX_EN | MUX_PAD_CTRL(ENET_PAD_CTRL), 57 MX6_PAD_ENET2_RX_DATA0__ENET2_RDATA00 | MUX_PAD_CTRL(ENET_PAD_CTRL), 58 MX6_PAD_ENET2_RX_DATA1__ENET2_RDATA01 | MUX_PAD_CTRL(ENET_PAD_CTRL), 59 MX6_PAD_ENET2_RX_EN__ENET2_RX_EN | MUX_PAD_CTRL(ENET_PAD_CTRL), 60 MX6_PAD_ENET2_RX_ER__ENET2_RX_ER | MUX_PAD_CTRL(ENET_PAD_CTRL), 61 MX6_PAD_UART4_TX_DATA__GPIO1_IO28 | MUX_PAD_CTRL(NO_PAD_CTRL), 62 }; 63 64 static void setup_iomux_fec(void) 65 { 66 imx_iomux_v3_setup_multiple_pads(fec_pads, ARRAY_SIZE(fec_pads)); 67 } 68 69 int board_eth_init(bd_t *bis) 70 { 71 setup_iomux_fec(); 72 73 gpio_direction_output(RMII_PHY_RESET, 0); 74 /* 75 * According to KSZ8081MNX-RNB manual: 76 * For warm reset, the reset (RST#) pin should be asserted low for a 77 * minimum of 500μs. The strap-in pin values are read and updated 78 * at the de-assertion of reset. 79 */ 80 udelay(500); 81 82 gpio_direction_output(RMII_PHY_RESET, 1); 83 /* 84 * According to KSZ8081MNX-RNB manual: 85 * After the de-assertion of reset, wait a minimum of 100μs before 86 * starting programming on the MIIM (MDC/MDIO) interface. 87 */ 88 udelay(100); 89 90 return fecmxc_initialize(bis); 91 } 92 93 static int setup_fec(void) 94 { 95 struct iomuxc *const iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR; 96 int ret; 97 98 clrsetbits_le32(&iomuxc_regs->gpr[1], IOMUX_GPR1_FEC2_MASK, 99 IOMUX_GPR1_FEC2_CLOCK_MUX1_SEL_MASK); 100 101 ret = enable_fec_anatop_clock(1, ENET_50MHZ); 102 if (ret) 103 return ret; 104 105 enable_enet_clk(1); 106 107 return 0; 108 } 109 110 int board_phy_config(struct phy_device *phydev) 111 { 112 phy_write(phydev, MDIO_DEVAD_NONE, 0x1f, 0x8190); 113 114 if (phydev->drv->config) 115 phydev->drv->config(phydev); 116 117 return 0; 118 } 119 120 int dram_init(void) 121 { 122 gd->ram_size = imx_ddr_size(); 123 124 return 0; 125 } 126 127 static iomux_v3_cfg_t const uart6_pads[] = { 128 MX6_PAD_CSI_MCLK__UART6_DCE_TX | MUX_PAD_CTRL(UART_PAD_CTRL), 129 MX6_PAD_CSI_PIXCLK__UART6_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL), 130 }; 131 132 static iomux_v3_cfg_t const usdhc1_pads[] = { 133 MX6_PAD_SD1_CLK__USDHC1_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), 134 MX6_PAD_SD1_CMD__USDHC1_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), 135 MX6_PAD_SD1_DATA0__USDHC1_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), 136 MX6_PAD_SD1_DATA1__USDHC1_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), 137 MX6_PAD_SD1_DATA2__USDHC1_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), 138 MX6_PAD_SD1_DATA3__USDHC1_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), 139 MX6_PAD_NAND_READY_B__USDHC1_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL), 140 MX6_PAD_NAND_CE0_B__USDHC1_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL), 141 MX6_PAD_NAND_CE1_B__USDHC1_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL), 142 MX6_PAD_NAND_CLE__USDHC1_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL), 143 }; 144 145 #define USB_OTHERREGS_OFFSET 0x800 146 #define UCTRL_PWR_POL (1 << 9) 147 148 static iomux_v3_cfg_t const usb_otg_pad[] = { 149 MX6_PAD_GPIO1_IO00__ANATOP_OTG1_ID | MUX_PAD_CTRL(OTG_ID_PAD_CTRL), 150 }; 151 152 static void setup_iomux_uart(void) 153 { 154 imx_iomux_v3_setup_multiple_pads(uart6_pads, ARRAY_SIZE(uart6_pads)); 155 } 156 157 static void setup_usb(void) 158 { 159 imx_iomux_v3_setup_multiple_pads(usb_otg_pad, ARRAY_SIZE(usb_otg_pad)); 160 } 161 162 static struct fsl_esdhc_cfg usdhc_cfg[1] = { 163 {USDHC1_BASE_ADDR}, 164 }; 165 166 int board_mmc_getcd(struct mmc *mmc) 167 { 168 return 1; 169 } 170 171 int board_mmc_init(bd_t *bis) 172 { 173 imx_iomux_v3_setup_multiple_pads(usdhc1_pads, ARRAY_SIZE(usdhc1_pads)); 174 usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK); 175 return fsl_esdhc_initialize(bis, &usdhc_cfg[0]); 176 } 177 178 int board_early_init_f(void) 179 { 180 setup_iomux_uart(); 181 182 return 0; 183 } 184 185 int board_usb_phy_mode(int port) 186 { 187 if (port == 1) 188 return USB_INIT_HOST; 189 else 190 return USB_INIT_DEVICE; 191 } 192 193 int board_ehci_hcd_init(int port) 194 { 195 u32 *usbnc_usb_ctrl; 196 197 if (port > 1) 198 return -EINVAL; 199 200 usbnc_usb_ctrl = (u32 *)(USB_BASE_ADDR + USB_OTHERREGS_OFFSET + 201 port * 4); 202 203 /* Set Power polarity */ 204 setbits_le32(usbnc_usb_ctrl, UCTRL_PWR_POL); 205 206 return 0; 207 } 208 209 int board_init(void) 210 { 211 /* Address of boot parameters */ 212 gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; 213 214 setup_fec(); 215 setup_usb(); 216 217 return 0; 218 } 219 220 int checkboard(void) 221 { 222 puts("Board: PICO-IMX6UL-EMMC\n"); 223 224 return 0; 225 } 226