15e918a98SKim Phillips /* 2*9993e196SKim Phillips * Copyright (C) 2006-2009 Freescale Semiconductor, Inc. 35e918a98SKim Phillips * 45e918a98SKim Phillips * See file CREDITS for list of people who contributed to this 55e918a98SKim Phillips * project. 65e918a98SKim Phillips * 75e918a98SKim Phillips * This program is free software; you can redistribute it and/or 85e918a98SKim Phillips * modify it under the terms of the GNU General Public License as 95e918a98SKim Phillips * published by the Free Software Foundation; either version 2 of 105e918a98SKim Phillips * the License, or (at your option) any later version. 115e918a98SKim Phillips */ 125e918a98SKim Phillips 135e918a98SKim Phillips #include <common.h> 145e918a98SKim Phillips #include <mpc83xx.h> 155e918a98SKim Phillips #include <pci.h> 167e915580SAnton Vorontsov #include <asm/io.h> 175e918a98SKim Phillips 185e918a98SKim Phillips static struct pci_region pci_regions[] = { 195e918a98SKim Phillips { 206d0f6bcfSJean-Christophe PLAGNIOL-VILLARD bus_start: CONFIG_SYS_PCI_MEM_BASE, 216d0f6bcfSJean-Christophe PLAGNIOL-VILLARD phys_start: CONFIG_SYS_PCI_MEM_PHYS, 226d0f6bcfSJean-Christophe PLAGNIOL-VILLARD size: CONFIG_SYS_PCI_MEM_SIZE, 235e918a98SKim Phillips flags: PCI_REGION_MEM | PCI_REGION_PREFETCH 245e918a98SKim Phillips }, 255e918a98SKim Phillips { 266d0f6bcfSJean-Christophe PLAGNIOL-VILLARD bus_start: CONFIG_SYS_PCI_MMIO_BASE, 276d0f6bcfSJean-Christophe PLAGNIOL-VILLARD phys_start: CONFIG_SYS_PCI_MMIO_PHYS, 286d0f6bcfSJean-Christophe PLAGNIOL-VILLARD size: CONFIG_SYS_PCI_MMIO_SIZE, 295e918a98SKim Phillips flags: PCI_REGION_MEM 305e918a98SKim Phillips }, 315e918a98SKim Phillips { 326d0f6bcfSJean-Christophe PLAGNIOL-VILLARD bus_start: CONFIG_SYS_PCI_IO_BASE, 336d0f6bcfSJean-Christophe PLAGNIOL-VILLARD phys_start: CONFIG_SYS_PCI_IO_PHYS, 346d0f6bcfSJean-Christophe PLAGNIOL-VILLARD size: CONFIG_SYS_PCI_IO_SIZE, 355e918a98SKim Phillips flags: PCI_REGION_IO 365e918a98SKim Phillips } 375e918a98SKim Phillips }; 385e918a98SKim Phillips 397e915580SAnton Vorontsov static struct pci_region pcie_regions_0[] = { 407e915580SAnton Vorontsov { 417e915580SAnton Vorontsov .bus_start = CONFIG_SYS_PCIE1_MEM_BASE, 427e915580SAnton Vorontsov .phys_start = CONFIG_SYS_PCIE1_MEM_PHYS, 437e915580SAnton Vorontsov .size = CONFIG_SYS_PCIE1_MEM_SIZE, 447e915580SAnton Vorontsov .flags = PCI_REGION_MEM, 457e915580SAnton Vorontsov }, 467e915580SAnton Vorontsov { 477e915580SAnton Vorontsov .bus_start = CONFIG_SYS_PCIE1_IO_BASE, 487e915580SAnton Vorontsov .phys_start = CONFIG_SYS_PCIE1_IO_PHYS, 497e915580SAnton Vorontsov .size = CONFIG_SYS_PCIE1_IO_SIZE, 507e915580SAnton Vorontsov .flags = PCI_REGION_IO, 517e915580SAnton Vorontsov }, 527e915580SAnton Vorontsov }; 537e915580SAnton Vorontsov 547e915580SAnton Vorontsov static struct pci_region pcie_regions_1[] = { 557e915580SAnton Vorontsov { 567e915580SAnton Vorontsov .bus_start = CONFIG_SYS_PCIE2_MEM_BASE, 577e915580SAnton Vorontsov .phys_start = CONFIG_SYS_PCIE2_MEM_PHYS, 587e915580SAnton Vorontsov .size = CONFIG_SYS_PCIE2_MEM_SIZE, 597e915580SAnton Vorontsov .flags = PCI_REGION_MEM, 607e915580SAnton Vorontsov }, 617e915580SAnton Vorontsov { 627e915580SAnton Vorontsov .bus_start = CONFIG_SYS_PCIE2_IO_BASE, 637e915580SAnton Vorontsov .phys_start = CONFIG_SYS_PCIE2_IO_PHYS, 647e915580SAnton Vorontsov .size = CONFIG_SYS_PCIE2_IO_SIZE, 657e915580SAnton Vorontsov .flags = PCI_REGION_IO, 667e915580SAnton Vorontsov }, 677e915580SAnton Vorontsov }; 687e915580SAnton Vorontsov 695e918a98SKim Phillips void pci_init_board(void) 705e918a98SKim Phillips { 716d0f6bcfSJean-Christophe PLAGNIOL-VILLARD volatile immap_t *immr = (volatile immap_t *)CONFIG_SYS_IMMR; 727e915580SAnton Vorontsov volatile sysconf83xx_t *sysconf = &immr->sysconf; 735e918a98SKim Phillips volatile clk83xx_t *clk = (volatile clk83xx_t *)&immr->clk; 745e918a98SKim Phillips volatile law83xx_t *pci_law = immr->sysconf.pcilaw; 757e915580SAnton Vorontsov volatile law83xx_t *pcie_law = sysconf->pcielaw; 765e918a98SKim Phillips struct pci_region *reg[] = { pci_regions }; 777e915580SAnton Vorontsov struct pci_region *pcie_reg[] = { pcie_regions_0, pcie_regions_1, }; 787e915580SAnton Vorontsov u32 spridr = in_be32(&immr->sysconf.spridr); 795e918a98SKim Phillips 805e918a98SKim Phillips /* Enable all 5 PCI_CLK_OUTPUTS */ 815e918a98SKim Phillips clk->occr |= 0xf8000000; 825e918a98SKim Phillips udelay(2000); 835e918a98SKim Phillips 845e918a98SKim Phillips /* Configure PCI Local Access Windows */ 856d0f6bcfSJean-Christophe PLAGNIOL-VILLARD pci_law[0].bar = CONFIG_SYS_PCI_MEM_PHYS & LAWBAR_BAR; 865e918a98SKim Phillips pci_law[0].ar = LBLAWAR_EN | LBLAWAR_512MB; 875e918a98SKim Phillips 886d0f6bcfSJean-Christophe PLAGNIOL-VILLARD pci_law[1].bar = CONFIG_SYS_PCI_IO_PHYS & LAWBAR_BAR; 895e918a98SKim Phillips pci_law[1].ar = LBLAWAR_EN | LBLAWAR_1MB; 905e918a98SKim Phillips 915e918a98SKim Phillips mpc83xx_pci_init(1, reg, 0); 927e915580SAnton Vorontsov 937e915580SAnton Vorontsov /* There is no PEX in MPC8379 parts. */ 947e915580SAnton Vorontsov if (PARTID_NO_E(spridr) == SPR_8379) 957e915580SAnton Vorontsov return; 967e915580SAnton Vorontsov 977e915580SAnton Vorontsov /* Configure the clock for PCIE controller */ 987e915580SAnton Vorontsov clrsetbits_be32(&clk->sccr, SCCR_PCIEXP1CM | SCCR_PCIEXP2CM, 997e915580SAnton Vorontsov SCCR_PCIEXP1CM_1 | SCCR_PCIEXP2CM_1); 1007e915580SAnton Vorontsov 1017e915580SAnton Vorontsov /* Deassert the resets in the control register */ 1027e915580SAnton Vorontsov out_be32(&sysconf->pecr1, 0xE0008000); 1037e915580SAnton Vorontsov out_be32(&sysconf->pecr2, 0xE0008000); 1047e915580SAnton Vorontsov udelay(2000); 1057e915580SAnton Vorontsov 1067e915580SAnton Vorontsov /* Configure PCI Express Local Access Windows */ 1077e915580SAnton Vorontsov out_be32(&pcie_law[0].bar, CONFIG_SYS_PCIE1_BASE & LAWBAR_BAR); 1087e915580SAnton Vorontsov out_be32(&pcie_law[0].ar, LBLAWAR_EN | LBLAWAR_512MB); 1097e915580SAnton Vorontsov 1107e915580SAnton Vorontsov out_be32(&pcie_law[1].bar, CONFIG_SYS_PCIE2_BASE & LAWBAR_BAR); 1117e915580SAnton Vorontsov out_be32(&pcie_law[1].ar, LBLAWAR_EN | LBLAWAR_512MB); 1127e915580SAnton Vorontsov 1137e915580SAnton Vorontsov mpc83xx_pcie_init(2, pcie_reg, 0); 1145e918a98SKim Phillips } 115