1e58fe957SKim Phillips /* 29993e196SKim Phillips * Copyright (C) 2006-2009 Freescale Semiconductor, Inc. 3e58fe957SKim Phillips * 4e58fe957SKim Phillips * See file CREDITS for list of people who contributed to this 5e58fe957SKim Phillips * project. 6e58fe957SKim Phillips * 7e58fe957SKim Phillips * This program is free software; you can redistribute it and/or 8e58fe957SKim Phillips * modify it under the terms of the GNU General Public License as 9e58fe957SKim Phillips * published by the Free Software Foundation; either version 2 of 10e58fe957SKim Phillips * the License, or (at your option) any later version. 11e58fe957SKim Phillips * 12e58fe957SKim Phillips * This program is distributed in the hope that it will be useful, 13e58fe957SKim Phillips * but WITHOUT ANY WARRANTY; without even the implied warranty of 14e58fe957SKim Phillips * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15e58fe957SKim Phillips * GNU General Public License for more details. 16e58fe957SKim Phillips * 17e58fe957SKim Phillips * You should have received a copy of the GNU General Public License 18e58fe957SKim Phillips * along with this program; if not, write to the Free Software 19e58fe957SKim Phillips * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 20e58fe957SKim Phillips * MA 02111-1307 USA 21e58fe957SKim Phillips */ 22e58fe957SKim Phillips 23e58fe957SKim Phillips #include <common.h> 24e58fe957SKim Phillips 25e58fe957SKim Phillips #include <asm/mmu.h> 269993e196SKim Phillips #include <asm/io.h> 279993e196SKim Phillips #include <mpc83xx.h> 28e58fe957SKim Phillips #include <pci.h> 29e58fe957SKim Phillips #include <i2c.h> 309993e196SKim Phillips #include <asm/fsl_i2c.h> 31e58fe957SKim Phillips 32e58fe957SKim Phillips DECLARE_GLOBAL_DATA_PTR; 33e58fe957SKim Phillips 349993e196SKim Phillips static struct pci_region pci1_regions[] = { 35e58fe957SKim Phillips { 369993e196SKim Phillips bus_start: CONFIG_SYS_PCI1_MEM_BASE, 379993e196SKim Phillips phys_start: CONFIG_SYS_PCI1_MEM_PHYS, 389993e196SKim Phillips size: CONFIG_SYS_PCI1_MEM_SIZE, 399993e196SKim Phillips flags: PCI_REGION_MEM | PCI_REGION_PREFETCH 40e58fe957SKim Phillips }, 419993e196SKim Phillips { 429993e196SKim Phillips bus_start: CONFIG_SYS_PCI1_IO_BASE, 439993e196SKim Phillips phys_start: CONFIG_SYS_PCI1_IO_PHYS, 449993e196SKim Phillips size: CONFIG_SYS_PCI1_IO_SIZE, 459993e196SKim Phillips flags: PCI_REGION_IO 469993e196SKim Phillips }, 479993e196SKim Phillips { 489993e196SKim Phillips bus_start: CONFIG_SYS_PCI1_MMIO_BASE, 499993e196SKim Phillips phys_start: CONFIG_SYS_PCI1_MMIO_PHYS, 509993e196SKim Phillips size: CONFIG_SYS_PCI1_MMIO_SIZE, 519993e196SKim Phillips flags: PCI_REGION_MEM 529993e196SKim Phillips }, 539993e196SKim Phillips }; 549993e196SKim Phillips 559993e196SKim Phillips #ifdef CONFIG_MPC83XX_PCI2 569993e196SKim Phillips static struct pci_region pci2_regions[] = { 579993e196SKim Phillips { 589993e196SKim Phillips bus_start: CONFIG_SYS_PCI2_MEM_BASE, 599993e196SKim Phillips phys_start: CONFIG_SYS_PCI2_MEM_PHYS, 609993e196SKim Phillips size: CONFIG_SYS_PCI2_MEM_SIZE, 619993e196SKim Phillips flags: PCI_REGION_MEM | PCI_REGION_PREFETCH 629993e196SKim Phillips }, 639993e196SKim Phillips { 649993e196SKim Phillips bus_start: CONFIG_SYS_PCI2_IO_BASE, 659993e196SKim Phillips phys_start: CONFIG_SYS_PCI2_IO_PHYS, 669993e196SKim Phillips size: CONFIG_SYS_PCI2_IO_SIZE, 679993e196SKim Phillips flags: PCI_REGION_IO 689993e196SKim Phillips }, 699993e196SKim Phillips { 709993e196SKim Phillips bus_start: CONFIG_SYS_PCI2_MMIO_BASE, 719993e196SKim Phillips phys_start: CONFIG_SYS_PCI2_MMIO_PHYS, 729993e196SKim Phillips size: CONFIG_SYS_PCI2_MMIO_SIZE, 739993e196SKim Phillips flags: PCI_REGION_MEM 749993e196SKim Phillips }, 75e58fe957SKim Phillips }; 76e58fe957SKim Phillips #endif 77e58fe957SKim Phillips 78e58fe957SKim Phillips void pci_init_board(void) 79e58fe957SKim Phillips { 809993e196SKim Phillips volatile immap_t *immr = (volatile immap_t *)CONFIG_SYS_IMMR; 819993e196SKim Phillips volatile clk83xx_t *clk = (volatile clk83xx_t *)&immr->clk; 829993e196SKim Phillips volatile law83xx_t *pci_law = immr->sysconf.pcilaw; 839993e196SKim Phillips #ifndef CONFIG_MPC83XX_PCI2 849993e196SKim Phillips struct pci_region *reg[] = { pci1_regions }; 859993e196SKim Phillips #else 869993e196SKim Phillips struct pci_region *reg[] = { pci1_regions, pci2_regions }; 879993e196SKim Phillips #endif 88e58fe957SKim Phillips u8 reg8; 89e58fe957SKim Phillips 90e58fe957SKim Phillips #ifdef CONFIG_HARD_I2C 91e58fe957SKim Phillips i2c_set_bus_num(1); 92e58fe957SKim Phillips /* Read the PCI_M66EN jumper setting */ 936d0f6bcfSJean-Christophe PLAGNIOL-VILLARD if ((i2c_read(CONFIG_SYS_I2C_8574_ADDR2, 0, 0, ®8, sizeof(reg8)) == 0) || 946d0f6bcfSJean-Christophe PLAGNIOL-VILLARD (i2c_read(CONFIG_SYS_I2C_8574A_ADDR2, 0, 0, ®8, sizeof(reg8)) == 0)) { 95e58fe957SKim Phillips if (reg8 & I2C_8574_PCI66) 96e58fe957SKim Phillips clk->occr = 0xff000000; /* 66 MHz PCI */ 97e58fe957SKim Phillips else 98e58fe957SKim Phillips clk->occr = 0xff600001; /* 33 MHz PCI */ 99e58fe957SKim Phillips } else { 100e58fe957SKim Phillips clk->occr = 0xff600001; /* 33 MHz PCI */ 101e58fe957SKim Phillips } 102e58fe957SKim Phillips #else 103e58fe957SKim Phillips clk->occr = 0xff000000; /* 66 MHz PCI */ 104e58fe957SKim Phillips #endif 105e58fe957SKim Phillips udelay(2000); 106e58fe957SKim Phillips 1079993e196SKim Phillips /* Configure PCI Local Access Windows */ 1086d0f6bcfSJean-Christophe PLAGNIOL-VILLARD pci_law[0].bar = CONFIG_SYS_PCI1_MEM_PHYS & LAWBAR_BAR; 109e58fe957SKim Phillips pci_law[0].ar = LAWAR_EN | LAWAR_SIZE_1G; 110e58fe957SKim Phillips 1116d0f6bcfSJean-Christophe PLAGNIOL-VILLARD pci_law[1].bar = CONFIG_SYS_PCI1_IO_PHYS & LAWBAR_BAR; 112e58fe957SKim Phillips pci_law[1].ar = LAWAR_EN | LAWAR_SIZE_32M; 113e58fe957SKim Phillips 1149993e196SKim Phillips udelay(2000); 115e58fe957SKim Phillips 1169993e196SKim Phillips #ifndef CONFIG_MPC83XX_PCI2 117*6aa3d3bfSPeter Tyser mpc83xx_pci_init(1, reg); 1189993e196SKim Phillips #else 119*6aa3d3bfSPeter Tyser mpc83xx_pci_init(2, reg); 120e58fe957SKim Phillips #endif 121e58fe957SKim Phillips } 122