1 /* 2 * Copyright (c) 2014 The Chromium OS Authors. 3 * 4 * Part of this file is adapted from coreboot 5 * src/arch/x86/include/arch/cpu.h and 6 * src/arch/x86/lib/cpu.c 7 * 8 * SPDX-License-Identifier: GPL-2.0+ 9 */ 10 11 #ifndef _ASM_CPU_H 12 #define _ASM_CPU_H 13 14 enum { 15 X86_VENDOR_INVALID = 0, 16 X86_VENDOR_INTEL, 17 X86_VENDOR_CYRIX, 18 X86_VENDOR_AMD, 19 X86_VENDOR_UMC, 20 X86_VENDOR_NEXGEN, 21 X86_VENDOR_CENTAUR, 22 X86_VENDOR_RISE, 23 X86_VENDOR_TRANSMETA, 24 X86_VENDOR_NSC, 25 X86_VENDOR_SIS, 26 X86_VENDOR_ANY = 0xfe, 27 X86_VENDOR_UNKNOWN = 0xff 28 }; 29 30 /* Global descriptor table (GDT) bits */ 31 enum { 32 GDT_4KB = 1ULL << 55, 33 GDT_32BIT = 1ULL << 54, 34 GDT_LONG = 1ULL << 53, 35 GDT_PRESENT = 1ULL << 47, 36 GDT_NOTSYS = 1ULL << 44, 37 GDT_CODE = 1ULL << 43, 38 GDT_LIMIT_LOW_SHIFT = 0, 39 GDT_LIMIT_LOW_MASK = 0xffff, 40 GDT_LIMIT_HIGH_SHIFT = 48, 41 GDT_LIMIT_HIGH_MASK = 0xf, 42 GDT_BASE_LOW_SHIFT = 16, 43 GDT_BASE_LOW_MASK = 0xffff, 44 GDT_BASE_HIGH_SHIFT = 56, 45 GDT_BASE_HIGH_MASK = 0xf, 46 }; 47 48 /* 49 * System controllers in an x86 system. We mostly need to just find these and 50 * use them on PCI. At some point these might have their own uclass (e.g. 51 * UCLASS_VIDEO for the GMA device). 52 */ 53 enum { 54 X86_NONE, 55 X86_SYSCON_ME, /* Intel Management Engine */ 56 X86_SYSCON_PINCONF, /* Intel x86 pin configuration */ 57 }; 58 59 struct cpuid_result { 60 uint32_t eax; 61 uint32_t ebx; 62 uint32_t ecx; 63 uint32_t edx; 64 }; 65 66 /* 67 * Generic CPUID function 68 */ 69 static inline struct cpuid_result cpuid(int op) 70 { 71 struct cpuid_result result; 72 asm volatile( 73 "mov %%ebx, %%edi;" 74 "cpuid;" 75 "mov %%ebx, %%esi;" 76 "mov %%edi, %%ebx;" 77 : "=a" (result.eax), 78 "=S" (result.ebx), 79 "=c" (result.ecx), 80 "=d" (result.edx) 81 : "0" (op) 82 : "edi"); 83 return result; 84 } 85 86 /* 87 * Generic Extended CPUID function 88 */ 89 static inline struct cpuid_result cpuid_ext(int op, unsigned ecx) 90 { 91 struct cpuid_result result; 92 asm volatile( 93 "mov %%ebx, %%edi;" 94 "cpuid;" 95 "mov %%ebx, %%esi;" 96 "mov %%edi, %%ebx;" 97 : "=a" (result.eax), 98 "=S" (result.ebx), 99 "=c" (result.ecx), 100 "=d" (result.edx) 101 : "0" (op), "2" (ecx) 102 : "edi"); 103 return result; 104 } 105 106 /* 107 * CPUID functions returning a single datum 108 */ 109 static inline unsigned int cpuid_eax(unsigned int op) 110 { 111 unsigned int eax; 112 113 __asm__("mov %%ebx, %%edi;" 114 "cpuid;" 115 "mov %%edi, %%ebx;" 116 : "=a" (eax) 117 : "0" (op) 118 : "ecx", "edx", "edi"); 119 return eax; 120 } 121 122 static inline unsigned int cpuid_ebx(unsigned int op) 123 { 124 unsigned int eax, ebx; 125 126 __asm__("mov %%ebx, %%edi;" 127 "cpuid;" 128 "mov %%ebx, %%esi;" 129 "mov %%edi, %%ebx;" 130 : "=a" (eax), "=S" (ebx) 131 : "0" (op) 132 : "ecx", "edx", "edi"); 133 return ebx; 134 } 135 136 static inline unsigned int cpuid_ecx(unsigned int op) 137 { 138 unsigned int eax, ecx; 139 140 __asm__("mov %%ebx, %%edi;" 141 "cpuid;" 142 "mov %%edi, %%ebx;" 143 : "=a" (eax), "=c" (ecx) 144 : "0" (op) 145 : "edx", "edi"); 146 return ecx; 147 } 148 149 static inline unsigned int cpuid_edx(unsigned int op) 150 { 151 unsigned int eax, edx; 152 153 __asm__("mov %%ebx, %%edi;" 154 "cpuid;" 155 "mov %%edi, %%ebx;" 156 : "=a" (eax), "=d" (edx) 157 : "0" (op) 158 : "ecx", "edi"); 159 return edx; 160 } 161 162 #if !CONFIG_IS_ENABLED(X86_64) 163 164 /* Standard macro to see if a specific flag is changeable */ 165 static inline int flag_is_changeable_p(uint32_t flag) 166 { 167 uint32_t f1, f2; 168 169 asm( 170 "pushfl\n\t" 171 "pushfl\n\t" 172 "popl %0\n\t" 173 "movl %0,%1\n\t" 174 "xorl %2,%0\n\t" 175 "pushl %0\n\t" 176 "popfl\n\t" 177 "pushfl\n\t" 178 "popl %0\n\t" 179 "popfl\n\t" 180 : "=&r" (f1), "=&r" (f2) 181 : "ir" (flag)); 182 return ((f1^f2) & flag) != 0; 183 } 184 #endif 185 186 static inline void mfence(void) 187 { 188 __asm__ __volatile__("mfence" : : : "memory"); 189 } 190 191 /** 192 * cpu_enable_paging_pae() - Enable PAE-paging 193 * 194 * @cr3: Value to set in cr3 (PDPT or PML4T) 195 */ 196 void cpu_enable_paging_pae(ulong cr3); 197 198 /** 199 * cpu_disable_paging_pae() - Disable paging and PAE 200 */ 201 void cpu_disable_paging_pae(void); 202 203 /** 204 * cpu_has_64bit() - Check if the CPU has 64-bit support 205 * 206 * @return 1 if this CPU supports long mode (64-bit), 0 if not 207 */ 208 int cpu_has_64bit(void); 209 210 /** 211 * cpu_vendor_name() - Get CPU vendor name 212 * 213 * @vendor: CPU vendor enumeration number 214 * 215 * @return: Address to hold the CPU vendor name string 216 */ 217 const char *cpu_vendor_name(int vendor); 218 219 #define CPU_MAX_NAME_LEN 49 220 221 /** 222 * cpu_get_name() - Get the name of the current cpu 223 * 224 * @name: Place to put name, which must be CPU_MAX_NAME_LEN bytes including 225 * @return pointer to name, which will likely be a few bytes after the start 226 * of @name 227 * \0 terminator 228 */ 229 char *cpu_get_name(char *name); 230 231 /** 232 * cpu_call64() - Jump to a 64-bit Linux kernel (internal function) 233 * 234 * The kernel is uncompressed and the 64-bit entry point is expected to be 235 * at @target. 236 * 237 * This function is used internally - see cpu_jump_to_64bit() for a more 238 * useful function. 239 * 240 * @pgtable: Address of 24KB area containing the page table 241 * @setup_base: Pointer to the setup.bin information for the kernel 242 * @target: Pointer to the start of the kernel image 243 */ 244 void cpu_call64(ulong pgtable, ulong setup_base, ulong target); 245 246 /** 247 * cpu_call32() - Jump to a 32-bit entry point 248 * 249 * @code_seg32: 32-bit code segment to use (GDT offset, e.g. 0x20) 250 * @target: Pointer to the start of the 32-bit U-Boot image/entry point 251 * @table: Pointer to start of info table to pass to U-Boot 252 */ 253 void cpu_call32(ulong code_seg32, ulong target, ulong table); 254 255 /** 256 * cpu_jump_to_64bit() - Jump to a 64-bit Linux kernel 257 * 258 * The kernel is uncompressed and the 64-bit entry point is expected to be 259 * at @target. 260 * 261 * @setup_base: Pointer to the setup.bin information for the kernel 262 * @target: Pointer to the start of the kernel image 263 */ 264 int cpu_jump_to_64bit(ulong setup_base, ulong target); 265 266 /** 267 * cpu_jump_to_64bit_uboot() - special function to jump from SPL to U-Boot 268 * 269 * This handles calling from 32-bit SPL to 64-bit U-Boot. 270 * 271 * @target: Address of U-Boot in RAM 272 */ 273 int cpu_jump_to_64bit_uboot(ulong target); 274 275 /** 276 * cpu_get_family_model() - Get the family and model for the CPU 277 * 278 * @return the CPU ID masked with 0x0fff0ff0 279 */ 280 u32 cpu_get_family_model(void); 281 282 /** 283 * cpu_get_stepping() - Get the stepping value for the CPU 284 * 285 * @return the CPU ID masked with 0xf 286 */ 287 u32 cpu_get_stepping(void); 288 289 /** 290 * cpu_run_reference_code() - Run the platform reference code 291 * 292 * Some platforms require a binary blob to be executed once SDRAM is 293 * available. This is used to set up various platform features, such as the 294 * platform controller hub (PCH). This function should be implemented by the 295 * CPU-specific code. 296 * 297 * @return 0 on success, -ve on failure 298 */ 299 int cpu_run_reference_code(void); 300 301 #endif 302