xref: /openbmc/u-boot/arch/x86/include/asm/cpu.h (revision e8f80a5a)
1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * Copyright (c) 2014 The Chromium OS Authors.
4  *
5  * Part of this file is adapted from coreboot
6  * src/arch/x86/include/arch/cpu.h and
7  * src/arch/x86/lib/cpu.c
8  */
9 
10 #ifndef _ASM_CPU_H
11 #define _ASM_CPU_H
12 
13 enum {
14 	X86_VENDOR_INVALID = 0,
15 	X86_VENDOR_INTEL,
16 	X86_VENDOR_CYRIX,
17 	X86_VENDOR_AMD,
18 	X86_VENDOR_UMC,
19 	X86_VENDOR_NEXGEN,
20 	X86_VENDOR_CENTAUR,
21 	X86_VENDOR_RISE,
22 	X86_VENDOR_TRANSMETA,
23 	X86_VENDOR_NSC,
24 	X86_VENDOR_SIS,
25 	X86_VENDOR_ANY = 0xfe,
26 	X86_VENDOR_UNKNOWN = 0xff
27 };
28 
29 /* Global descriptor table (GDT) bits */
30 enum {
31 	GDT_4KB			= 1ULL << 55,
32 	GDT_32BIT		= 1ULL << 54,
33 	GDT_LONG		= 1ULL << 53,
34 	GDT_PRESENT		= 1ULL << 47,
35 	GDT_NOTSYS		= 1ULL << 44,
36 	GDT_CODE		= 1ULL << 43,
37 	GDT_LIMIT_LOW_SHIFT	= 0,
38 	GDT_LIMIT_LOW_MASK	= 0xffff,
39 	GDT_LIMIT_HIGH_SHIFT	= 48,
40 	GDT_LIMIT_HIGH_MASK	= 0xf,
41 	GDT_BASE_LOW_SHIFT	= 16,
42 	GDT_BASE_LOW_MASK	= 0xffff,
43 	GDT_BASE_HIGH_SHIFT	= 56,
44 	GDT_BASE_HIGH_MASK	= 0xf,
45 };
46 
47 /*
48  * System controllers in an x86 system. We mostly need to just find these and
49  * use them on PCI. At some point these might have their own uclass (e.g.
50  * UCLASS_VIDEO for the GMA device).
51  */
52 enum {
53 	X86_NONE,
54 	X86_SYSCON_ME,		/* Intel Management Engine */
55 	X86_SYSCON_PINCONF,	/* Intel x86 pin configuration */
56 	X86_SYSCON_PMU,		/* Power Management Unit */
57 	X86_SYSCON_SCU,		/* System Controller Unit */
58 };
59 
60 struct cpuid_result {
61 	uint32_t eax;
62 	uint32_t ebx;
63 	uint32_t ecx;
64 	uint32_t edx;
65 };
66 
67 /*
68  * Generic CPUID function
69  */
cpuid(int op)70 static inline struct cpuid_result cpuid(int op)
71 {
72 	struct cpuid_result result;
73 	asm volatile(
74 		"mov %%ebx, %%edi;"
75 		"cpuid;"
76 		"mov %%ebx, %%esi;"
77 		"mov %%edi, %%ebx;"
78 		: "=a" (result.eax),
79 		  "=S" (result.ebx),
80 		  "=c" (result.ecx),
81 		  "=d" (result.edx)
82 		: "0" (op)
83 		: "edi");
84 	return result;
85 }
86 
87 /*
88  * Generic Extended CPUID function
89  */
cpuid_ext(int op,unsigned ecx)90 static inline struct cpuid_result cpuid_ext(int op, unsigned ecx)
91 {
92 	struct cpuid_result result;
93 	asm volatile(
94 		"mov %%ebx, %%edi;"
95 		"cpuid;"
96 		"mov %%ebx, %%esi;"
97 		"mov %%edi, %%ebx;"
98 		: "=a" (result.eax),
99 		  "=S" (result.ebx),
100 		  "=c" (result.ecx),
101 		  "=d" (result.edx)
102 		: "0" (op), "2" (ecx)
103 		: "edi");
104 	return result;
105 }
106 
107 /*
108  * CPUID functions returning a single datum
109  */
cpuid_eax(unsigned int op)110 static inline unsigned int cpuid_eax(unsigned int op)
111 {
112 	unsigned int eax;
113 
114 	__asm__("mov %%ebx, %%edi;"
115 		"cpuid;"
116 		"mov %%edi, %%ebx;"
117 		: "=a" (eax)
118 		: "0" (op)
119 		: "ecx", "edx", "edi");
120 	return eax;
121 }
122 
cpuid_ebx(unsigned int op)123 static inline unsigned int cpuid_ebx(unsigned int op)
124 {
125 	unsigned int eax, ebx;
126 
127 	__asm__("mov %%ebx, %%edi;"
128 		"cpuid;"
129 		"mov %%ebx, %%esi;"
130 		"mov %%edi, %%ebx;"
131 		: "=a" (eax), "=S" (ebx)
132 		: "0" (op)
133 		: "ecx", "edx", "edi");
134 	return ebx;
135 }
136 
cpuid_ecx(unsigned int op)137 static inline unsigned int cpuid_ecx(unsigned int op)
138 {
139 	unsigned int eax, ecx;
140 
141 	__asm__("mov %%ebx, %%edi;"
142 		"cpuid;"
143 		"mov %%edi, %%ebx;"
144 		: "=a" (eax), "=c" (ecx)
145 		: "0" (op)
146 		: "edx", "edi");
147 	return ecx;
148 }
149 
cpuid_edx(unsigned int op)150 static inline unsigned int cpuid_edx(unsigned int op)
151 {
152 	unsigned int eax, edx;
153 
154 	__asm__("mov %%ebx, %%edi;"
155 		"cpuid;"
156 		"mov %%edi, %%ebx;"
157 		: "=a" (eax), "=d" (edx)
158 		: "0" (op)
159 		: "ecx", "edi");
160 	return edx;
161 }
162 
163 #if !CONFIG_IS_ENABLED(X86_64)
164 
165 /* Standard macro to see if a specific flag is changeable */
flag_is_changeable_p(uint32_t flag)166 static inline int flag_is_changeable_p(uint32_t flag)
167 {
168 	uint32_t f1, f2;
169 
170 	asm(
171 		"pushfl\n\t"
172 		"pushfl\n\t"
173 		"popl %0\n\t"
174 		"movl %0,%1\n\t"
175 		"xorl %2,%0\n\t"
176 		"pushl %0\n\t"
177 		"popfl\n\t"
178 		"pushfl\n\t"
179 		"popl %0\n\t"
180 		"popfl\n\t"
181 		: "=&r" (f1), "=&r" (f2)
182 		: "ir" (flag));
183 	return ((f1^f2) & flag) != 0;
184 }
185 #endif
186 
mfence(void)187 static inline void mfence(void)
188 {
189 	__asm__ __volatile__("mfence" : : : "memory");
190 }
191 
192 /**
193  * cpu_enable_paging_pae() - Enable PAE-paging
194  *
195  * @cr3:	Value to set in cr3 (PDPT or PML4T)
196  */
197 void cpu_enable_paging_pae(ulong cr3);
198 
199 /**
200  * cpu_disable_paging_pae() - Disable paging and PAE
201  */
202 void cpu_disable_paging_pae(void);
203 
204 /**
205  * cpu_has_64bit() - Check if the CPU has 64-bit support
206  *
207  * @return 1 if this CPU supports long mode (64-bit), 0 if not
208  */
209 int cpu_has_64bit(void);
210 
211 /**
212  * cpu_vendor_name() - Get CPU vendor name
213  *
214  * @vendor:	CPU vendor enumeration number
215  *
216  * @return:	Address to hold the CPU vendor name string
217  */
218 const char *cpu_vendor_name(int vendor);
219 
220 #define CPU_MAX_NAME_LEN	49
221 
222 /**
223  * cpu_get_name() - Get the name of the current cpu
224  *
225  * @name: Place to put name, which must be CPU_MAX_NAME_LEN bytes including
226  * @return pointer to name, which will likely be a few bytes after the start
227  * of @name
228  * \0 terminator
229  */
230 char *cpu_get_name(char *name);
231 
232 /**
233  * cpu_call64() - Jump to a 64-bit Linux kernel (internal function)
234  *
235  * The kernel is uncompressed and the 64-bit entry point is expected to be
236  * at @target.
237  *
238  * This function is used internally - see cpu_jump_to_64bit() for a more
239  * useful function.
240  *
241  * @pgtable:	Address of 24KB area containing the page table
242  * @setup_base:	Pointer to the setup.bin information for the kernel
243  * @target:	Pointer to the start of the kernel image
244  */
245 void cpu_call64(ulong pgtable, ulong setup_base, ulong target);
246 
247 /**
248  * cpu_call32() - Jump to a 32-bit entry point
249  *
250  * @code_seg32:	32-bit code segment to use (GDT offset, e.g. 0x20)
251  * @target:	Pointer to the start of the 32-bit U-Boot image/entry point
252  * @table:	Pointer to start of info table to pass to U-Boot
253  */
254 void cpu_call32(ulong code_seg32, ulong target, ulong table);
255 
256 /**
257  * cpu_jump_to_64bit() - Jump to a 64-bit Linux kernel
258  *
259  * The kernel is uncompressed and the 64-bit entry point is expected to be
260  * at @target.
261  *
262  * @setup_base:	Pointer to the setup.bin information for the kernel
263  * @target:	Pointer to the start of the kernel image
264  */
265 int cpu_jump_to_64bit(ulong setup_base, ulong target);
266 
267 /**
268  * cpu_jump_to_64bit_uboot() - special function to jump from SPL to U-Boot
269  *
270  * This handles calling from 32-bit SPL to 64-bit U-Boot.
271  *
272  * @target:	Address of U-Boot in RAM
273  */
274 int cpu_jump_to_64bit_uboot(ulong target);
275 
276 /**
277  * cpu_get_family_model() - Get the family and model for the CPU
278  *
279  * @return the CPU ID masked with 0x0fff0ff0
280  */
281 u32 cpu_get_family_model(void);
282 
283 /**
284  * cpu_get_stepping() - Get the stepping value for the CPU
285  *
286  * @return the CPU ID masked with 0xf
287  */
288 u32 cpu_get_stepping(void);
289 
290 #endif
291