xref: /openbmc/u-boot/arch/x86/include/asm/cpu.h (revision 4101f687)
1 /*
2  * Copyright (c) 2014 The Chromium OS Authors.
3  *
4  * Part of this file is adapted from coreboot
5  * src/arch/x86/include/arch/cpu.h and
6  * src/arch/x86/lib/cpu.c
7  *
8  * SPDX-License-Identifier:	GPL-2.0+
9  */
10 
11 #ifndef _ASM_CPU_H
12 #define _ASM_CPU_H
13 
14 enum {
15 	X86_VENDOR_INVALID = 0,
16 	X86_VENDOR_INTEL,
17 	X86_VENDOR_CYRIX,
18 	X86_VENDOR_AMD,
19 	X86_VENDOR_UMC,
20 	X86_VENDOR_NEXGEN,
21 	X86_VENDOR_CENTAUR,
22 	X86_VENDOR_RISE,
23 	X86_VENDOR_TRANSMETA,
24 	X86_VENDOR_NSC,
25 	X86_VENDOR_SIS,
26 	X86_VENDOR_ANY = 0xfe,
27 	X86_VENDOR_UNKNOWN = 0xff
28 };
29 
30 /* Global descriptor table (GDT) bits */
31 enum {
32 	GDT_4KB			= 1ULL << 55,
33 	GDT_32BIT		= 1ULL << 54,
34 	GDT_LONG		= 1ULL << 53,
35 	GDT_PRESENT		= 1ULL << 47,
36 	GDT_NOTSYS		= 1ULL << 44,
37 	GDT_CODE		= 1ULL << 43,
38 	GDT_LIMIT_LOW_SHIFT	= 0,
39 	GDT_LIMIT_LOW_MASK	= 0xffff,
40 	GDT_LIMIT_HIGH_SHIFT	= 48,
41 	GDT_LIMIT_HIGH_MASK	= 0xf,
42 	GDT_BASE_LOW_SHIFT	= 16,
43 	GDT_BASE_LOW_MASK	= 0xffff,
44 	GDT_BASE_HIGH_SHIFT	= 56,
45 	GDT_BASE_HIGH_MASK	= 0xf,
46 };
47 
48 /*
49  * System controllers in an x86 system. We mostly need to just find these and
50  * use them on PCI. At some point these might have their own uclass (e.g.
51  * UCLASS_VIDEO for the GMA device).
52  */
53 enum {
54 	X86_NONE,
55 	X86_SYSCON_ME,		/* Intel Management Engine */
56 	X86_SYSCON_GMA,		/* Intel Graphics Media Accelerator */
57 };
58 
59 struct cpuid_result {
60 	uint32_t eax;
61 	uint32_t ebx;
62 	uint32_t ecx;
63 	uint32_t edx;
64 };
65 
66 /*
67  * Generic CPUID function
68  */
69 static inline struct cpuid_result cpuid(int op)
70 {
71 	struct cpuid_result result;
72 	asm volatile(
73 		"mov %%ebx, %%edi;"
74 		"cpuid;"
75 		"mov %%ebx, %%esi;"
76 		"mov %%edi, %%ebx;"
77 		: "=a" (result.eax),
78 		  "=S" (result.ebx),
79 		  "=c" (result.ecx),
80 		  "=d" (result.edx)
81 		: "0" (op)
82 		: "edi");
83 	return result;
84 }
85 
86 /*
87  * Generic Extended CPUID function
88  */
89 static inline struct cpuid_result cpuid_ext(int op, unsigned ecx)
90 {
91 	struct cpuid_result result;
92 	asm volatile(
93 		"mov %%ebx, %%edi;"
94 		"cpuid;"
95 		"mov %%ebx, %%esi;"
96 		"mov %%edi, %%ebx;"
97 		: "=a" (result.eax),
98 		  "=S" (result.ebx),
99 		  "=c" (result.ecx),
100 		  "=d" (result.edx)
101 		: "0" (op), "2" (ecx)
102 		: "edi");
103 	return result;
104 }
105 
106 /*
107  * CPUID functions returning a single datum
108  */
109 static inline unsigned int cpuid_eax(unsigned int op)
110 {
111 	unsigned int eax;
112 
113 	__asm__("mov %%ebx, %%edi;"
114 		"cpuid;"
115 		"mov %%edi, %%ebx;"
116 		: "=a" (eax)
117 		: "0" (op)
118 		: "ecx", "edx", "edi");
119 	return eax;
120 }
121 
122 static inline unsigned int cpuid_ebx(unsigned int op)
123 {
124 	unsigned int eax, ebx;
125 
126 	__asm__("mov %%ebx, %%edi;"
127 		"cpuid;"
128 		"mov %%ebx, %%esi;"
129 		"mov %%edi, %%ebx;"
130 		: "=a" (eax), "=S" (ebx)
131 		: "0" (op)
132 		: "ecx", "edx", "edi");
133 	return ebx;
134 }
135 
136 static inline unsigned int cpuid_ecx(unsigned int op)
137 {
138 	unsigned int eax, ecx;
139 
140 	__asm__("mov %%ebx, %%edi;"
141 		"cpuid;"
142 		"mov %%edi, %%ebx;"
143 		: "=a" (eax), "=c" (ecx)
144 		: "0" (op)
145 		: "edx", "edi");
146 	return ecx;
147 }
148 
149 static inline unsigned int cpuid_edx(unsigned int op)
150 {
151 	unsigned int eax, edx;
152 
153 	__asm__("mov %%ebx, %%edi;"
154 		"cpuid;"
155 		"mov %%edi, %%ebx;"
156 		: "=a" (eax), "=d" (edx)
157 		: "0" (op)
158 		: "ecx", "edi");
159 	return edx;
160 }
161 
162 /* Standard macro to see if a specific flag is changeable */
163 static inline int flag_is_changeable_p(uint32_t flag)
164 {
165 	uint32_t f1, f2;
166 
167 	asm(
168 		"pushfl\n\t"
169 		"pushfl\n\t"
170 		"popl %0\n\t"
171 		"movl %0,%1\n\t"
172 		"xorl %2,%0\n\t"
173 		"pushl %0\n\t"
174 		"popfl\n\t"
175 		"pushfl\n\t"
176 		"popl %0\n\t"
177 		"popfl\n\t"
178 		: "=&r" (f1), "=&r" (f2)
179 		: "ir" (flag));
180 	return ((f1^f2) & flag) != 0;
181 }
182 
183 static inline void mfence(void)
184 {
185 	__asm__ __volatile__("mfence" : : : "memory");
186 }
187 
188 /**
189  * cpu_enable_paging_pae() - Enable PAE-paging
190  *
191  * @cr3:	Value to set in cr3 (PDPT or PML4T)
192  */
193 void cpu_enable_paging_pae(ulong cr3);
194 
195 /**
196  * cpu_disable_paging_pae() - Disable paging and PAE
197  */
198 void cpu_disable_paging_pae(void);
199 
200 /**
201  * cpu_has_64bit() - Check if the CPU has 64-bit support
202  *
203  * @return 1 if this CPU supports long mode (64-bit), 0 if not
204  */
205 int cpu_has_64bit(void);
206 
207 /**
208  * cpu_vendor_name() - Get CPU vendor name
209  *
210  * @vendor:	CPU vendor enumeration number
211  *
212  * @return:	Address to hold the CPU vendor name string
213  */
214 const char *cpu_vendor_name(int vendor);
215 
216 #define CPU_MAX_NAME_LEN	49
217 
218 /**
219  * cpu_get_name() - Get the name of the current cpu
220  *
221  * @name: Place to put name, which must be CPU_MAX_NAME_LEN bytes including
222  * @return pointer to name, which will likely be a few bytes after the start
223  * of @name
224  * \0 terminator
225  */
226 char *cpu_get_name(char *name);
227 
228 /**
229  * cpu_call64() - Jump to a 64-bit Linux kernel (internal function)
230  *
231  * The kernel is uncompressed and the 64-bit entry point is expected to be
232  * at @target.
233  *
234  * This function is used internally - see cpu_jump_to_64bit() for a more
235  * useful function.
236  *
237  * @pgtable:	Address of 24KB area containing the page table
238  * @setup_base:	Pointer to the setup.bin information for the kernel
239  * @target:	Pointer to the start of the kernel image
240  */
241 void cpu_call64(ulong pgtable, ulong setup_base, ulong target);
242 
243 /**
244  * cpu_call32() - Jump to a 32-bit entry point
245  *
246  * @code_seg32:	32-bit code segment to use (GDT offset, e.g. 0x20)
247  * @target:	Pointer to the start of the 32-bit U-Boot image/entry point
248  * @table:	Pointer to start of info table to pass to U-Boot
249  */
250 void cpu_call32(ulong code_seg32, ulong target, ulong table);
251 
252 /**
253  * cpu_jump_to_64bit() - Jump to a 64-bit Linux kernel
254  *
255  * The kernel is uncompressed and the 64-bit entry point is expected to be
256  * at @target.
257  *
258  * @setup_base:	Pointer to the setup.bin information for the kernel
259  * @target:	Pointer to the start of the kernel image
260  */
261 int cpu_jump_to_64bit(ulong setup_base, ulong target);
262 
263 #endif
264