xref: /openbmc/u-boot/arch/x86/Kconfig (revision 2f20aa82) 
1menu "x86 architecture"
2	depends on X86
3
4config SYS_ARCH
5	default "x86"
6
7config USE_PRIVATE_LIBGCC
8	default y
9
10choice
11	prompt "Target select"
12
13config TARGET_COREBOOT
14	bool "Support coreboot"
15	help
16	  This target is used for running U-Boot on top of Coreboot. In
17	  this case Coreboot does the early inititalisation, and U-Boot
18	  takes over once the RAM, video and CPU are fully running.
19	  U-Boot is loaded as a fallback payload from Coreboot, in
20	  Coreboot terminology. This method was used for the Chromebook
21	  Pixel when launched.
22
23config TARGET_CHROMEBOOK_LINK
24	bool "Support Chromebook link"
25	help
26	  This is the Chromebook Pixel released in 2013. It uses an Intel
27	  i5 Ivybridge which is a die-shrink of Sandybridge, with 4GB of
28	  SDRAM. It has a Panther Point platform controller hub, PCIe
29	  WiFi and Bluetooth. It also includes a 720p webcam, USB SD
30	  reader, microphone and speakers, display port and 32GB SATA
31	  solid state drive. There is a Chrome OS EC connected on LPC,
32	  and it provides a 2560x1700 high resolution touch-enabled LCD
33	  display.
34
35config TARGET_CROWNBAY
36	bool "Support Intel Crown Bay CRB"
37	help
38	  This is the Intel Crown Bay Customer Reference Board. It contains
39	  the Intel Atom Processor E6xx populated on the COM Express module
40	  with 1GB DDR2 soldered down memory and a carrier board with the
41	  Intel Platform Controller Hub EG20T, other system components and
42	  peripheral connectors for PCIe/SATA/USB/LAN/SD/UART/Audio/LVDS.
43
44endchoice
45
46config RAMBASE
47	hex
48	default 0x100000
49
50config XIP_ROM_SIZE
51	hex
52	depends on X86_RESET_VECTOR
53	default ROM_SIZE
54
55config CPU_ADDR_BITS
56	int
57	default 36
58
59config HPET_ADDRESS
60	hex
61	default 0xfed00000 if !HPET_ADDRESS_OVERRIDE
62
63config SMM_TSEG
64	bool
65	default n
66
67config SMM_TSEG_SIZE
68	hex
69
70config X86_RESET_VECTOR
71	bool
72	default n
73
74config SYS_X86_START16
75	hex
76	depends on X86_RESET_VECTOR
77	default 0xfffff800
78
79config BOARD_ROMSIZE_KB_512
80	bool
81config BOARD_ROMSIZE_KB_1024
82	bool
83config BOARD_ROMSIZE_KB_2048
84	bool
85config BOARD_ROMSIZE_KB_4096
86	bool
87config BOARD_ROMSIZE_KB_8192
88	bool
89config BOARD_ROMSIZE_KB_16384
90	bool
91
92choice
93	prompt "ROM chip size"
94	depends on X86_RESET_VECTOR
95	default UBOOT_ROMSIZE_KB_512 if BOARD_ROMSIZE_KB_512
96	default UBOOT_ROMSIZE_KB_1024 if BOARD_ROMSIZE_KB_1024
97	default UBOOT_ROMSIZE_KB_2048 if BOARD_ROMSIZE_KB_2048
98	default UBOOT_ROMSIZE_KB_4096 if BOARD_ROMSIZE_KB_4096
99	default UBOOT_ROMSIZE_KB_8192 if BOARD_ROMSIZE_KB_8192
100	default UBOOT_ROMSIZE_KB_16384 if BOARD_ROMSIZE_KB_16384
101	help
102	  Select the size of the ROM chip you intend to flash U-Boot on.
103
104	  The build system will take care of creating a u-boot.rom file
105	  of the matching size.
106
107config UBOOT_ROMSIZE_KB_512
108	bool "512 KB"
109	help
110	  Choose this option if you have a 512 KB ROM chip.
111
112config UBOOT_ROMSIZE_KB_1024
113	bool "1024 KB (1 MB)"
114	help
115	  Choose this option if you have a 1024 KB (1 MB) ROM chip.
116
117config UBOOT_ROMSIZE_KB_2048
118	bool "2048 KB (2 MB)"
119	help
120	  Choose this option if you have a 2048 KB (2 MB) ROM chip.
121
122config UBOOT_ROMSIZE_KB_4096
123	bool "4096 KB (4 MB)"
124	help
125	  Choose this option if you have a 4096 KB (4 MB) ROM chip.
126
127config UBOOT_ROMSIZE_KB_8192
128	bool "8192 KB (8 MB)"
129	help
130	  Choose this option if you have a 8192 KB (8 MB) ROM chip.
131
132config UBOOT_ROMSIZE_KB_16384
133	bool "16384 KB (16 MB)"
134	help
135	  Choose this option if you have a 16384 KB (16 MB) ROM chip.
136
137endchoice
138
139# Map the config names to an integer (KB).
140config UBOOT_ROMSIZE_KB
141	int
142	default 512 if UBOOT_ROMSIZE_KB_512
143	default 1024 if UBOOT_ROMSIZE_KB_1024
144	default 2048 if UBOOT_ROMSIZE_KB_2048
145	default 4096 if UBOOT_ROMSIZE_KB_4096
146	default 8192 if UBOOT_ROMSIZE_KB_8192
147	default 16384 if UBOOT_ROMSIZE_KB_16384
148
149# Map the config names to a hex value (bytes).
150config ROM_SIZE
151	hex
152	default 0x80000 if UBOOT_ROMSIZE_KB_512
153	default 0x100000 if UBOOT_ROMSIZE_KB_1024
154	default 0x200000 if UBOOT_ROMSIZE_KB_2048
155	default 0x400000 if UBOOT_ROMSIZE_KB_4096
156	default 0x800000 if UBOOT_ROMSIZE_KB_8192
157	default 0xc00000 if UBOOT_ROMSIZE_KB_12288
158	default 0x1000000 if UBOOT_ROMSIZE_KB_16384
159
160config HAVE_INTEL_ME
161	bool "Platform requires Intel Management Engine"
162	help
163	  Newer higher-end devices have an Intel Management Engine (ME)
164	  which is a very large binary blob (typically 1.5MB) which is
165	  required for the platform to work. This enforces a particular
166	  SPI flash format. You will need to supply the me.bin file in
167	  your board directory.
168
169config X86_RAMTEST
170	bool "Perform a simple RAM test after SDRAM initialisation"
171	help
172	  If there is something wrong with SDRAM then the platform will
173	  often crash within U-Boot or the kernel. This option enables a
174	  very simple RAM test that quickly checks whether the SDRAM seems
175	  to work correctly. It is not exhaustive but can save time by
176	  detecting obvious failures.
177
178config MARK_GRAPHICS_MEM_WRCOMB
179	bool "Mark graphics memory as write-combining."
180	default n
181	help
182	 The graphics performance may increase if the graphics
183	 memory is set as write-combining cache type. This option
184	 enables marking the graphics memory as write-combining.
185
186menu "Display"
187
188config FRAMEBUFFER_SET_VESA_MODE
189	prompt "Set framebuffer graphics resolution"
190	bool
191	help
192	  Set VESA/native framebuffer mode (needed for bootsplash and graphical framebuffer console)
193
194choice
195	prompt "framebuffer graphics resolution"
196	default FRAMEBUFFER_VESA_MODE_117
197	depends on FRAMEBUFFER_SET_VESA_MODE
198	help
199	  This option sets the resolution used for the coreboot framebuffer (and
200	  bootsplash screen).
201
202config FRAMEBUFFER_VESA_MODE_100
203	bool "640x400 256-color"
204
205config FRAMEBUFFER_VESA_MODE_101
206	bool "640x480 256-color"
207
208config FRAMEBUFFER_VESA_MODE_102
209	bool "800x600 16-color"
210
211config FRAMEBUFFER_VESA_MODE_103
212	bool "800x600 256-color"
213
214config FRAMEBUFFER_VESA_MODE_104
215	bool "1024x768 16-color"
216
217config FRAMEBUFFER_VESA_MODE_105
218	bool "1024x7686 256-color"
219
220config FRAMEBUFFER_VESA_MODE_106
221	bool "1280x1024 16-color"
222
223config FRAMEBUFFER_VESA_MODE_107
224	bool "1280x1024 256-color"
225
226config FRAMEBUFFER_VESA_MODE_108
227	bool "80x60 text"
228
229config FRAMEBUFFER_VESA_MODE_109
230	bool "132x25 text"
231
232config FRAMEBUFFER_VESA_MODE_10A
233	bool "132x43 text"
234
235config FRAMEBUFFER_VESA_MODE_10B
236	bool "132x50 text"
237
238config FRAMEBUFFER_VESA_MODE_10C
239	bool "132x60 text"
240
241config FRAMEBUFFER_VESA_MODE_10D
242	bool "320x200 32k-color (1:5:5:5)"
243
244config FRAMEBUFFER_VESA_MODE_10E
245	bool "320x200 64k-color (5:6:5)"
246
247config FRAMEBUFFER_VESA_MODE_10F
248	bool "320x200 16.8M-color (8:8:8)"
249
250config FRAMEBUFFER_VESA_MODE_110
251	bool "640x480 32k-color (1:5:5:5)"
252
253config FRAMEBUFFER_VESA_MODE_111
254	bool "640x480 64k-color (5:6:5)"
255
256config FRAMEBUFFER_VESA_MODE_112
257	bool "640x480 16.8M-color (8:8:8)"
258
259config FRAMEBUFFER_VESA_MODE_113
260	bool "800x600 32k-color (1:5:5:5)"
261
262config FRAMEBUFFER_VESA_MODE_114
263	bool "800x600 64k-color (5:6:5)"
264
265config FRAMEBUFFER_VESA_MODE_115
266	bool "800x600 16.8M-color (8:8:8)"
267
268config FRAMEBUFFER_VESA_MODE_116
269	bool "1024x768 32k-color (1:5:5:5)"
270
271config FRAMEBUFFER_VESA_MODE_117
272	bool "1024x768 64k-color (5:6:5)"
273
274config FRAMEBUFFER_VESA_MODE_118
275	bool "1024x768 16.8M-color (8:8:8)"
276
277config FRAMEBUFFER_VESA_MODE_119
278	bool "1280x1024 32k-color (1:5:5:5)"
279
280config FRAMEBUFFER_VESA_MODE_11A
281	bool "1280x1024 64k-color (5:6:5)"
282
283config FRAMEBUFFER_VESA_MODE_11B
284	bool "1280x1024 16.8M-color (8:8:8)"
285
286config FRAMEBUFFER_VESA_MODE_USER
287	bool "Manually select VESA mode"
288
289endchoice
290
291# Map the config names to an integer (KB).
292config FRAMEBUFFER_VESA_MODE
293	prompt "VESA mode" if FRAMEBUFFER_VESA_MODE_USER
294	hex
295	default 0x100 if FRAMEBUFFER_VESA_MODE_100
296	default 0x101 if FRAMEBUFFER_VESA_MODE_101
297	default 0x102 if FRAMEBUFFER_VESA_MODE_102
298	default 0x103 if FRAMEBUFFER_VESA_MODE_103
299	default 0x104 if FRAMEBUFFER_VESA_MODE_104
300	default 0x105 if FRAMEBUFFER_VESA_MODE_105
301	default 0x106 if FRAMEBUFFER_VESA_MODE_106
302	default 0x107 if FRAMEBUFFER_VESA_MODE_107
303	default 0x108 if FRAMEBUFFER_VESA_MODE_108
304	default 0x109 if FRAMEBUFFER_VESA_MODE_109
305	default 0x10A if FRAMEBUFFER_VESA_MODE_10A
306	default 0x10B if FRAMEBUFFER_VESA_MODE_10B
307	default 0x10C if FRAMEBUFFER_VESA_MODE_10C
308	default 0x10D if FRAMEBUFFER_VESA_MODE_10D
309	default 0x10E if FRAMEBUFFER_VESA_MODE_10E
310	default 0x10F if FRAMEBUFFER_VESA_MODE_10F
311	default 0x110 if FRAMEBUFFER_VESA_MODE_110
312	default 0x111 if FRAMEBUFFER_VESA_MODE_111
313	default 0x112 if FRAMEBUFFER_VESA_MODE_112
314	default 0x113 if FRAMEBUFFER_VESA_MODE_113
315	default 0x114 if FRAMEBUFFER_VESA_MODE_114
316	default 0x115 if FRAMEBUFFER_VESA_MODE_115
317	default 0x116 if FRAMEBUFFER_VESA_MODE_116
318	default 0x117 if FRAMEBUFFER_VESA_MODE_117
319	default 0x118 if FRAMEBUFFER_VESA_MODE_118
320	default 0x119 if FRAMEBUFFER_VESA_MODE_119
321	default 0x11A if FRAMEBUFFER_VESA_MODE_11A
322	default 0x11B if FRAMEBUFFER_VESA_MODE_11B
323	default 0x117 if FRAMEBUFFER_VESA_MODE_USER
324
325endmenu
326
327config TSC_CALIBRATION_BYPASS
328	bool "Bypass Time-Stamp Counter (TSC) calibration"
329	default n
330	help
331	  By default U-Boot automatically calibrates Time-Stamp Counter (TSC)
332	  running frequency via Model-Specific Register (MSR) and Programmable
333	  Interval Timer (PIT). If the calibration does not work on your board,
334	  select this option and provide a hardcoded TSC running frequency with
335	  CONFIG_TSC_FREQ_IN_MHZ below.
336
337	  Normally this option should be turned on in a simulation environment
338	  like qemu.
339
340config TSC_FREQ_IN_MHZ
341	int "Time-Stamp Counter (TSC) running frequency in MHz"
342	depends on TSC_CALIBRATION_BYPASS
343	default 1000
344	help
345	  The running frequency in MHz of Time-Stamp Counter (TSC).
346
347source "arch/x86/cpu/coreboot/Kconfig"
348
349source "arch/x86/cpu/ivybridge/Kconfig"
350
351source "arch/x86/cpu/queensbay/Kconfig"
352
353source "board/coreboot/coreboot/Kconfig"
354
355source "board/google/chromebook_link/Kconfig"
356
357source "board/intel/crownbay/Kconfig"
358
359endmenu
360