1menu "MIPS architecture" 2 depends on MIPS 3 4config SYS_ARCH 5 default "mips" 6 7config SYS_CPU 8 default "mips32" if CPU_MIPS32_R1 || CPU_MIPS32_R2 9 default "mips64" if CPU_MIPS64_R1 || CPU_MIPS64_R2 10 11config USE_PRIVATE_LIBGCC 12 default y 13 14choice 15 prompt "Target select" 16 17config TARGET_QEMU_MIPS 18 bool "Support qemu-mips" 19 select SUPPORTS_BIG_ENDIAN 20 select SUPPORTS_LITTLE_ENDIAN 21 select SUPPORTS_CPU_MIPS32_R1 22 select SUPPORTS_CPU_MIPS32_R2 23 select SUPPORTS_CPU_MIPS64_R1 24 select SUPPORTS_CPU_MIPS64_R2 25 26config TARGET_MALTA 27 bool "Support malta" 28 select SUPPORTS_BIG_ENDIAN 29 select SUPPORTS_LITTLE_ENDIAN 30 select SUPPORTS_CPU_MIPS32_R1 31 select SUPPORTS_CPU_MIPS32_R2 32 select SWAP_IO_SPACE 33 34config TARGET_VCT 35 bool "Support vct" 36 select SUPPORTS_BIG_ENDIAN 37 select SUPPORTS_CPU_MIPS32_R1 38 select SUPPORTS_CPU_MIPS32_R2 39 select SYS_MIPS_CACHE_INIT_RAM_LOAD 40 41config TARGET_DBAU1X00 42 bool "Support dbau1x00" 43 select SUPPORTS_BIG_ENDIAN 44 select SUPPORTS_LITTLE_ENDIAN 45 select SUPPORTS_CPU_MIPS32_R1 46 select SUPPORTS_CPU_MIPS32_R2 47 select SYS_MIPS_CACHE_INIT_RAM_LOAD 48 49config TARGET_PB1X00 50 bool "Support pb1x00" 51 select SUPPORTS_LITTLE_ENDIAN 52 select SUPPORTS_CPU_MIPS32_R1 53 select SUPPORTS_CPU_MIPS32_R2 54 select SYS_MIPS_CACHE_INIT_RAM_LOAD 55 56 57endchoice 58 59source "board/dbau1x00/Kconfig" 60source "board/imgtec/malta/Kconfig" 61source "board/micronas/vct/Kconfig" 62source "board/pb1x00/Kconfig" 63source "board/qemu-mips/Kconfig" 64 65if MIPS 66 67choice 68 prompt "Endianness selection" 69 help 70 Some MIPS boards can be configured for either little or big endian 71 byte order. These modes require different U-Boot images. In general there 72 is one preferred byteorder for a particular system but some systems are 73 just as commonly used in the one or the other endianness. 74 75config SYS_BIG_ENDIAN 76 bool "Big endian" 77 depends on SUPPORTS_BIG_ENDIAN 78 79config SYS_LITTLE_ENDIAN 80 bool "Little endian" 81 depends on SUPPORTS_LITTLE_ENDIAN 82 83endchoice 84 85choice 86 prompt "CPU selection" 87 default CPU_MIPS32_R2 88 89config CPU_MIPS32_R1 90 bool "MIPS32 Release 1" 91 depends on SUPPORTS_CPU_MIPS32_R1 92 select 32BIT 93 help 94 Choose this option to build an U-Boot for release 1 or later of the 95 MIPS32 architecture. 96 97config CPU_MIPS32_R2 98 bool "MIPS32 Release 2" 99 depends on SUPPORTS_CPU_MIPS32_R2 100 select 32BIT 101 help 102 Choose this option to build an U-Boot for release 2 or later of the 103 MIPS32 architecture. 104 105config CPU_MIPS64_R1 106 bool "MIPS64 Release 1" 107 depends on SUPPORTS_CPU_MIPS64_R1 108 select 64BIT 109 help 110 Choose this option to build a kernel for release 1 or later of the 111 MIPS64 architecture. 112 113config CPU_MIPS64_R2 114 bool "MIPS64 Release 2" 115 depends on SUPPORTS_CPU_MIPS64_R2 116 select 64BIT 117 help 118 Choose this option to build a kernel for release 2 or later of the 119 MIPS64 architecture. 120 121endchoice 122 123menu "OS boot interface" 124 125config MIPS_BOOT_CMDLINE_LEGACY 126 bool "Hand over legacy command line to Linux kernel" 127 default y 128 help 129 Enable this option if you want U-Boot to hand over the Yamon-style 130 command line to the kernel. All bootargs will be prepared as argc/argv 131 compatible list. The argument count (argc) is stored in register $a0. 132 The address of the argument list (argv) is stored in register $a1. 133 134config MIPS_BOOT_ENV_LEGACY 135 bool "Hand over legacy environment to Linux kernel" 136 default y 137 help 138 Enable this option if you want U-Boot to hand over the Yamon-style 139 environment to the kernel. Information like memory size, initrd 140 address and size will be prepared as zero-terminated key/value list. 141 The address of the enviroment is stored in register $a2. 142 143config MIPS_BOOT_FDT 144 bool "Hand over a flattened device tree to Linux kernel (INCOMPLETE)" 145 default n 146 help 147 Enable this option if you want U-Boot to hand over a flattened 148 device tree to the kernel. 149 150 Note: the final hand over to the kernel is not yet implemented. After 151 the community agreed on the MIPS boot interface for device trees, 152 the corresponding code will be added. 153 154endmenu 155 156config SUPPORTS_BIG_ENDIAN 157 bool 158 159config SUPPORTS_LITTLE_ENDIAN 160 bool 161 162config SUPPORTS_CPU_MIPS32_R1 163 bool 164 165config SUPPORTS_CPU_MIPS32_R2 166 bool 167 168config SUPPORTS_CPU_MIPS64_R1 169 bool 170 171config SUPPORTS_CPU_MIPS64_R2 172 bool 173 174config CPU_MIPS32 175 bool 176 default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 177 178config CPU_MIPS64 179 bool 180 default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 181 182config 32BIT 183 bool 184 185config 64BIT 186 bool 187 188config SWAP_IO_SPACE 189 bool 190 191config SYS_MIPS_CACHE_INIT_RAM_LOAD 192 bool 193 194endif 195 196endmenu 197