1menu "MIPS architecture" 2 depends on MIPS 3 4config SYS_ARCH 5 default "mips" 6 7config SYS_CPU 8 default "mips32" if CPU_MIPS32_R1 || CPU_MIPS32_R2 9 default "mips64" if CPU_MIPS64_R1 || CPU_MIPS64_R2 10 11choice 12 prompt "Target select" 13 optional 14 15config TARGET_QEMU_MIPS 16 bool "Support qemu-mips" 17 select SUPPORTS_BIG_ENDIAN 18 select SUPPORTS_LITTLE_ENDIAN 19 select SUPPORTS_CPU_MIPS32_R1 20 select SUPPORTS_CPU_MIPS32_R2 21 select SUPPORTS_CPU_MIPS64_R1 22 select SUPPORTS_CPU_MIPS64_R2 23 24config TARGET_MALTA 25 bool "Support malta" 26 select DYNAMIC_IO_PORT_BASE 27 select SUPPORTS_BIG_ENDIAN 28 select SUPPORTS_LITTLE_ENDIAN 29 select SUPPORTS_CPU_MIPS32_R1 30 select SUPPORTS_CPU_MIPS32_R2 31 select SWAP_IO_SPACE 32 select MIPS_L1_CACHE_SHIFT_6 33 34config TARGET_VCT 35 bool "Support vct" 36 select SUPPORTS_BIG_ENDIAN 37 select SUPPORTS_CPU_MIPS32_R1 38 select SUPPORTS_CPU_MIPS32_R2 39 select SYS_MIPS_CACHE_INIT_RAM_LOAD 40 41config TARGET_DBAU1X00 42 bool "Support dbau1x00" 43 select SUPPORTS_BIG_ENDIAN 44 select SUPPORTS_LITTLE_ENDIAN 45 select SUPPORTS_CPU_MIPS32_R1 46 select SUPPORTS_CPU_MIPS32_R2 47 select SYS_MIPS_CACHE_INIT_RAM_LOAD 48 select MIPS_TUNE_4KC 49 50config TARGET_PB1X00 51 bool "Support pb1x00" 52 select SUPPORTS_LITTLE_ENDIAN 53 select SUPPORTS_CPU_MIPS32_R1 54 select SUPPORTS_CPU_MIPS32_R2 55 select SYS_MIPS_CACHE_INIT_RAM_LOAD 56 select MIPS_TUNE_4KC 57 58config ARCH_ATH79 59 bool "Support QCA/Atheros ath79" 60 select OF_CONTROL 61 select DM 62 63config MACH_PIC32 64 bool "Support Microchip PIC32" 65 select OF_CONTROL 66 select DM 67 68endchoice 69 70source "board/dbau1x00/Kconfig" 71source "board/imgtec/malta/Kconfig" 72source "board/micronas/vct/Kconfig" 73source "board/pb1x00/Kconfig" 74source "board/qemu-mips/Kconfig" 75source "arch/mips/mach-ath79/Kconfig" 76source "arch/mips/mach-pic32/Kconfig" 77 78if MIPS 79 80choice 81 prompt "Endianness selection" 82 help 83 Some MIPS boards can be configured for either little or big endian 84 byte order. These modes require different U-Boot images. In general there 85 is one preferred byteorder for a particular system but some systems are 86 just as commonly used in the one or the other endianness. 87 88config SYS_BIG_ENDIAN 89 bool "Big endian" 90 depends on SUPPORTS_BIG_ENDIAN 91 92config SYS_LITTLE_ENDIAN 93 bool "Little endian" 94 depends on SUPPORTS_LITTLE_ENDIAN 95 96endchoice 97 98choice 99 prompt "CPU selection" 100 default CPU_MIPS32_R2 101 102config CPU_MIPS32_R1 103 bool "MIPS32 Release 1" 104 depends on SUPPORTS_CPU_MIPS32_R1 105 select 32BIT 106 help 107 Choose this option to build an U-Boot for release 1 or later of the 108 MIPS32 architecture. 109 110config CPU_MIPS32_R2 111 bool "MIPS32 Release 2" 112 depends on SUPPORTS_CPU_MIPS32_R2 113 select 32BIT 114 help 115 Choose this option to build an U-Boot for release 2 or later of the 116 MIPS32 architecture. 117 118config CPU_MIPS64_R1 119 bool "MIPS64 Release 1" 120 depends on SUPPORTS_CPU_MIPS64_R1 121 select 64BIT 122 help 123 Choose this option to build a kernel for release 1 or later of the 124 MIPS64 architecture. 125 126config CPU_MIPS64_R2 127 bool "MIPS64 Release 2" 128 depends on SUPPORTS_CPU_MIPS64_R2 129 select 64BIT 130 help 131 Choose this option to build a kernel for release 2 or later of the 132 MIPS64 architecture. 133 134endchoice 135 136menu "OS boot interface" 137 138config MIPS_BOOT_CMDLINE_LEGACY 139 bool "Hand over legacy command line to Linux kernel" 140 default y 141 help 142 Enable this option if you want U-Boot to hand over the Yamon-style 143 command line to the kernel. All bootargs will be prepared as argc/argv 144 compatible list. The argument count (argc) is stored in register $a0. 145 The address of the argument list (argv) is stored in register $a1. 146 147config MIPS_BOOT_ENV_LEGACY 148 bool "Hand over legacy environment to Linux kernel" 149 default y 150 help 151 Enable this option if you want U-Boot to hand over the Yamon-style 152 environment to the kernel. Information like memory size, initrd 153 address and size will be prepared as zero-terminated key/value list. 154 The address of the environment is stored in register $a2. 155 156config MIPS_BOOT_FDT 157 bool "Hand over a flattened device tree to Linux kernel" 158 default n 159 help 160 Enable this option if you want U-Boot to hand over a flattened 161 device tree to the kernel. According to UHI register $a0 will be set 162 to -2 and the FDT address is stored in $a1. 163 164endmenu 165 166config SUPPORTS_BIG_ENDIAN 167 bool 168 169config SUPPORTS_LITTLE_ENDIAN 170 bool 171 172config SUPPORTS_CPU_MIPS32_R1 173 bool 174 175config SUPPORTS_CPU_MIPS32_R2 176 bool 177 178config SUPPORTS_CPU_MIPS64_R1 179 bool 180 181config SUPPORTS_CPU_MIPS64_R2 182 bool 183 184config CPU_MIPS32 185 bool 186 default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 187 188config CPU_MIPS64 189 bool 190 default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 191 192config MIPS_TUNE_4KC 193 bool 194 195config MIPS_TUNE_14KC 196 bool 197 198config MIPS_TUNE_24KC 199 bool 200 201config 32BIT 202 bool 203 204config 64BIT 205 bool 206 207config SWAP_IO_SPACE 208 bool 209 210config SYS_MIPS_CACHE_INIT_RAM_LOAD 211 bool 212 213config MIPS_L1_CACHE_SHIFT_4 214 bool 215 216config MIPS_L1_CACHE_SHIFT_5 217 bool 218 219config MIPS_L1_CACHE_SHIFT_6 220 bool 221 222config MIPS_L1_CACHE_SHIFT_7 223 bool 224 225config MIPS_L1_CACHE_SHIFT 226 int 227 default "7" if MIPS_L1_CACHE_SHIFT_7 228 default "6" if MIPS_L1_CACHE_SHIFT_6 229 default "5" if MIPS_L1_CACHE_SHIFT_5 230 default "4" if MIPS_L1_CACHE_SHIFT_4 231 default "5" 232 233config DYNAMIC_IO_PORT_BASE 234 bool 235 236endif 237 238endmenu 239