1dd84058dSMasahiro Yamadamenu "MIPS architecture" 2dd84058dSMasahiro Yamada depends on MIPS 3dd84058dSMasahiro Yamada 4dd84058dSMasahiro Yamadaconfig SYS_ARCH 5dd84058dSMasahiro Yamada default "mips" 6dd84058dSMasahiro Yamada 7b9863b6dSDaniel Schwierzeckconfig SYS_CPU 820286cdfSPaul Burton default "mips32" if CPU_MIPS32 920286cdfSPaul Burton default "mips64" if CPU_MIPS64 10b9863b6dSDaniel Schwierzeck 11dd84058dSMasahiro Yamadachoice 12dd84058dSMasahiro Yamada prompt "Target select" 13a26cd049SJoe Hershberger optional 14dd84058dSMasahiro Yamada 15dd84058dSMasahiro Yamadaconfig TARGET_QEMU_MIPS 16dd84058dSMasahiro Yamada bool "Support qemu-mips" 170e1dc345SDaniel Schwierzeck select SUPPORTS_BIG_ENDIAN 180e1dc345SDaniel Schwierzeck select SUPPORTS_LITTLE_ENDIAN 1902611cbbSDaniel Schwierzeck select SUPPORTS_CPU_MIPS32_R1 2002611cbbSDaniel Schwierzeck select SUPPORTS_CPU_MIPS32_R2 21aa45f75eSDaniel Schwierzeck select SUPPORTS_CPU_MIPS64_R1 22aa45f75eSDaniel Schwierzeck select SUPPORTS_CPU_MIPS64_R2 23dd84058dSMasahiro Yamada 24dd84058dSMasahiro Yamadaconfig TARGET_MALTA 25dd84058dSMasahiro Yamada bool "Support malta" 26*6242aa13SPaul Burton select DM 27*6242aa13SPaul Burton select DM_SERIAL 2805e34255SPaul Burton select DYNAMIC_IO_PORT_BASE 29*6242aa13SPaul Burton select OF_CONTROL 30*6242aa13SPaul Burton select OF_ISA_BUS 310e1dc345SDaniel Schwierzeck select SUPPORTS_BIG_ENDIAN 320e1dc345SDaniel Schwierzeck select SUPPORTS_LITTLE_ENDIAN 3302611cbbSDaniel Schwierzeck select SUPPORTS_CPU_MIPS32_R1 3402611cbbSDaniel Schwierzeck select SUPPORTS_CPU_MIPS32_R2 3540ba13c9SPaul Burton select SUPPORTS_CPU_MIPS32_R6 369d638eeaSDaniel Schwierzeck select SWAP_IO_SPACE 37f53830e7SDaniel Schwierzeck select MIPS_L1_CACHE_SHIFT_6 38dd84058dSMasahiro Yamada 39dd84058dSMasahiro Yamadaconfig TARGET_VCT 40dd84058dSMasahiro Yamada bool "Support vct" 410e1dc345SDaniel Schwierzeck select SUPPORTS_BIG_ENDIAN 4202611cbbSDaniel Schwierzeck select SUPPORTS_CPU_MIPS32_R1 4302611cbbSDaniel Schwierzeck select SUPPORTS_CPU_MIPS32_R2 44dd7c7200SPaul Burton select SYS_MIPS_CACHE_INIT_RAM_LOAD 45dd84058dSMasahiro Yamada 46dd84058dSMasahiro Yamadaconfig TARGET_DBAU1X00 47dd84058dSMasahiro Yamada bool "Support dbau1x00" 480e1dc345SDaniel Schwierzeck select SUPPORTS_BIG_ENDIAN 490e1dc345SDaniel Schwierzeck select SUPPORTS_LITTLE_ENDIAN 5002611cbbSDaniel Schwierzeck select SUPPORTS_CPU_MIPS32_R1 5102611cbbSDaniel Schwierzeck select SUPPORTS_CPU_MIPS32_R2 52dd7c7200SPaul Burton select SYS_MIPS_CACHE_INIT_RAM_LOAD 530315a289SDaniel Schwierzeck select MIPS_TUNE_4KC 54dd84058dSMasahiro Yamada 55dd84058dSMasahiro Yamadaconfig TARGET_PB1X00 56dd84058dSMasahiro Yamada bool "Support pb1x00" 570e1dc345SDaniel Schwierzeck select SUPPORTS_LITTLE_ENDIAN 5802611cbbSDaniel Schwierzeck select SUPPORTS_CPU_MIPS32_R1 5902611cbbSDaniel Schwierzeck select SUPPORTS_CPU_MIPS32_R2 60dd7c7200SPaul Burton select SYS_MIPS_CACHE_INIT_RAM_LOAD 610315a289SDaniel Schwierzeck select MIPS_TUNE_4KC 62dd84058dSMasahiro Yamada 631d3d0f1fSWills Wangconfig ARCH_ATH79 641d3d0f1fSWills Wang bool "Support QCA/Atheros ath79" 651d3d0f1fSWills Wang select OF_CONTROL 661d3d0f1fSWills Wang select DM 671d3d0f1fSWills Wang 6832c1a6eeSPurna Chandra Mandalconfig MACH_PIC32 6932c1a6eeSPurna Chandra Mandal bool "Support Microchip PIC32" 7032c1a6eeSPurna Chandra Mandal select OF_CONTROL 7132c1a6eeSPurna Chandra Mandal select DM 7232c1a6eeSPurna Chandra Mandal 73dd84058dSMasahiro Yamadaendchoice 74dd84058dSMasahiro Yamada 75dd84058dSMasahiro Yamadasource "board/dbau1x00/Kconfig" 76dd84058dSMasahiro Yamadasource "board/imgtec/malta/Kconfig" 77dd84058dSMasahiro Yamadasource "board/micronas/vct/Kconfig" 78dd84058dSMasahiro Yamadasource "board/pb1x00/Kconfig" 79dd84058dSMasahiro Yamadasource "board/qemu-mips/Kconfig" 801d3d0f1fSWills Wangsource "arch/mips/mach-ath79/Kconfig" 8132c1a6eeSPurna Chandra Mandalsource "arch/mips/mach-pic32/Kconfig" 82dd84058dSMasahiro Yamada 830e1dc345SDaniel Schwierzeckif MIPS 840e1dc345SDaniel Schwierzeck 850e1dc345SDaniel Schwierzeckchoice 860e1dc345SDaniel Schwierzeck prompt "Endianness selection" 870e1dc345SDaniel Schwierzeck help 880e1dc345SDaniel Schwierzeck Some MIPS boards can be configured for either little or big endian 890e1dc345SDaniel Schwierzeck byte order. These modes require different U-Boot images. In general there 900e1dc345SDaniel Schwierzeck is one preferred byteorder for a particular system but some systems are 910e1dc345SDaniel Schwierzeck just as commonly used in the one or the other endianness. 920e1dc345SDaniel Schwierzeck 930e1dc345SDaniel Schwierzeckconfig SYS_BIG_ENDIAN 940e1dc345SDaniel Schwierzeck bool "Big endian" 950e1dc345SDaniel Schwierzeck depends on SUPPORTS_BIG_ENDIAN 960e1dc345SDaniel Schwierzeck 970e1dc345SDaniel Schwierzeckconfig SYS_LITTLE_ENDIAN 980e1dc345SDaniel Schwierzeck bool "Little endian" 990e1dc345SDaniel Schwierzeck depends on SUPPORTS_LITTLE_ENDIAN 1000e1dc345SDaniel Schwierzeck 1010e1dc345SDaniel Schwierzeckendchoice 1020e1dc345SDaniel Schwierzeck 10302611cbbSDaniel Schwierzeckchoice 10402611cbbSDaniel Schwierzeck prompt "CPU selection" 10502611cbbSDaniel Schwierzeck default CPU_MIPS32_R2 10602611cbbSDaniel Schwierzeck 10702611cbbSDaniel Schwierzeckconfig CPU_MIPS32_R1 10802611cbbSDaniel Schwierzeck bool "MIPS32 Release 1" 10902611cbbSDaniel Schwierzeck depends on SUPPORTS_CPU_MIPS32_R1 11002611cbbSDaniel Schwierzeck select 32BIT 11102611cbbSDaniel Schwierzeck help 112c52ebea1SPaul Burton Choose this option to build an U-Boot for release 1 through 5 of the 11302611cbbSDaniel Schwierzeck MIPS32 architecture. 11402611cbbSDaniel Schwierzeck 11502611cbbSDaniel Schwierzeckconfig CPU_MIPS32_R2 11602611cbbSDaniel Schwierzeck bool "MIPS32 Release 2" 11702611cbbSDaniel Schwierzeck depends on SUPPORTS_CPU_MIPS32_R2 11802611cbbSDaniel Schwierzeck select 32BIT 11902611cbbSDaniel Schwierzeck help 120c52ebea1SPaul Burton Choose this option to build an U-Boot for release 2 through 5 of the 121c52ebea1SPaul Burton MIPS32 architecture. 122c52ebea1SPaul Burton 123c52ebea1SPaul Burtonconfig CPU_MIPS32_R6 124c52ebea1SPaul Burton bool "MIPS32 Release 6" 125c52ebea1SPaul Burton depends on SUPPORTS_CPU_MIPS32_R6 126c52ebea1SPaul Burton select 32BIT 127c52ebea1SPaul Burton help 128c52ebea1SPaul Burton Choose this option to build an U-Boot for release 6 or later of the 12902611cbbSDaniel Schwierzeck MIPS32 architecture. 13002611cbbSDaniel Schwierzeck 13102611cbbSDaniel Schwierzeckconfig CPU_MIPS64_R1 13202611cbbSDaniel Schwierzeck bool "MIPS64 Release 1" 13302611cbbSDaniel Schwierzeck depends on SUPPORTS_CPU_MIPS64_R1 13402611cbbSDaniel Schwierzeck select 64BIT 13502611cbbSDaniel Schwierzeck help 136c52ebea1SPaul Burton Choose this option to build a kernel for release 1 through 5 of the 13702611cbbSDaniel Schwierzeck MIPS64 architecture. 13802611cbbSDaniel Schwierzeck 13902611cbbSDaniel Schwierzeckconfig CPU_MIPS64_R2 14002611cbbSDaniel Schwierzeck bool "MIPS64 Release 2" 14102611cbbSDaniel Schwierzeck depends on SUPPORTS_CPU_MIPS64_R2 14202611cbbSDaniel Schwierzeck select 64BIT 14302611cbbSDaniel Schwierzeck help 144c52ebea1SPaul Burton Choose this option to build a kernel for release 2 through 5 of the 145c52ebea1SPaul Burton MIPS64 architecture. 146c52ebea1SPaul Burton 147c52ebea1SPaul Burtonconfig CPU_MIPS64_R6 148c52ebea1SPaul Burton bool "MIPS64 Release 6" 149c52ebea1SPaul Burton depends on SUPPORTS_CPU_MIPS64_R6 150c52ebea1SPaul Burton select 64BIT 151c52ebea1SPaul Burton help 152c52ebea1SPaul Burton Choose this option to build a kernel for release 6 or later of the 15302611cbbSDaniel Schwierzeck MIPS64 architecture. 15402611cbbSDaniel Schwierzeck 15502611cbbSDaniel Schwierzeckendchoice 15602611cbbSDaniel Schwierzeck 15725fc664fSDaniel Schwierzeckmenu "OS boot interface" 15825fc664fSDaniel Schwierzeck 15925fc664fSDaniel Schwierzeckconfig MIPS_BOOT_CMDLINE_LEGACY 16025fc664fSDaniel Schwierzeck bool "Hand over legacy command line to Linux kernel" 16125fc664fSDaniel Schwierzeck default y 16225fc664fSDaniel Schwierzeck help 16325fc664fSDaniel Schwierzeck Enable this option if you want U-Boot to hand over the Yamon-style 16425fc664fSDaniel Schwierzeck command line to the kernel. All bootargs will be prepared as argc/argv 16525fc664fSDaniel Schwierzeck compatible list. The argument count (argc) is stored in register $a0. 16625fc664fSDaniel Schwierzeck The address of the argument list (argv) is stored in register $a1. 16725fc664fSDaniel Schwierzeck 168ca65e585SDaniel Schwierzeckconfig MIPS_BOOT_ENV_LEGACY 169ca65e585SDaniel Schwierzeck bool "Hand over legacy environment to Linux kernel" 170ca65e585SDaniel Schwierzeck default y 171ca65e585SDaniel Schwierzeck help 172ca65e585SDaniel Schwierzeck Enable this option if you want U-Boot to hand over the Yamon-style 173ca65e585SDaniel Schwierzeck environment to the kernel. Information like memory size, initrd 174ca65e585SDaniel Schwierzeck address and size will be prepared as zero-terminated key/value list. 1751cc0a9f4SRobert P. J. Day The address of the environment is stored in register $a2. 176ca65e585SDaniel Schwierzeck 1775002d8ccSDaniel Schwierzeckconfig MIPS_BOOT_FDT 17890b1c9faSDaniel Schwierzeck bool "Hand over a flattened device tree to Linux kernel" 1795002d8ccSDaniel Schwierzeck default n 1805002d8ccSDaniel Schwierzeck help 1815002d8ccSDaniel Schwierzeck Enable this option if you want U-Boot to hand over a flattened 18290b1c9faSDaniel Schwierzeck device tree to the kernel. According to UHI register $a0 will be set 18390b1c9faSDaniel Schwierzeck to -2 and the FDT address is stored in $a1. 1845002d8ccSDaniel Schwierzeck 18525fc664fSDaniel Schwierzeckendmenu 18625fc664fSDaniel Schwierzeck 1870e1dc345SDaniel Schwierzeckconfig SUPPORTS_BIG_ENDIAN 1880e1dc345SDaniel Schwierzeck bool 1890e1dc345SDaniel Schwierzeck 1900e1dc345SDaniel Schwierzeckconfig SUPPORTS_LITTLE_ENDIAN 1910e1dc345SDaniel Schwierzeck bool 1920e1dc345SDaniel Schwierzeck 19302611cbbSDaniel Schwierzeckconfig SUPPORTS_CPU_MIPS32_R1 19402611cbbSDaniel Schwierzeck bool 19502611cbbSDaniel Schwierzeck 19602611cbbSDaniel Schwierzeckconfig SUPPORTS_CPU_MIPS32_R2 19702611cbbSDaniel Schwierzeck bool 19802611cbbSDaniel Schwierzeck 199c52ebea1SPaul Burtonconfig SUPPORTS_CPU_MIPS32_R6 200c52ebea1SPaul Burton bool 201c52ebea1SPaul Burton 20202611cbbSDaniel Schwierzeckconfig SUPPORTS_CPU_MIPS64_R1 20302611cbbSDaniel Schwierzeck bool 20402611cbbSDaniel Schwierzeck 20502611cbbSDaniel Schwierzeckconfig SUPPORTS_CPU_MIPS64_R2 20602611cbbSDaniel Schwierzeck bool 20702611cbbSDaniel Schwierzeck 208c52ebea1SPaul Burtonconfig SUPPORTS_CPU_MIPS64_R6 209c52ebea1SPaul Burton bool 210c52ebea1SPaul Burton 211c57dafb5SDaniel Schwierzeckconfig CPU_MIPS32 212c57dafb5SDaniel Schwierzeck bool 213c52ebea1SPaul Burton default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R6 214c57dafb5SDaniel Schwierzeck 215c57dafb5SDaniel Schwierzeckconfig CPU_MIPS64 216c57dafb5SDaniel Schwierzeck bool 217c52ebea1SPaul Burton default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R6 218c57dafb5SDaniel Schwierzeck 2190315a289SDaniel Schwierzeckconfig MIPS_TUNE_4KC 2200315a289SDaniel Schwierzeck bool 2210315a289SDaniel Schwierzeck 2220315a289SDaniel Schwierzeckconfig MIPS_TUNE_14KC 2230315a289SDaniel Schwierzeck bool 2240315a289SDaniel Schwierzeck 2250315a289SDaniel Schwierzeckconfig MIPS_TUNE_24KC 2260315a289SDaniel Schwierzeck bool 2270315a289SDaniel Schwierzeck 2280a0a958bSMarek Vasutconfig MIPS_TUNE_74KC 2290a0a958bSMarek Vasut bool 2300a0a958bSMarek Vasut 23102611cbbSDaniel Schwierzeckconfig 32BIT 23202611cbbSDaniel Schwierzeck bool 23302611cbbSDaniel Schwierzeck 23402611cbbSDaniel Schwierzeckconfig 64BIT 23502611cbbSDaniel Schwierzeck bool 23602611cbbSDaniel Schwierzeck 2379d638eeaSDaniel Schwierzeckconfig SWAP_IO_SPACE 2389d638eeaSDaniel Schwierzeck bool 2399d638eeaSDaniel Schwierzeck 240dd7c7200SPaul Burtonconfig SYS_MIPS_CACHE_INIT_RAM_LOAD 241dd7c7200SPaul Burton bool 242dd7c7200SPaul Burton 243f53830e7SDaniel Schwierzeckconfig MIPS_L1_CACHE_SHIFT_4 244f53830e7SDaniel Schwierzeck bool 245f53830e7SDaniel Schwierzeck 246f53830e7SDaniel Schwierzeckconfig MIPS_L1_CACHE_SHIFT_5 247f53830e7SDaniel Schwierzeck bool 248f53830e7SDaniel Schwierzeck 249f53830e7SDaniel Schwierzeckconfig MIPS_L1_CACHE_SHIFT_6 250f53830e7SDaniel Schwierzeck bool 251f53830e7SDaniel Schwierzeck 252f53830e7SDaniel Schwierzeckconfig MIPS_L1_CACHE_SHIFT_7 253f53830e7SDaniel Schwierzeck bool 254f53830e7SDaniel Schwierzeck 255f53830e7SDaniel Schwierzeckconfig MIPS_L1_CACHE_SHIFT 256f53830e7SDaniel Schwierzeck int 257f53830e7SDaniel Schwierzeck default "7" if MIPS_L1_CACHE_SHIFT_7 258f53830e7SDaniel Schwierzeck default "6" if MIPS_L1_CACHE_SHIFT_6 259f53830e7SDaniel Schwierzeck default "5" if MIPS_L1_CACHE_SHIFT_5 260f53830e7SDaniel Schwierzeck default "4" if MIPS_L1_CACHE_SHIFT_4 261f53830e7SDaniel Schwierzeck default "5" 262f53830e7SDaniel Schwierzeck 26305e34255SPaul Burtonconfig DYNAMIC_IO_PORT_BASE 26405e34255SPaul Burton bool 26505e34255SPaul Burton 2660e1dc345SDaniel Schwierzeckendif 2670e1dc345SDaniel Schwierzeck 268dd84058dSMasahiro Yamadaendmenu 269