1dd84058dSMasahiro Yamadamenu "MIPS architecture" 2dd84058dSMasahiro Yamada depends on MIPS 3dd84058dSMasahiro Yamada 4dd84058dSMasahiro Yamadaconfig SYS_ARCH 5dd84058dSMasahiro Yamada default "mips" 6dd84058dSMasahiro Yamada 7b9863b6dSDaniel Schwierzeckconfig SYS_CPU 820286cdfSPaul Burton default "mips32" if CPU_MIPS32 920286cdfSPaul Burton default "mips64" if CPU_MIPS64 10b9863b6dSDaniel Schwierzeck 11dd84058dSMasahiro Yamadachoice 12dd84058dSMasahiro Yamada prompt "Target select" 13a26cd049SJoe Hershberger optional 14dd84058dSMasahiro Yamada 15dd84058dSMasahiro Yamadaconfig TARGET_QEMU_MIPS 16dd84058dSMasahiro Yamada bool "Support qemu-mips" 170e1dc345SDaniel Schwierzeck select SUPPORTS_BIG_ENDIAN 180e1dc345SDaniel Schwierzeck select SUPPORTS_LITTLE_ENDIAN 1902611cbbSDaniel Schwierzeck select SUPPORTS_CPU_MIPS32_R1 2002611cbbSDaniel Schwierzeck select SUPPORTS_CPU_MIPS32_R2 21aa45f75eSDaniel Schwierzeck select SUPPORTS_CPU_MIPS64_R1 22aa45f75eSDaniel Schwierzeck select SUPPORTS_CPU_MIPS64_R2 23dd84058dSMasahiro Yamada 24dd84058dSMasahiro Yamadaconfig TARGET_MALTA 25dd84058dSMasahiro Yamada bool "Support malta" 266242aa13SPaul Burton select DM 276242aa13SPaul Burton select DM_SERIAL 2805e34255SPaul Burton select DYNAMIC_IO_PORT_BASE 296242aa13SPaul Burton select OF_CONTROL 306242aa13SPaul Burton select OF_ISA_BUS 310e1dc345SDaniel Schwierzeck select SUPPORTS_BIG_ENDIAN 320e1dc345SDaniel Schwierzeck select SUPPORTS_LITTLE_ENDIAN 3302611cbbSDaniel Schwierzeck select SUPPORTS_CPU_MIPS32_R1 3402611cbbSDaniel Schwierzeck select SUPPORTS_CPU_MIPS32_R2 3540ba13c9SPaul Burton select SUPPORTS_CPU_MIPS32_R6 360f832b9cSPaul Burton select SUPPORTS_CPU_MIPS64_R1 370f832b9cSPaul Burton select SUPPORTS_CPU_MIPS64_R2 380f832b9cSPaul Burton select SUPPORTS_CPU_MIPS64_R6 399d638eeaSDaniel Schwierzeck select SWAP_IO_SPACE 40f53830e7SDaniel Schwierzeck select MIPS_L1_CACHE_SHIFT_6 41dd84058dSMasahiro Yamada 42dd84058dSMasahiro Yamadaconfig TARGET_VCT 43dd84058dSMasahiro Yamada bool "Support vct" 440e1dc345SDaniel Schwierzeck select SUPPORTS_BIG_ENDIAN 4502611cbbSDaniel Schwierzeck select SUPPORTS_CPU_MIPS32_R1 4602611cbbSDaniel Schwierzeck select SUPPORTS_CPU_MIPS32_R2 47dd7c7200SPaul Burton select SYS_MIPS_CACHE_INIT_RAM_LOAD 48dd84058dSMasahiro Yamada 49dd84058dSMasahiro Yamadaconfig TARGET_DBAU1X00 50dd84058dSMasahiro Yamada bool "Support dbau1x00" 510e1dc345SDaniel Schwierzeck select SUPPORTS_BIG_ENDIAN 520e1dc345SDaniel Schwierzeck select SUPPORTS_LITTLE_ENDIAN 5302611cbbSDaniel Schwierzeck select SUPPORTS_CPU_MIPS32_R1 5402611cbbSDaniel Schwierzeck select SUPPORTS_CPU_MIPS32_R2 55dd7c7200SPaul Burton select SYS_MIPS_CACHE_INIT_RAM_LOAD 560315a289SDaniel Schwierzeck select MIPS_TUNE_4KC 57dd84058dSMasahiro Yamada 58dd84058dSMasahiro Yamadaconfig TARGET_PB1X00 59dd84058dSMasahiro Yamada bool "Support pb1x00" 600e1dc345SDaniel Schwierzeck select SUPPORTS_LITTLE_ENDIAN 6102611cbbSDaniel Schwierzeck select SUPPORTS_CPU_MIPS32_R1 6202611cbbSDaniel Schwierzeck select SUPPORTS_CPU_MIPS32_R2 63dd7c7200SPaul Burton select SYS_MIPS_CACHE_INIT_RAM_LOAD 640315a289SDaniel Schwierzeck select MIPS_TUNE_4KC 65dd84058dSMasahiro Yamada 661d3d0f1fSWills Wangconfig ARCH_ATH79 671d3d0f1fSWills Wang bool "Support QCA/Atheros ath79" 681d3d0f1fSWills Wang select OF_CONTROL 691d3d0f1fSWills Wang select DM 701d3d0f1fSWills Wang 7132c1a6eeSPurna Chandra Mandalconfig MACH_PIC32 7232c1a6eeSPurna Chandra Mandal bool "Support Microchip PIC32" 7332c1a6eeSPurna Chandra Mandal select OF_CONTROL 7432c1a6eeSPurna Chandra Mandal select DM 7532c1a6eeSPurna Chandra Mandal 76dd84058dSMasahiro Yamadaendchoice 77dd84058dSMasahiro Yamada 78dd84058dSMasahiro Yamadasource "board/dbau1x00/Kconfig" 79dd84058dSMasahiro Yamadasource "board/imgtec/malta/Kconfig" 80dd84058dSMasahiro Yamadasource "board/micronas/vct/Kconfig" 81dd84058dSMasahiro Yamadasource "board/pb1x00/Kconfig" 82dd84058dSMasahiro Yamadasource "board/qemu-mips/Kconfig" 831d3d0f1fSWills Wangsource "arch/mips/mach-ath79/Kconfig" 8432c1a6eeSPurna Chandra Mandalsource "arch/mips/mach-pic32/Kconfig" 85dd84058dSMasahiro Yamada 860e1dc345SDaniel Schwierzeckif MIPS 870e1dc345SDaniel Schwierzeck 880e1dc345SDaniel Schwierzeckchoice 890e1dc345SDaniel Schwierzeck prompt "Endianness selection" 900e1dc345SDaniel Schwierzeck help 910e1dc345SDaniel Schwierzeck Some MIPS boards can be configured for either little or big endian 920e1dc345SDaniel Schwierzeck byte order. These modes require different U-Boot images. In general there 930e1dc345SDaniel Schwierzeck is one preferred byteorder for a particular system but some systems are 940e1dc345SDaniel Schwierzeck just as commonly used in the one or the other endianness. 950e1dc345SDaniel Schwierzeck 960e1dc345SDaniel Schwierzeckconfig SYS_BIG_ENDIAN 970e1dc345SDaniel Schwierzeck bool "Big endian" 980e1dc345SDaniel Schwierzeck depends on SUPPORTS_BIG_ENDIAN 990e1dc345SDaniel Schwierzeck 1000e1dc345SDaniel Schwierzeckconfig SYS_LITTLE_ENDIAN 1010e1dc345SDaniel Schwierzeck bool "Little endian" 1020e1dc345SDaniel Schwierzeck depends on SUPPORTS_LITTLE_ENDIAN 1030e1dc345SDaniel Schwierzeck 1040e1dc345SDaniel Schwierzeckendchoice 1050e1dc345SDaniel Schwierzeck 10602611cbbSDaniel Schwierzeckchoice 10702611cbbSDaniel Schwierzeck prompt "CPU selection" 10802611cbbSDaniel Schwierzeck default CPU_MIPS32_R2 10902611cbbSDaniel Schwierzeck 11002611cbbSDaniel Schwierzeckconfig CPU_MIPS32_R1 11102611cbbSDaniel Schwierzeck bool "MIPS32 Release 1" 11202611cbbSDaniel Schwierzeck depends on SUPPORTS_CPU_MIPS32_R1 11302611cbbSDaniel Schwierzeck select 32BIT 11402611cbbSDaniel Schwierzeck help 115c52ebea1SPaul Burton Choose this option to build an U-Boot for release 1 through 5 of the 11602611cbbSDaniel Schwierzeck MIPS32 architecture. 11702611cbbSDaniel Schwierzeck 11802611cbbSDaniel Schwierzeckconfig CPU_MIPS32_R2 11902611cbbSDaniel Schwierzeck bool "MIPS32 Release 2" 12002611cbbSDaniel Schwierzeck depends on SUPPORTS_CPU_MIPS32_R2 12102611cbbSDaniel Schwierzeck select 32BIT 12202611cbbSDaniel Schwierzeck help 123c52ebea1SPaul Burton Choose this option to build an U-Boot for release 2 through 5 of the 124c52ebea1SPaul Burton MIPS32 architecture. 125c52ebea1SPaul Burton 126c52ebea1SPaul Burtonconfig CPU_MIPS32_R6 127c52ebea1SPaul Burton bool "MIPS32 Release 6" 128c52ebea1SPaul Burton depends on SUPPORTS_CPU_MIPS32_R6 129c52ebea1SPaul Burton select 32BIT 130c52ebea1SPaul Burton help 131c52ebea1SPaul Burton Choose this option to build an U-Boot for release 6 or later of the 13202611cbbSDaniel Schwierzeck MIPS32 architecture. 13302611cbbSDaniel Schwierzeck 13402611cbbSDaniel Schwierzeckconfig CPU_MIPS64_R1 13502611cbbSDaniel Schwierzeck bool "MIPS64 Release 1" 13602611cbbSDaniel Schwierzeck depends on SUPPORTS_CPU_MIPS64_R1 13702611cbbSDaniel Schwierzeck select 64BIT 13802611cbbSDaniel Schwierzeck help 139c52ebea1SPaul Burton Choose this option to build a kernel for release 1 through 5 of the 14002611cbbSDaniel Schwierzeck MIPS64 architecture. 14102611cbbSDaniel Schwierzeck 14202611cbbSDaniel Schwierzeckconfig CPU_MIPS64_R2 14302611cbbSDaniel Schwierzeck bool "MIPS64 Release 2" 14402611cbbSDaniel Schwierzeck depends on SUPPORTS_CPU_MIPS64_R2 14502611cbbSDaniel Schwierzeck select 64BIT 14602611cbbSDaniel Schwierzeck help 147c52ebea1SPaul Burton Choose this option to build a kernel for release 2 through 5 of the 148c52ebea1SPaul Burton MIPS64 architecture. 149c52ebea1SPaul Burton 150c52ebea1SPaul Burtonconfig CPU_MIPS64_R6 151c52ebea1SPaul Burton bool "MIPS64 Release 6" 152c52ebea1SPaul Burton depends on SUPPORTS_CPU_MIPS64_R6 153c52ebea1SPaul Burton select 64BIT 154c52ebea1SPaul Burton help 155c52ebea1SPaul Burton Choose this option to build a kernel for release 6 or later of the 15602611cbbSDaniel Schwierzeck MIPS64 architecture. 15702611cbbSDaniel Schwierzeck 15802611cbbSDaniel Schwierzeckendchoice 15902611cbbSDaniel Schwierzeck 16025fc664fSDaniel Schwierzeckmenu "OS boot interface" 16125fc664fSDaniel Schwierzeck 16225fc664fSDaniel Schwierzeckconfig MIPS_BOOT_CMDLINE_LEGACY 16325fc664fSDaniel Schwierzeck bool "Hand over legacy command line to Linux kernel" 16425fc664fSDaniel Schwierzeck default y 16525fc664fSDaniel Schwierzeck help 16625fc664fSDaniel Schwierzeck Enable this option if you want U-Boot to hand over the Yamon-style 16725fc664fSDaniel Schwierzeck command line to the kernel. All bootargs will be prepared as argc/argv 16825fc664fSDaniel Schwierzeck compatible list. The argument count (argc) is stored in register $a0. 16925fc664fSDaniel Schwierzeck The address of the argument list (argv) is stored in register $a1. 17025fc664fSDaniel Schwierzeck 171ca65e585SDaniel Schwierzeckconfig MIPS_BOOT_ENV_LEGACY 172ca65e585SDaniel Schwierzeck bool "Hand over legacy environment to Linux kernel" 173ca65e585SDaniel Schwierzeck default y 174ca65e585SDaniel Schwierzeck help 175ca65e585SDaniel Schwierzeck Enable this option if you want U-Boot to hand over the Yamon-style 176ca65e585SDaniel Schwierzeck environment to the kernel. Information like memory size, initrd 177ca65e585SDaniel Schwierzeck address and size will be prepared as zero-terminated key/value list. 1781cc0a9f4SRobert P. J. Day The address of the environment is stored in register $a2. 179ca65e585SDaniel Schwierzeck 1805002d8ccSDaniel Schwierzeckconfig MIPS_BOOT_FDT 18190b1c9faSDaniel Schwierzeck bool "Hand over a flattened device tree to Linux kernel" 1825002d8ccSDaniel Schwierzeck default n 1835002d8ccSDaniel Schwierzeck help 1845002d8ccSDaniel Schwierzeck Enable this option if you want U-Boot to hand over a flattened 18590b1c9faSDaniel Schwierzeck device tree to the kernel. According to UHI register $a0 will be set 18690b1c9faSDaniel Schwierzeck to -2 and the FDT address is stored in $a1. 1875002d8ccSDaniel Schwierzeck 18825fc664fSDaniel Schwierzeckendmenu 18925fc664fSDaniel Schwierzeck 1900e1dc345SDaniel Schwierzeckconfig SUPPORTS_BIG_ENDIAN 1910e1dc345SDaniel Schwierzeck bool 1920e1dc345SDaniel Schwierzeck 1930e1dc345SDaniel Schwierzeckconfig SUPPORTS_LITTLE_ENDIAN 1940e1dc345SDaniel Schwierzeck bool 1950e1dc345SDaniel Schwierzeck 19602611cbbSDaniel Schwierzeckconfig SUPPORTS_CPU_MIPS32_R1 19702611cbbSDaniel Schwierzeck bool 19802611cbbSDaniel Schwierzeck 19902611cbbSDaniel Schwierzeckconfig SUPPORTS_CPU_MIPS32_R2 20002611cbbSDaniel Schwierzeck bool 20102611cbbSDaniel Schwierzeck 202c52ebea1SPaul Burtonconfig SUPPORTS_CPU_MIPS32_R6 203c52ebea1SPaul Burton bool 204c52ebea1SPaul Burton 20502611cbbSDaniel Schwierzeckconfig SUPPORTS_CPU_MIPS64_R1 20602611cbbSDaniel Schwierzeck bool 20702611cbbSDaniel Schwierzeck 20802611cbbSDaniel Schwierzeckconfig SUPPORTS_CPU_MIPS64_R2 20902611cbbSDaniel Schwierzeck bool 21002611cbbSDaniel Schwierzeck 211c52ebea1SPaul Burtonconfig SUPPORTS_CPU_MIPS64_R6 212c52ebea1SPaul Burton bool 213c52ebea1SPaul Burton 214c57dafb5SDaniel Schwierzeckconfig CPU_MIPS32 215c57dafb5SDaniel Schwierzeck bool 216c52ebea1SPaul Burton default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R6 217c57dafb5SDaniel Schwierzeck 218c57dafb5SDaniel Schwierzeckconfig CPU_MIPS64 219c57dafb5SDaniel Schwierzeck bool 220c52ebea1SPaul Burton default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R6 221c57dafb5SDaniel Schwierzeck 2220315a289SDaniel Schwierzeckconfig MIPS_TUNE_4KC 2230315a289SDaniel Schwierzeck bool 2240315a289SDaniel Schwierzeck 2250315a289SDaniel Schwierzeckconfig MIPS_TUNE_14KC 2260315a289SDaniel Schwierzeck bool 2270315a289SDaniel Schwierzeck 2280315a289SDaniel Schwierzeckconfig MIPS_TUNE_24KC 2290315a289SDaniel Schwierzeck bool 2300315a289SDaniel Schwierzeck 2315f9cc363SDaniel Schwierzeckconfig MIPS_TUNE_34KC 2325f9cc363SDaniel Schwierzeck bool 2335f9cc363SDaniel Schwierzeck 2340a0a958bSMarek Vasutconfig MIPS_TUNE_74KC 2350a0a958bSMarek Vasut bool 2360a0a958bSMarek Vasut 23702611cbbSDaniel Schwierzeckconfig 32BIT 23802611cbbSDaniel Schwierzeck bool 23902611cbbSDaniel Schwierzeck 24002611cbbSDaniel Schwierzeckconfig 64BIT 24102611cbbSDaniel Schwierzeck bool 24202611cbbSDaniel Schwierzeck 2439d638eeaSDaniel Schwierzeckconfig SWAP_IO_SPACE 2449d638eeaSDaniel Schwierzeck bool 2459d638eeaSDaniel Schwierzeck 246dd7c7200SPaul Burtonconfig SYS_MIPS_CACHE_INIT_RAM_LOAD 247dd7c7200SPaul Burton bool 248dd7c7200SPaul Burton 249ace3be4fSPaul Burtonconfig SYS_DCACHE_SIZE 250ace3be4fSPaul Burton int 251ace3be4fSPaul Burton default 0 252ace3be4fSPaul Burton help 253ace3be4fSPaul Burton The total size of the L1 Dcache, if known at compile time. 254ace3be4fSPaul Burton 25537228621SPaul Burtonconfig SYS_DCACHE_LINE_SIZE 256*4b7b0a0fSPaul Burton int 25737228621SPaul Burton default 0 25837228621SPaul Burton help 25937228621SPaul Burton The size of L1 Dcache lines, if known at compile time. 26037228621SPaul Burton 261ace3be4fSPaul Burtonconfig SYS_ICACHE_SIZE 262ace3be4fSPaul Burton int 263ace3be4fSPaul Burton default 0 264ace3be4fSPaul Burton help 265ace3be4fSPaul Burton The total size of the L1 ICache, if known at compile time. 266ace3be4fSPaul Burton 26737228621SPaul Burtonconfig SYS_ICACHE_LINE_SIZE 268ace3be4fSPaul Burton int 269ace3be4fSPaul Burton default 0 270ace3be4fSPaul Burton help 27137228621SPaul Burton The size of L1 Icache lines, if known at compile time. 272ace3be4fSPaul Burton 273ace3be4fSPaul Burtonconfig SYS_CACHE_SIZE_AUTO 274ace3be4fSPaul Burton def_bool y if SYS_DCACHE_SIZE = 0 && SYS_ICACHE_SIZE = 0 && \ 27537228621SPaul Burton SYS_DCACHE_LINE_SIZE = 0 && SYS_ICACHE_LINE_SIZE = 0 276ace3be4fSPaul Burton help 277ace3be4fSPaul Burton Select this (or let it be auto-selected by not defining any cache 278ace3be4fSPaul Burton sizes) in order to allow U-Boot to automatically detect the sizes 279ace3be4fSPaul Burton of caches at runtime. This has a small cost in code size & runtime 280ace3be4fSPaul Burton so if you know the cache configuration for your system at compile 281ace3be4fSPaul Burton time it would be beneficial to configure it. 282ace3be4fSPaul Burton 283f53830e7SDaniel Schwierzeckconfig MIPS_L1_CACHE_SHIFT_4 284f53830e7SDaniel Schwierzeck bool 285f53830e7SDaniel Schwierzeck 286f53830e7SDaniel Schwierzeckconfig MIPS_L1_CACHE_SHIFT_5 287f53830e7SDaniel Schwierzeck bool 288f53830e7SDaniel Schwierzeck 289f53830e7SDaniel Schwierzeckconfig MIPS_L1_CACHE_SHIFT_6 290f53830e7SDaniel Schwierzeck bool 291f53830e7SDaniel Schwierzeck 292f53830e7SDaniel Schwierzeckconfig MIPS_L1_CACHE_SHIFT_7 293f53830e7SDaniel Schwierzeck bool 294f53830e7SDaniel Schwierzeck 295f53830e7SDaniel Schwierzeckconfig MIPS_L1_CACHE_SHIFT 296f53830e7SDaniel Schwierzeck int 297f53830e7SDaniel Schwierzeck default "7" if MIPS_L1_CACHE_SHIFT_7 298f53830e7SDaniel Schwierzeck default "6" if MIPS_L1_CACHE_SHIFT_6 299f53830e7SDaniel Schwierzeck default "5" if MIPS_L1_CACHE_SHIFT_5 300f53830e7SDaniel Schwierzeck default "4" if MIPS_L1_CACHE_SHIFT_4 301f53830e7SDaniel Schwierzeck default "5" 302f53830e7SDaniel Schwierzeck 30305e34255SPaul Burtonconfig DYNAMIC_IO_PORT_BASE 30405e34255SPaul Burton bool 30505e34255SPaul Burton 3060e1dc345SDaniel Schwierzeckendif 3070e1dc345SDaniel Schwierzeck 308dd84058dSMasahiro Yamadaendmenu 309