1dd84058dSMasahiro Yamadamenu "MIPS architecture" 2dd84058dSMasahiro Yamada depends on MIPS 3dd84058dSMasahiro Yamada 4dd84058dSMasahiro Yamadaconfig SYS_ARCH 5dd84058dSMasahiro Yamada default "mips" 6dd84058dSMasahiro Yamada 7b9863b6dSDaniel Schwierzeckconfig SYS_CPU 8b9863b6dSDaniel Schwierzeck default "mips32" if CPU_MIPS32_R1 || CPU_MIPS32_R2 9b9863b6dSDaniel Schwierzeck default "mips64" if CPU_MIPS64_R1 || CPU_MIPS64_R2 10b9863b6dSDaniel Schwierzeck 11dd84058dSMasahiro Yamadachoice 12dd84058dSMasahiro Yamada prompt "Target select" 13a26cd049SJoe Hershberger optional 14dd84058dSMasahiro Yamada 15dd84058dSMasahiro Yamadaconfig TARGET_QEMU_MIPS 16dd84058dSMasahiro Yamada bool "Support qemu-mips" 170e1dc345SDaniel Schwierzeck select SUPPORTS_BIG_ENDIAN 180e1dc345SDaniel Schwierzeck select SUPPORTS_LITTLE_ENDIAN 1902611cbbSDaniel Schwierzeck select SUPPORTS_CPU_MIPS32_R1 2002611cbbSDaniel Schwierzeck select SUPPORTS_CPU_MIPS32_R2 21aa45f75eSDaniel Schwierzeck select SUPPORTS_CPU_MIPS64_R1 22aa45f75eSDaniel Schwierzeck select SUPPORTS_CPU_MIPS64_R2 23dd84058dSMasahiro Yamada 24dd84058dSMasahiro Yamadaconfig TARGET_MALTA 25dd84058dSMasahiro Yamada bool "Support malta" 2605e34255SPaul Burton select DYNAMIC_IO_PORT_BASE 270e1dc345SDaniel Schwierzeck select SUPPORTS_BIG_ENDIAN 280e1dc345SDaniel Schwierzeck select SUPPORTS_LITTLE_ENDIAN 2902611cbbSDaniel Schwierzeck select SUPPORTS_CPU_MIPS32_R1 3002611cbbSDaniel Schwierzeck select SUPPORTS_CPU_MIPS32_R2 319d638eeaSDaniel Schwierzeck select SWAP_IO_SPACE 32f53830e7SDaniel Schwierzeck select MIPS_L1_CACHE_SHIFT_6 33dd84058dSMasahiro Yamada 34dd84058dSMasahiro Yamadaconfig TARGET_VCT 35dd84058dSMasahiro Yamada bool "Support vct" 360e1dc345SDaniel Schwierzeck select SUPPORTS_BIG_ENDIAN 3702611cbbSDaniel Schwierzeck select SUPPORTS_CPU_MIPS32_R1 3802611cbbSDaniel Schwierzeck select SUPPORTS_CPU_MIPS32_R2 39dd7c7200SPaul Burton select SYS_MIPS_CACHE_INIT_RAM_LOAD 40dd84058dSMasahiro Yamada 41dd84058dSMasahiro Yamadaconfig TARGET_DBAU1X00 42dd84058dSMasahiro Yamada bool "Support dbau1x00" 430e1dc345SDaniel Schwierzeck select SUPPORTS_BIG_ENDIAN 440e1dc345SDaniel Schwierzeck select SUPPORTS_LITTLE_ENDIAN 4502611cbbSDaniel Schwierzeck select SUPPORTS_CPU_MIPS32_R1 4602611cbbSDaniel Schwierzeck select SUPPORTS_CPU_MIPS32_R2 47dd7c7200SPaul Burton select SYS_MIPS_CACHE_INIT_RAM_LOAD 480315a289SDaniel Schwierzeck select MIPS_TUNE_4KC 49dd84058dSMasahiro Yamada 50dd84058dSMasahiro Yamadaconfig TARGET_PB1X00 51dd84058dSMasahiro Yamada bool "Support pb1x00" 520e1dc345SDaniel Schwierzeck select SUPPORTS_LITTLE_ENDIAN 5302611cbbSDaniel Schwierzeck select SUPPORTS_CPU_MIPS32_R1 5402611cbbSDaniel Schwierzeck select SUPPORTS_CPU_MIPS32_R2 55dd7c7200SPaul Burton select SYS_MIPS_CACHE_INIT_RAM_LOAD 560315a289SDaniel Schwierzeck select MIPS_TUNE_4KC 57dd84058dSMasahiro Yamada 58*1d3d0f1fSWills Wangconfig ARCH_ATH79 59*1d3d0f1fSWills Wang bool "Support QCA/Atheros ath79" 60*1d3d0f1fSWills Wang select OF_CONTROL 61*1d3d0f1fSWills Wang select DM 62*1d3d0f1fSWills Wang 6332c1a6eeSPurna Chandra Mandalconfig MACH_PIC32 6432c1a6eeSPurna Chandra Mandal bool "Support Microchip PIC32" 6532c1a6eeSPurna Chandra Mandal select OF_CONTROL 6632c1a6eeSPurna Chandra Mandal select DM 6732c1a6eeSPurna Chandra Mandal 68dd84058dSMasahiro Yamadaendchoice 69dd84058dSMasahiro Yamada 70dd84058dSMasahiro Yamadasource "board/dbau1x00/Kconfig" 71dd84058dSMasahiro Yamadasource "board/imgtec/malta/Kconfig" 72dd84058dSMasahiro Yamadasource "board/micronas/vct/Kconfig" 73dd84058dSMasahiro Yamadasource "board/pb1x00/Kconfig" 74dd84058dSMasahiro Yamadasource "board/qemu-mips/Kconfig" 75*1d3d0f1fSWills Wangsource "arch/mips/mach-ath79/Kconfig" 7632c1a6eeSPurna Chandra Mandalsource "arch/mips/mach-pic32/Kconfig" 77dd84058dSMasahiro Yamada 780e1dc345SDaniel Schwierzeckif MIPS 790e1dc345SDaniel Schwierzeck 800e1dc345SDaniel Schwierzeckchoice 810e1dc345SDaniel Schwierzeck prompt "Endianness selection" 820e1dc345SDaniel Schwierzeck help 830e1dc345SDaniel Schwierzeck Some MIPS boards can be configured for either little or big endian 840e1dc345SDaniel Schwierzeck byte order. These modes require different U-Boot images. In general there 850e1dc345SDaniel Schwierzeck is one preferred byteorder for a particular system but some systems are 860e1dc345SDaniel Schwierzeck just as commonly used in the one or the other endianness. 870e1dc345SDaniel Schwierzeck 880e1dc345SDaniel Schwierzeckconfig SYS_BIG_ENDIAN 890e1dc345SDaniel Schwierzeck bool "Big endian" 900e1dc345SDaniel Schwierzeck depends on SUPPORTS_BIG_ENDIAN 910e1dc345SDaniel Schwierzeck 920e1dc345SDaniel Schwierzeckconfig SYS_LITTLE_ENDIAN 930e1dc345SDaniel Schwierzeck bool "Little endian" 940e1dc345SDaniel Schwierzeck depends on SUPPORTS_LITTLE_ENDIAN 950e1dc345SDaniel Schwierzeck 960e1dc345SDaniel Schwierzeckendchoice 970e1dc345SDaniel Schwierzeck 9802611cbbSDaniel Schwierzeckchoice 9902611cbbSDaniel Schwierzeck prompt "CPU selection" 10002611cbbSDaniel Schwierzeck default CPU_MIPS32_R2 10102611cbbSDaniel Schwierzeck 10202611cbbSDaniel Schwierzeckconfig CPU_MIPS32_R1 10302611cbbSDaniel Schwierzeck bool "MIPS32 Release 1" 10402611cbbSDaniel Schwierzeck depends on SUPPORTS_CPU_MIPS32_R1 10502611cbbSDaniel Schwierzeck select 32BIT 10602611cbbSDaniel Schwierzeck help 10702611cbbSDaniel Schwierzeck Choose this option to build an U-Boot for release 1 or later of the 10802611cbbSDaniel Schwierzeck MIPS32 architecture. 10902611cbbSDaniel Schwierzeck 11002611cbbSDaniel Schwierzeckconfig CPU_MIPS32_R2 11102611cbbSDaniel Schwierzeck bool "MIPS32 Release 2" 11202611cbbSDaniel Schwierzeck depends on SUPPORTS_CPU_MIPS32_R2 11302611cbbSDaniel Schwierzeck select 32BIT 11402611cbbSDaniel Schwierzeck help 11502611cbbSDaniel Schwierzeck Choose this option to build an U-Boot for release 2 or later of the 11602611cbbSDaniel Schwierzeck MIPS32 architecture. 11702611cbbSDaniel Schwierzeck 11802611cbbSDaniel Schwierzeckconfig CPU_MIPS64_R1 11902611cbbSDaniel Schwierzeck bool "MIPS64 Release 1" 12002611cbbSDaniel Schwierzeck depends on SUPPORTS_CPU_MIPS64_R1 12102611cbbSDaniel Schwierzeck select 64BIT 12202611cbbSDaniel Schwierzeck help 12302611cbbSDaniel Schwierzeck Choose this option to build a kernel for release 1 or later of the 12402611cbbSDaniel Schwierzeck MIPS64 architecture. 12502611cbbSDaniel Schwierzeck 12602611cbbSDaniel Schwierzeckconfig CPU_MIPS64_R2 12702611cbbSDaniel Schwierzeck bool "MIPS64 Release 2" 12802611cbbSDaniel Schwierzeck depends on SUPPORTS_CPU_MIPS64_R2 12902611cbbSDaniel Schwierzeck select 64BIT 13002611cbbSDaniel Schwierzeck help 13102611cbbSDaniel Schwierzeck Choose this option to build a kernel for release 2 or later of the 13202611cbbSDaniel Schwierzeck MIPS64 architecture. 13302611cbbSDaniel Schwierzeck 13402611cbbSDaniel Schwierzeckendchoice 13502611cbbSDaniel Schwierzeck 13625fc664fSDaniel Schwierzeckmenu "OS boot interface" 13725fc664fSDaniel Schwierzeck 13825fc664fSDaniel Schwierzeckconfig MIPS_BOOT_CMDLINE_LEGACY 13925fc664fSDaniel Schwierzeck bool "Hand over legacy command line to Linux kernel" 14025fc664fSDaniel Schwierzeck default y 14125fc664fSDaniel Schwierzeck help 14225fc664fSDaniel Schwierzeck Enable this option if you want U-Boot to hand over the Yamon-style 14325fc664fSDaniel Schwierzeck command line to the kernel. All bootargs will be prepared as argc/argv 14425fc664fSDaniel Schwierzeck compatible list. The argument count (argc) is stored in register $a0. 14525fc664fSDaniel Schwierzeck The address of the argument list (argv) is stored in register $a1. 14625fc664fSDaniel Schwierzeck 147ca65e585SDaniel Schwierzeckconfig MIPS_BOOT_ENV_LEGACY 148ca65e585SDaniel Schwierzeck bool "Hand over legacy environment to Linux kernel" 149ca65e585SDaniel Schwierzeck default y 150ca65e585SDaniel Schwierzeck help 151ca65e585SDaniel Schwierzeck Enable this option if you want U-Boot to hand over the Yamon-style 152ca65e585SDaniel Schwierzeck environment to the kernel. Information like memory size, initrd 153ca65e585SDaniel Schwierzeck address and size will be prepared as zero-terminated key/value list. 1541cc0a9f4SRobert P. J. Day The address of the environment is stored in register $a2. 155ca65e585SDaniel Schwierzeck 1565002d8ccSDaniel Schwierzeckconfig MIPS_BOOT_FDT 15790b1c9faSDaniel Schwierzeck bool "Hand over a flattened device tree to Linux kernel" 1585002d8ccSDaniel Schwierzeck default n 1595002d8ccSDaniel Schwierzeck help 1605002d8ccSDaniel Schwierzeck Enable this option if you want U-Boot to hand over a flattened 16190b1c9faSDaniel Schwierzeck device tree to the kernel. According to UHI register $a0 will be set 16290b1c9faSDaniel Schwierzeck to -2 and the FDT address is stored in $a1. 1635002d8ccSDaniel Schwierzeck 16425fc664fSDaniel Schwierzeckendmenu 16525fc664fSDaniel Schwierzeck 1660e1dc345SDaniel Schwierzeckconfig SUPPORTS_BIG_ENDIAN 1670e1dc345SDaniel Schwierzeck bool 1680e1dc345SDaniel Schwierzeck 1690e1dc345SDaniel Schwierzeckconfig SUPPORTS_LITTLE_ENDIAN 1700e1dc345SDaniel Schwierzeck bool 1710e1dc345SDaniel Schwierzeck 17202611cbbSDaniel Schwierzeckconfig SUPPORTS_CPU_MIPS32_R1 17302611cbbSDaniel Schwierzeck bool 17402611cbbSDaniel Schwierzeck 17502611cbbSDaniel Schwierzeckconfig SUPPORTS_CPU_MIPS32_R2 17602611cbbSDaniel Schwierzeck bool 17702611cbbSDaniel Schwierzeck 17802611cbbSDaniel Schwierzeckconfig SUPPORTS_CPU_MIPS64_R1 17902611cbbSDaniel Schwierzeck bool 18002611cbbSDaniel Schwierzeck 18102611cbbSDaniel Schwierzeckconfig SUPPORTS_CPU_MIPS64_R2 18202611cbbSDaniel Schwierzeck bool 18302611cbbSDaniel Schwierzeck 184c57dafb5SDaniel Schwierzeckconfig CPU_MIPS32 185c57dafb5SDaniel Schwierzeck bool 186c57dafb5SDaniel Schwierzeck default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 187c57dafb5SDaniel Schwierzeck 188c57dafb5SDaniel Schwierzeckconfig CPU_MIPS64 189c57dafb5SDaniel Schwierzeck bool 190c57dafb5SDaniel Schwierzeck default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 191c57dafb5SDaniel Schwierzeck 1920315a289SDaniel Schwierzeckconfig MIPS_TUNE_4KC 1930315a289SDaniel Schwierzeck bool 1940315a289SDaniel Schwierzeck 1950315a289SDaniel Schwierzeckconfig MIPS_TUNE_14KC 1960315a289SDaniel Schwierzeck bool 1970315a289SDaniel Schwierzeck 1980315a289SDaniel Schwierzeckconfig MIPS_TUNE_24KC 1990315a289SDaniel Schwierzeck bool 2000315a289SDaniel Schwierzeck 20102611cbbSDaniel Schwierzeckconfig 32BIT 20202611cbbSDaniel Schwierzeck bool 20302611cbbSDaniel Schwierzeck 20402611cbbSDaniel Schwierzeckconfig 64BIT 20502611cbbSDaniel Schwierzeck bool 20602611cbbSDaniel Schwierzeck 2079d638eeaSDaniel Schwierzeckconfig SWAP_IO_SPACE 2089d638eeaSDaniel Schwierzeck bool 2099d638eeaSDaniel Schwierzeck 210dd7c7200SPaul Burtonconfig SYS_MIPS_CACHE_INIT_RAM_LOAD 211dd7c7200SPaul Burton bool 212dd7c7200SPaul Burton 213f53830e7SDaniel Schwierzeckconfig MIPS_L1_CACHE_SHIFT_4 214f53830e7SDaniel Schwierzeck bool 215f53830e7SDaniel Schwierzeck 216f53830e7SDaniel Schwierzeckconfig MIPS_L1_CACHE_SHIFT_5 217f53830e7SDaniel Schwierzeck bool 218f53830e7SDaniel Schwierzeck 219f53830e7SDaniel Schwierzeckconfig MIPS_L1_CACHE_SHIFT_6 220f53830e7SDaniel Schwierzeck bool 221f53830e7SDaniel Schwierzeck 222f53830e7SDaniel Schwierzeckconfig MIPS_L1_CACHE_SHIFT_7 223f53830e7SDaniel Schwierzeck bool 224f53830e7SDaniel Schwierzeck 225f53830e7SDaniel Schwierzeckconfig MIPS_L1_CACHE_SHIFT 226f53830e7SDaniel Schwierzeck int 227f53830e7SDaniel Schwierzeck default "7" if MIPS_L1_CACHE_SHIFT_7 228f53830e7SDaniel Schwierzeck default "6" if MIPS_L1_CACHE_SHIFT_6 229f53830e7SDaniel Schwierzeck default "5" if MIPS_L1_CACHE_SHIFT_5 230f53830e7SDaniel Schwierzeck default "4" if MIPS_L1_CACHE_SHIFT_4 231f53830e7SDaniel Schwierzeck default "5" 232f53830e7SDaniel Schwierzeck 23305e34255SPaul Burtonconfig DYNAMIC_IO_PORT_BASE 23405e34255SPaul Burton bool 23505e34255SPaul Burton 2360e1dc345SDaniel Schwierzeckendif 2370e1dc345SDaniel Schwierzeck 238dd84058dSMasahiro Yamadaendmenu 239