1dd84058dSMasahiro Yamadamenu "MIPS architecture" 2dd84058dSMasahiro Yamada depends on MIPS 3dd84058dSMasahiro Yamada 4dd84058dSMasahiro Yamadaconfig SYS_ARCH 5dd84058dSMasahiro Yamada default "mips" 6dd84058dSMasahiro Yamada 7b9863b6dSDaniel Schwierzeckconfig SYS_CPU 8b9863b6dSDaniel Schwierzeck default "mips32" if CPU_MIPS32_R1 || CPU_MIPS32_R2 9b9863b6dSDaniel Schwierzeck default "mips64" if CPU_MIPS64_R1 || CPU_MIPS64_R2 10b9863b6dSDaniel Schwierzeck 11dd84058dSMasahiro Yamadachoice 12dd84058dSMasahiro Yamada prompt "Target select" 13a26cd049SJoe Hershberger optional 14dd84058dSMasahiro Yamada 15dd84058dSMasahiro Yamadaconfig TARGET_QEMU_MIPS 16dd84058dSMasahiro Yamada bool "Support qemu-mips" 170e1dc345SDaniel Schwierzeck select SUPPORTS_BIG_ENDIAN 180e1dc345SDaniel Schwierzeck select SUPPORTS_LITTLE_ENDIAN 1902611cbbSDaniel Schwierzeck select SUPPORTS_CPU_MIPS32_R1 2002611cbbSDaniel Schwierzeck select SUPPORTS_CPU_MIPS32_R2 21aa45f75eSDaniel Schwierzeck select SUPPORTS_CPU_MIPS64_R1 22aa45f75eSDaniel Schwierzeck select SUPPORTS_CPU_MIPS64_R2 23dd84058dSMasahiro Yamada 24dd84058dSMasahiro Yamadaconfig TARGET_MALTA 25dd84058dSMasahiro Yamada bool "Support malta" 2605e34255SPaul Burton select DYNAMIC_IO_PORT_BASE 270e1dc345SDaniel Schwierzeck select SUPPORTS_BIG_ENDIAN 280e1dc345SDaniel Schwierzeck select SUPPORTS_LITTLE_ENDIAN 2902611cbbSDaniel Schwierzeck select SUPPORTS_CPU_MIPS32_R1 3002611cbbSDaniel Schwierzeck select SUPPORTS_CPU_MIPS32_R2 319d638eeaSDaniel Schwierzeck select SWAP_IO_SPACE 32f53830e7SDaniel Schwierzeck select MIPS_L1_CACHE_SHIFT_6 33dd84058dSMasahiro Yamada 34dd84058dSMasahiro Yamadaconfig TARGET_VCT 35dd84058dSMasahiro Yamada bool "Support vct" 360e1dc345SDaniel Schwierzeck select SUPPORTS_BIG_ENDIAN 3702611cbbSDaniel Schwierzeck select SUPPORTS_CPU_MIPS32_R1 3802611cbbSDaniel Schwierzeck select SUPPORTS_CPU_MIPS32_R2 39dd7c7200SPaul Burton select SYS_MIPS_CACHE_INIT_RAM_LOAD 40dd84058dSMasahiro Yamada 41dd84058dSMasahiro Yamadaconfig TARGET_DBAU1X00 42dd84058dSMasahiro Yamada bool "Support dbau1x00" 430e1dc345SDaniel Schwierzeck select SUPPORTS_BIG_ENDIAN 440e1dc345SDaniel Schwierzeck select SUPPORTS_LITTLE_ENDIAN 4502611cbbSDaniel Schwierzeck select SUPPORTS_CPU_MIPS32_R1 4602611cbbSDaniel Schwierzeck select SUPPORTS_CPU_MIPS32_R2 47dd7c7200SPaul Burton select SYS_MIPS_CACHE_INIT_RAM_LOAD 480315a289SDaniel Schwierzeck select MIPS_TUNE_4KC 49dd84058dSMasahiro Yamada 50dd84058dSMasahiro Yamadaconfig TARGET_PB1X00 51dd84058dSMasahiro Yamada bool "Support pb1x00" 520e1dc345SDaniel Schwierzeck select SUPPORTS_LITTLE_ENDIAN 5302611cbbSDaniel Schwierzeck select SUPPORTS_CPU_MIPS32_R1 5402611cbbSDaniel Schwierzeck select SUPPORTS_CPU_MIPS32_R2 55dd7c7200SPaul Burton select SYS_MIPS_CACHE_INIT_RAM_LOAD 560315a289SDaniel Schwierzeck select MIPS_TUNE_4KC 57dd84058dSMasahiro Yamada 5832c1a6eeSPurna Chandra Mandalconfig MACH_PIC32 5932c1a6eeSPurna Chandra Mandal bool "Support Microchip PIC32" 6032c1a6eeSPurna Chandra Mandal select OF_CONTROL 6132c1a6eeSPurna Chandra Mandal select DM 6232c1a6eeSPurna Chandra Mandal 63dd84058dSMasahiro Yamadaendchoice 64dd84058dSMasahiro Yamada 65dd84058dSMasahiro Yamadasource "board/dbau1x00/Kconfig" 66dd84058dSMasahiro Yamadasource "board/imgtec/malta/Kconfig" 67dd84058dSMasahiro Yamadasource "board/micronas/vct/Kconfig" 68dd84058dSMasahiro Yamadasource "board/pb1x00/Kconfig" 69dd84058dSMasahiro Yamadasource "board/qemu-mips/Kconfig" 7032c1a6eeSPurna Chandra Mandalsource "arch/mips/mach-pic32/Kconfig" 71dd84058dSMasahiro Yamada 720e1dc345SDaniel Schwierzeckif MIPS 730e1dc345SDaniel Schwierzeck 740e1dc345SDaniel Schwierzeckchoice 750e1dc345SDaniel Schwierzeck prompt "Endianness selection" 760e1dc345SDaniel Schwierzeck help 770e1dc345SDaniel Schwierzeck Some MIPS boards can be configured for either little or big endian 780e1dc345SDaniel Schwierzeck byte order. These modes require different U-Boot images. In general there 790e1dc345SDaniel Schwierzeck is one preferred byteorder for a particular system but some systems are 800e1dc345SDaniel Schwierzeck just as commonly used in the one or the other endianness. 810e1dc345SDaniel Schwierzeck 820e1dc345SDaniel Schwierzeckconfig SYS_BIG_ENDIAN 830e1dc345SDaniel Schwierzeck bool "Big endian" 840e1dc345SDaniel Schwierzeck depends on SUPPORTS_BIG_ENDIAN 850e1dc345SDaniel Schwierzeck 860e1dc345SDaniel Schwierzeckconfig SYS_LITTLE_ENDIAN 870e1dc345SDaniel Schwierzeck bool "Little endian" 880e1dc345SDaniel Schwierzeck depends on SUPPORTS_LITTLE_ENDIAN 890e1dc345SDaniel Schwierzeck 900e1dc345SDaniel Schwierzeckendchoice 910e1dc345SDaniel Schwierzeck 9202611cbbSDaniel Schwierzeckchoice 9302611cbbSDaniel Schwierzeck prompt "CPU selection" 9402611cbbSDaniel Schwierzeck default CPU_MIPS32_R2 9502611cbbSDaniel Schwierzeck 9602611cbbSDaniel Schwierzeckconfig CPU_MIPS32_R1 9702611cbbSDaniel Schwierzeck bool "MIPS32 Release 1" 9802611cbbSDaniel Schwierzeck depends on SUPPORTS_CPU_MIPS32_R1 9902611cbbSDaniel Schwierzeck select 32BIT 10002611cbbSDaniel Schwierzeck help 10102611cbbSDaniel Schwierzeck Choose this option to build an U-Boot for release 1 or later of the 10202611cbbSDaniel Schwierzeck MIPS32 architecture. 10302611cbbSDaniel Schwierzeck 10402611cbbSDaniel Schwierzeckconfig CPU_MIPS32_R2 10502611cbbSDaniel Schwierzeck bool "MIPS32 Release 2" 10602611cbbSDaniel Schwierzeck depends on SUPPORTS_CPU_MIPS32_R2 10702611cbbSDaniel Schwierzeck select 32BIT 10802611cbbSDaniel Schwierzeck help 10902611cbbSDaniel Schwierzeck Choose this option to build an U-Boot for release 2 or later of the 11002611cbbSDaniel Schwierzeck MIPS32 architecture. 11102611cbbSDaniel Schwierzeck 11202611cbbSDaniel Schwierzeckconfig CPU_MIPS64_R1 11302611cbbSDaniel Schwierzeck bool "MIPS64 Release 1" 11402611cbbSDaniel Schwierzeck depends on SUPPORTS_CPU_MIPS64_R1 11502611cbbSDaniel Schwierzeck select 64BIT 11602611cbbSDaniel Schwierzeck help 11702611cbbSDaniel Schwierzeck Choose this option to build a kernel for release 1 or later of the 11802611cbbSDaniel Schwierzeck MIPS64 architecture. 11902611cbbSDaniel Schwierzeck 12002611cbbSDaniel Schwierzeckconfig CPU_MIPS64_R2 12102611cbbSDaniel Schwierzeck bool "MIPS64 Release 2" 12202611cbbSDaniel Schwierzeck depends on SUPPORTS_CPU_MIPS64_R2 12302611cbbSDaniel Schwierzeck select 64BIT 12402611cbbSDaniel Schwierzeck help 12502611cbbSDaniel Schwierzeck Choose this option to build a kernel for release 2 or later of the 12602611cbbSDaniel Schwierzeck MIPS64 architecture. 12702611cbbSDaniel Schwierzeck 12802611cbbSDaniel Schwierzeckendchoice 12902611cbbSDaniel Schwierzeck 13025fc664fSDaniel Schwierzeckmenu "OS boot interface" 13125fc664fSDaniel Schwierzeck 13225fc664fSDaniel Schwierzeckconfig MIPS_BOOT_CMDLINE_LEGACY 13325fc664fSDaniel Schwierzeck bool "Hand over legacy command line to Linux kernel" 13425fc664fSDaniel Schwierzeck default y 13525fc664fSDaniel Schwierzeck help 13625fc664fSDaniel Schwierzeck Enable this option if you want U-Boot to hand over the Yamon-style 13725fc664fSDaniel Schwierzeck command line to the kernel. All bootargs will be prepared as argc/argv 13825fc664fSDaniel Schwierzeck compatible list. The argument count (argc) is stored in register $a0. 13925fc664fSDaniel Schwierzeck The address of the argument list (argv) is stored in register $a1. 14025fc664fSDaniel Schwierzeck 141ca65e585SDaniel Schwierzeckconfig MIPS_BOOT_ENV_LEGACY 142ca65e585SDaniel Schwierzeck bool "Hand over legacy environment to Linux kernel" 143ca65e585SDaniel Schwierzeck default y 144ca65e585SDaniel Schwierzeck help 145ca65e585SDaniel Schwierzeck Enable this option if you want U-Boot to hand over the Yamon-style 146ca65e585SDaniel Schwierzeck environment to the kernel. Information like memory size, initrd 147ca65e585SDaniel Schwierzeck address and size will be prepared as zero-terminated key/value list. 148*1cc0a9f4SRobert P. J. Day The address of the environment is stored in register $a2. 149ca65e585SDaniel Schwierzeck 1505002d8ccSDaniel Schwierzeckconfig MIPS_BOOT_FDT 15190b1c9faSDaniel Schwierzeck bool "Hand over a flattened device tree to Linux kernel" 1525002d8ccSDaniel Schwierzeck default n 1535002d8ccSDaniel Schwierzeck help 1545002d8ccSDaniel Schwierzeck Enable this option if you want U-Boot to hand over a flattened 15590b1c9faSDaniel Schwierzeck device tree to the kernel. According to UHI register $a0 will be set 15690b1c9faSDaniel Schwierzeck to -2 and the FDT address is stored in $a1. 1575002d8ccSDaniel Schwierzeck 15825fc664fSDaniel Schwierzeckendmenu 15925fc664fSDaniel Schwierzeck 1600e1dc345SDaniel Schwierzeckconfig SUPPORTS_BIG_ENDIAN 1610e1dc345SDaniel Schwierzeck bool 1620e1dc345SDaniel Schwierzeck 1630e1dc345SDaniel Schwierzeckconfig SUPPORTS_LITTLE_ENDIAN 1640e1dc345SDaniel Schwierzeck bool 1650e1dc345SDaniel Schwierzeck 16602611cbbSDaniel Schwierzeckconfig SUPPORTS_CPU_MIPS32_R1 16702611cbbSDaniel Schwierzeck bool 16802611cbbSDaniel Schwierzeck 16902611cbbSDaniel Schwierzeckconfig SUPPORTS_CPU_MIPS32_R2 17002611cbbSDaniel Schwierzeck bool 17102611cbbSDaniel Schwierzeck 17202611cbbSDaniel Schwierzeckconfig SUPPORTS_CPU_MIPS64_R1 17302611cbbSDaniel Schwierzeck bool 17402611cbbSDaniel Schwierzeck 17502611cbbSDaniel Schwierzeckconfig SUPPORTS_CPU_MIPS64_R2 17602611cbbSDaniel Schwierzeck bool 17702611cbbSDaniel Schwierzeck 178c57dafb5SDaniel Schwierzeckconfig CPU_MIPS32 179c57dafb5SDaniel Schwierzeck bool 180c57dafb5SDaniel Schwierzeck default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 181c57dafb5SDaniel Schwierzeck 182c57dafb5SDaniel Schwierzeckconfig CPU_MIPS64 183c57dafb5SDaniel Schwierzeck bool 184c57dafb5SDaniel Schwierzeck default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 185c57dafb5SDaniel Schwierzeck 1860315a289SDaniel Schwierzeckconfig MIPS_TUNE_4KC 1870315a289SDaniel Schwierzeck bool 1880315a289SDaniel Schwierzeck 1890315a289SDaniel Schwierzeckconfig MIPS_TUNE_14KC 1900315a289SDaniel Schwierzeck bool 1910315a289SDaniel Schwierzeck 1920315a289SDaniel Schwierzeckconfig MIPS_TUNE_24KC 1930315a289SDaniel Schwierzeck bool 1940315a289SDaniel Schwierzeck 19502611cbbSDaniel Schwierzeckconfig 32BIT 19602611cbbSDaniel Schwierzeck bool 19702611cbbSDaniel Schwierzeck 19802611cbbSDaniel Schwierzeckconfig 64BIT 19902611cbbSDaniel Schwierzeck bool 20002611cbbSDaniel Schwierzeck 2019d638eeaSDaniel Schwierzeckconfig SWAP_IO_SPACE 2029d638eeaSDaniel Schwierzeck bool 2039d638eeaSDaniel Schwierzeck 204dd7c7200SPaul Burtonconfig SYS_MIPS_CACHE_INIT_RAM_LOAD 205dd7c7200SPaul Burton bool 206dd7c7200SPaul Burton 207f53830e7SDaniel Schwierzeckconfig MIPS_L1_CACHE_SHIFT_4 208f53830e7SDaniel Schwierzeck bool 209f53830e7SDaniel Schwierzeck 210f53830e7SDaniel Schwierzeckconfig MIPS_L1_CACHE_SHIFT_5 211f53830e7SDaniel Schwierzeck bool 212f53830e7SDaniel Schwierzeck 213f53830e7SDaniel Schwierzeckconfig MIPS_L1_CACHE_SHIFT_6 214f53830e7SDaniel Schwierzeck bool 215f53830e7SDaniel Schwierzeck 216f53830e7SDaniel Schwierzeckconfig MIPS_L1_CACHE_SHIFT_7 217f53830e7SDaniel Schwierzeck bool 218f53830e7SDaniel Schwierzeck 219f53830e7SDaniel Schwierzeckconfig MIPS_L1_CACHE_SHIFT 220f53830e7SDaniel Schwierzeck int 221f53830e7SDaniel Schwierzeck default "7" if MIPS_L1_CACHE_SHIFT_7 222f53830e7SDaniel Schwierzeck default "6" if MIPS_L1_CACHE_SHIFT_6 223f53830e7SDaniel Schwierzeck default "5" if MIPS_L1_CACHE_SHIFT_5 224f53830e7SDaniel Schwierzeck default "4" if MIPS_L1_CACHE_SHIFT_4 225f53830e7SDaniel Schwierzeck default "5" 226f53830e7SDaniel Schwierzeck 22705e34255SPaul Burtonconfig DYNAMIC_IO_PORT_BASE 22805e34255SPaul Burton bool 22905e34255SPaul Burton 2300e1dc345SDaniel Schwierzeckendif 2310e1dc345SDaniel Schwierzeck 232dd84058dSMasahiro Yamadaendmenu 233