1dd84058dSMasahiro Yamadamenu "MIPS architecture" 2dd84058dSMasahiro Yamada depends on MIPS 3dd84058dSMasahiro Yamada 4dd84058dSMasahiro Yamadaconfig SYS_ARCH 5dd84058dSMasahiro Yamada default "mips" 6dd84058dSMasahiro Yamada 7b9863b6dSDaniel Schwierzeckconfig SYS_CPU 8b9863b6dSDaniel Schwierzeck default "mips32" if CPU_MIPS32_R1 || CPU_MIPS32_R2 9b9863b6dSDaniel Schwierzeck default "mips64" if CPU_MIPS64_R1 || CPU_MIPS64_R2 10b9863b6dSDaniel Schwierzeck 11dd84058dSMasahiro Yamadachoice 12dd84058dSMasahiro Yamada prompt "Target select" 13a26cd049SJoe Hershberger optional 14dd84058dSMasahiro Yamada 15dd84058dSMasahiro Yamadaconfig TARGET_QEMU_MIPS 16dd84058dSMasahiro Yamada bool "Support qemu-mips" 170e1dc345SDaniel Schwierzeck select SUPPORTS_BIG_ENDIAN 180e1dc345SDaniel Schwierzeck select SUPPORTS_LITTLE_ENDIAN 1902611cbbSDaniel Schwierzeck select SUPPORTS_CPU_MIPS32_R1 2002611cbbSDaniel Schwierzeck select SUPPORTS_CPU_MIPS32_R2 21aa45f75eSDaniel Schwierzeck select SUPPORTS_CPU_MIPS64_R1 22aa45f75eSDaniel Schwierzeck select SUPPORTS_CPU_MIPS64_R2 23dd84058dSMasahiro Yamada 24dd84058dSMasahiro Yamadaconfig TARGET_MALTA 25dd84058dSMasahiro Yamada bool "Support malta" 260e1dc345SDaniel Schwierzeck select SUPPORTS_BIG_ENDIAN 270e1dc345SDaniel Schwierzeck select SUPPORTS_LITTLE_ENDIAN 2802611cbbSDaniel Schwierzeck select SUPPORTS_CPU_MIPS32_R1 2902611cbbSDaniel Schwierzeck select SUPPORTS_CPU_MIPS32_R2 309d638eeaSDaniel Schwierzeck select SWAP_IO_SPACE 31dd84058dSMasahiro Yamada 32dd84058dSMasahiro Yamadaconfig TARGET_VCT 33dd84058dSMasahiro Yamada bool "Support vct" 340e1dc345SDaniel Schwierzeck select SUPPORTS_BIG_ENDIAN 3502611cbbSDaniel Schwierzeck select SUPPORTS_CPU_MIPS32_R1 3602611cbbSDaniel Schwierzeck select SUPPORTS_CPU_MIPS32_R2 37dd7c7200SPaul Burton select SYS_MIPS_CACHE_INIT_RAM_LOAD 38dd84058dSMasahiro Yamada 39dd84058dSMasahiro Yamadaconfig TARGET_DBAU1X00 40dd84058dSMasahiro Yamada bool "Support dbau1x00" 410e1dc345SDaniel Schwierzeck select SUPPORTS_BIG_ENDIAN 420e1dc345SDaniel Schwierzeck select SUPPORTS_LITTLE_ENDIAN 4302611cbbSDaniel Schwierzeck select SUPPORTS_CPU_MIPS32_R1 4402611cbbSDaniel Schwierzeck select SUPPORTS_CPU_MIPS32_R2 45dd7c7200SPaul Burton select SYS_MIPS_CACHE_INIT_RAM_LOAD 46*0315a289SDaniel Schwierzeck select MIPS_TUNE_4KC 47dd84058dSMasahiro Yamada 48dd84058dSMasahiro Yamadaconfig TARGET_PB1X00 49dd84058dSMasahiro Yamada bool "Support pb1x00" 500e1dc345SDaniel Schwierzeck select SUPPORTS_LITTLE_ENDIAN 5102611cbbSDaniel Schwierzeck select SUPPORTS_CPU_MIPS32_R1 5202611cbbSDaniel Schwierzeck select SUPPORTS_CPU_MIPS32_R2 53dd7c7200SPaul Burton select SYS_MIPS_CACHE_INIT_RAM_LOAD 54*0315a289SDaniel Schwierzeck select MIPS_TUNE_4KC 55dd84058dSMasahiro Yamada 56dd84058dSMasahiro Yamadaendchoice 57dd84058dSMasahiro Yamada 58dd84058dSMasahiro Yamadasource "board/dbau1x00/Kconfig" 59dd84058dSMasahiro Yamadasource "board/imgtec/malta/Kconfig" 60dd84058dSMasahiro Yamadasource "board/micronas/vct/Kconfig" 61dd84058dSMasahiro Yamadasource "board/pb1x00/Kconfig" 62dd84058dSMasahiro Yamadasource "board/qemu-mips/Kconfig" 63dd84058dSMasahiro Yamada 640e1dc345SDaniel Schwierzeckif MIPS 650e1dc345SDaniel Schwierzeck 660e1dc345SDaniel Schwierzeckchoice 670e1dc345SDaniel Schwierzeck prompt "Endianness selection" 680e1dc345SDaniel Schwierzeck help 690e1dc345SDaniel Schwierzeck Some MIPS boards can be configured for either little or big endian 700e1dc345SDaniel Schwierzeck byte order. These modes require different U-Boot images. In general there 710e1dc345SDaniel Schwierzeck is one preferred byteorder for a particular system but some systems are 720e1dc345SDaniel Schwierzeck just as commonly used in the one or the other endianness. 730e1dc345SDaniel Schwierzeck 740e1dc345SDaniel Schwierzeckconfig SYS_BIG_ENDIAN 750e1dc345SDaniel Schwierzeck bool "Big endian" 760e1dc345SDaniel Schwierzeck depends on SUPPORTS_BIG_ENDIAN 770e1dc345SDaniel Schwierzeck 780e1dc345SDaniel Schwierzeckconfig SYS_LITTLE_ENDIAN 790e1dc345SDaniel Schwierzeck bool "Little endian" 800e1dc345SDaniel Schwierzeck depends on SUPPORTS_LITTLE_ENDIAN 810e1dc345SDaniel Schwierzeck 820e1dc345SDaniel Schwierzeckendchoice 830e1dc345SDaniel Schwierzeck 8402611cbbSDaniel Schwierzeckchoice 8502611cbbSDaniel Schwierzeck prompt "CPU selection" 8602611cbbSDaniel Schwierzeck default CPU_MIPS32_R2 8702611cbbSDaniel Schwierzeck 8802611cbbSDaniel Schwierzeckconfig CPU_MIPS32_R1 8902611cbbSDaniel Schwierzeck bool "MIPS32 Release 1" 9002611cbbSDaniel Schwierzeck depends on SUPPORTS_CPU_MIPS32_R1 9102611cbbSDaniel Schwierzeck select 32BIT 9202611cbbSDaniel Schwierzeck help 9302611cbbSDaniel Schwierzeck Choose this option to build an U-Boot for release 1 or later of the 9402611cbbSDaniel Schwierzeck MIPS32 architecture. 9502611cbbSDaniel Schwierzeck 9602611cbbSDaniel Schwierzeckconfig CPU_MIPS32_R2 9702611cbbSDaniel Schwierzeck bool "MIPS32 Release 2" 9802611cbbSDaniel Schwierzeck depends on SUPPORTS_CPU_MIPS32_R2 9902611cbbSDaniel Schwierzeck select 32BIT 10002611cbbSDaniel Schwierzeck help 10102611cbbSDaniel Schwierzeck Choose this option to build an U-Boot for release 2 or later of the 10202611cbbSDaniel Schwierzeck MIPS32 architecture. 10302611cbbSDaniel Schwierzeck 10402611cbbSDaniel Schwierzeckconfig CPU_MIPS64_R1 10502611cbbSDaniel Schwierzeck bool "MIPS64 Release 1" 10602611cbbSDaniel Schwierzeck depends on SUPPORTS_CPU_MIPS64_R1 10702611cbbSDaniel Schwierzeck select 64BIT 10802611cbbSDaniel Schwierzeck help 10902611cbbSDaniel Schwierzeck Choose this option to build a kernel for release 1 or later of the 11002611cbbSDaniel Schwierzeck MIPS64 architecture. 11102611cbbSDaniel Schwierzeck 11202611cbbSDaniel Schwierzeckconfig CPU_MIPS64_R2 11302611cbbSDaniel Schwierzeck bool "MIPS64 Release 2" 11402611cbbSDaniel Schwierzeck depends on SUPPORTS_CPU_MIPS64_R2 11502611cbbSDaniel Schwierzeck select 64BIT 11602611cbbSDaniel Schwierzeck help 11702611cbbSDaniel Schwierzeck Choose this option to build a kernel for release 2 or later of the 11802611cbbSDaniel Schwierzeck MIPS64 architecture. 11902611cbbSDaniel Schwierzeck 12002611cbbSDaniel Schwierzeckendchoice 12102611cbbSDaniel Schwierzeck 12225fc664fSDaniel Schwierzeckmenu "OS boot interface" 12325fc664fSDaniel Schwierzeck 12425fc664fSDaniel Schwierzeckconfig MIPS_BOOT_CMDLINE_LEGACY 12525fc664fSDaniel Schwierzeck bool "Hand over legacy command line to Linux kernel" 12625fc664fSDaniel Schwierzeck default y 12725fc664fSDaniel Schwierzeck help 12825fc664fSDaniel Schwierzeck Enable this option if you want U-Boot to hand over the Yamon-style 12925fc664fSDaniel Schwierzeck command line to the kernel. All bootargs will be prepared as argc/argv 13025fc664fSDaniel Schwierzeck compatible list. The argument count (argc) is stored in register $a0. 13125fc664fSDaniel Schwierzeck The address of the argument list (argv) is stored in register $a1. 13225fc664fSDaniel Schwierzeck 133ca65e585SDaniel Schwierzeckconfig MIPS_BOOT_ENV_LEGACY 134ca65e585SDaniel Schwierzeck bool "Hand over legacy environment to Linux kernel" 135ca65e585SDaniel Schwierzeck default y 136ca65e585SDaniel Schwierzeck help 137ca65e585SDaniel Schwierzeck Enable this option if you want U-Boot to hand over the Yamon-style 138ca65e585SDaniel Schwierzeck environment to the kernel. Information like memory size, initrd 139ca65e585SDaniel Schwierzeck address and size will be prepared as zero-terminated key/value list. 140ca65e585SDaniel Schwierzeck The address of the enviroment is stored in register $a2. 141ca65e585SDaniel Schwierzeck 1425002d8ccSDaniel Schwierzeckconfig MIPS_BOOT_FDT 14390b1c9faSDaniel Schwierzeck bool "Hand over a flattened device tree to Linux kernel" 1445002d8ccSDaniel Schwierzeck default n 1455002d8ccSDaniel Schwierzeck help 1465002d8ccSDaniel Schwierzeck Enable this option if you want U-Boot to hand over a flattened 14790b1c9faSDaniel Schwierzeck device tree to the kernel. According to UHI register $a0 will be set 14890b1c9faSDaniel Schwierzeck to -2 and the FDT address is stored in $a1. 1495002d8ccSDaniel Schwierzeck 15025fc664fSDaniel Schwierzeckendmenu 15125fc664fSDaniel Schwierzeck 1520e1dc345SDaniel Schwierzeckconfig SUPPORTS_BIG_ENDIAN 1530e1dc345SDaniel Schwierzeck bool 1540e1dc345SDaniel Schwierzeck 1550e1dc345SDaniel Schwierzeckconfig SUPPORTS_LITTLE_ENDIAN 1560e1dc345SDaniel Schwierzeck bool 1570e1dc345SDaniel Schwierzeck 15802611cbbSDaniel Schwierzeckconfig SUPPORTS_CPU_MIPS32_R1 15902611cbbSDaniel Schwierzeck bool 16002611cbbSDaniel Schwierzeck 16102611cbbSDaniel Schwierzeckconfig SUPPORTS_CPU_MIPS32_R2 16202611cbbSDaniel Schwierzeck bool 16302611cbbSDaniel Schwierzeck 16402611cbbSDaniel Schwierzeckconfig SUPPORTS_CPU_MIPS64_R1 16502611cbbSDaniel Schwierzeck bool 16602611cbbSDaniel Schwierzeck 16702611cbbSDaniel Schwierzeckconfig SUPPORTS_CPU_MIPS64_R2 16802611cbbSDaniel Schwierzeck bool 16902611cbbSDaniel Schwierzeck 170c57dafb5SDaniel Schwierzeckconfig CPU_MIPS32 171c57dafb5SDaniel Schwierzeck bool 172c57dafb5SDaniel Schwierzeck default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 173c57dafb5SDaniel Schwierzeck 174c57dafb5SDaniel Schwierzeckconfig CPU_MIPS64 175c57dafb5SDaniel Schwierzeck bool 176c57dafb5SDaniel Schwierzeck default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 177c57dafb5SDaniel Schwierzeck 178*0315a289SDaniel Schwierzeckconfig MIPS_TUNE_4KC 179*0315a289SDaniel Schwierzeck bool 180*0315a289SDaniel Schwierzeck 181*0315a289SDaniel Schwierzeckconfig MIPS_TUNE_14KC 182*0315a289SDaniel Schwierzeck bool 183*0315a289SDaniel Schwierzeck 184*0315a289SDaniel Schwierzeckconfig MIPS_TUNE_24KC 185*0315a289SDaniel Schwierzeck bool 186*0315a289SDaniel Schwierzeck 18702611cbbSDaniel Schwierzeckconfig 32BIT 18802611cbbSDaniel Schwierzeck bool 18902611cbbSDaniel Schwierzeck 19002611cbbSDaniel Schwierzeckconfig 64BIT 19102611cbbSDaniel Schwierzeck bool 19202611cbbSDaniel Schwierzeck 1939d638eeaSDaniel Schwierzeckconfig SWAP_IO_SPACE 1949d638eeaSDaniel Schwierzeck bool 1959d638eeaSDaniel Schwierzeck 196dd7c7200SPaul Burtonconfig SYS_MIPS_CACHE_INIT_RAM_LOAD 197dd7c7200SPaul Burton bool 198dd7c7200SPaul Burton 1990e1dc345SDaniel Schwierzeckendif 2000e1dc345SDaniel Schwierzeck 201dd84058dSMasahiro Yamadaendmenu 202