1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * (C) Copyright 2012 4 * NVIDIA Inc, <www.nvidia.com> 5 * 6 * Allen Martin <amartin@nvidia.com> 7 */ 8 #include <common.h> 9 #include <debug_uart.h> 10 #include <spl.h> 11 12 #include <asm/io.h> 13 #include <asm/arch/clock.h> 14 #include <asm/arch/pinmux.h> 15 #include <asm/arch/tegra.h> 16 #include <asm/arch-tegra/apb_misc.h> 17 #include <asm/arch-tegra/board.h> 18 #include <asm/spl.h> 19 #include "cpu.h" 20 spl_board_init(void)21void spl_board_init(void) 22 { 23 struct apb_misc_pp_ctlr *apb_misc = 24 (struct apb_misc_pp_ctlr *)NV_PA_APB_MISC_BASE; 25 26 /* enable JTAG */ 27 writel(0xC0, &apb_misc->cfg_ctl); 28 29 board_init_uart_f(); 30 31 /* Initialize periph GPIOs */ 32 gpio_early_init_uart(); 33 34 clock_early_init(); 35 #ifdef CONFIG_DEBUG_UART 36 debug_uart_init(); 37 #endif 38 preloader_console_init(); 39 } 40 spl_boot_device(void)41u32 spl_boot_device(void) 42 { 43 return BOOT_DEVICE_RAM; 44 } 45 jump_to_image_no_args(struct spl_image_info * spl_image)46void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image) 47 { 48 debug("image entry point: 0x%lX\n", spl_image->entry_point); 49 50 start_cpu((u32)spl_image->entry_point); 51 halt_avp(); 52 } 53